| dc.description.abstract | This thesis proposes design and implementation of low-complexity multiple-input multiple-output detectors for orthogonal frequency division multiplexing communication systems. In the conventional K-Best algorithm, sorting operation of Partial Euclidean Distance (PED) values occupies a lot of computing complexity. First, we propose two types of fast sorting algorithms to deal with the large amount of enumerated candidate paths: Parallel Slice Merge Algorithm (PSMA) and Parallel Bubble Slice Sort (PBSS). Furthermore, modified K-Best (MKB) algorithm is proposed to perform sorting operation for every two layers, thanks to the proposed sorting algorithms. The MKB algorithm can reduce the computing complexity of sorting operation in the conventional K-Best algorithm without losing BER performance. Next, by taking the advantage of sorting free characteristic of Distributed K-Best (DKB) algorithm, we develop high throughput MIMO detector with multi-stage pipelined architecture. To further reducing the number of visiting nodes and achieving high power efficiency, we combine DKB algorithm with Successive Interference Cancelling (SIC) algorithm.
By applying pipelined hardware architecture and modular functional blocks, the proposed DKB+SIC MIMO detector can maintain high circuit utilization and constant throughput supporting 2x2, 4x4 and 8x8 antenna configurations.
Finally, we propose an adaptively K-value self-adjusting mechanism to reduce unnecessary visiting nodes, that is, saving computing complexity when channel environment is good.
Without calculating the exact SNR value of the channel, we can rapidly decide the K-value in each decoding layer.
According to the system applications, the proposed algorithms can be implemented into pipelined or iterative hardware architecture. The pipelined circuit can perform high throughput rate with high power efficiency and flexibly support power of two antenna configurations. The iterative circuit architecture can widely adapt various antenna configuration and is suitable for more complicated algorithms. We have implemented three kinds of MIMO detector design in CMOS 90nm process that supports 2x2, 4x4, 8x8 and from 2x2 to 8x8 antenna configurations; multiple data modulations from BPSK, QPSK, 16-QAM to 64-QAM, switch-able 5, 10 K-values and 2, 5, 10 self-adjusting. | en_US |