| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 彭德彰 | zh_TW |
| DC.creator | De-Zhang Peng | en_US |
| dc.date.accessioned | 2009-7-20T07:39:07Z | |
| dc.date.available | 2009-7-20T07:39:07Z | |
| dc.date.issued | 2009 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=965201035 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 在電腦視覺應用領域例如：視訊監控系統、人機互動介面以及以物件為基準的視訊壓縮標準(如：MPEG-4)裡，都包含偵測、辨認以及追蹤前景物件的功能需求，並且大部分的應用都需要達到即時前景物件切割的功能。前景物件切割的畫面結果好壞對於後續的應用處理步驟影響很大，因此要如何降低前景物件切割結果的雜訊是很重要的。在視訊監控系統中的追蹤以及辨認前景物件的應用也必須先將畫面中所切割出的前景物件進行標記處理之後，才能進行後續的應用。
本論文針對上述的各種需求，提出了一個即時視訊前景物件切割具有標記以及雜訊去除的超大型積體電路設計，我們所提出的超大型積體電路設計具有高吞吐率的優點，能夠支援很高的解析度(例如：HD720P)達到即時視訊前景物件切割的效果，並且在面積的消耗上又能夠符合低成本的要求。本論文的系統主要分為三個部分，第一部分：基於多模型背景維持演算法之前景物件切割架構，對輸入的視訊影像進行切割；第二部分：型態學運算雜訊去除架構，對視訊影像切割結果進行雜訊消除；第三部分：前景物件標記架構，對雜訊消除完畢的影像進行物件標記。本論文提出的系統是使用標準元件設計流程實現之數位超大型積體電路，在台積電0.18um的製程實現。
| zh_TW |
| dc.description.abstract | In computer vision applications, such as video surveillance, human-machine interaction and object based video compression standard (e.g., MPEG-4), most applications attempt to detect, recognize events and tracking foreground objects. There also have many real-time applications. The foreground objects segmentation result will do great influence to later process. Therefore how to reduce a foreground objects segmentation result noise effect is very important. In many video surveillance application need to transform image into a symbolic image to do later post-process (e.g., tracking and recognize).
By above-mentioned requisitions, this paper proposed VLSI design for real-time foreground object segmentation with labeling and noise reduction mode. Our proposed VLSI design has high throughput rate that can meet the high resolution specification (e.g., HD720P) with real-time requirement and low cost design. In this paper system consists three parts. First, a foreground objects segmentation architecture design with multi-model background maintenance algorithm is proposed to segment video image. Second, morphological operation noise reduction architecture is proposed to reduce segmentation result noise. Finally, object labeling architecture is proposed to label noiseless image. In this paper proposed systems is implementation by cell-base design flow digital VLSI in TSMC 0.18um.
| en_US |
| DC.subject | 超大型積體電路設計 | zh_TW |
| DC.subject | 視訊切割 | zh_TW |
| DC.subject | 視訊監控系統 | zh_TW |
| DC.subject | VLSI | en_US |
| DC.subject | Video Surveillance Application | en_US |
| DC.subject | Video Segmentation | en_US |
| DC.title | 應用於視訊監控具有雜訊去除與標記的前景物件切割超大型積體電路設計 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | VLSI Design for Foreground Object Segmentation with Labeling and Noise Reduction Mode in Video Surveillance Application | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |