| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 曾世璋 | zh_TW |
| DC.creator | Shi-Zhang Tzeng | en_US |
| dc.date.accessioned | 2009-11-17T07:39:07Z | |
| dc.date.available | 2009-11-17T07:39:07Z | |
| dc.date.issued | 2009 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=965201106 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 本篇論文針對穩態視覺誘發電位(Steady-State Visual Evoked Potentials, SSVEPs)之腦電訊號處理設計數位訊號處理電路，實現即時性的大腦人機介面系統(Brain Computer Interface, BCI)。目的在改善目前相關研究必須建構於使用個人電腦搭配線上訊號處理軟體以及資料擷取卡等的高成本實現方式。本研究以場可程式邏輯閘陣列(Field Programmable Gate Array, FPGA)為基礎的電路實現穩態視覺誘發電位之硬體即時信號處理電路，用以建立低成本與方便使用的大腦人機介面系統。另外，為有效誘發穩態視覺誘發電位之腦電訊號，而本篇論文設計發光二極體(Light-emitting diode, LED)閃爍燈電路以視覺刺激方式誘發穩態視覺誘發電位，為辨別多組發光二極體閃爍燈以場可程式邏輯閘陣列實現多頻多相位編碼技術產生多組訊號驅動，並且具有即時無線腦電訊號傳輸。最後經由實驗結果證明本系統確能有效誘發出使用者之穩態視覺誘發電位，達成即時穩態視覺誘發電位信號處理，並且能有高準確辨識率。
| zh_TW |
| dc.description.abstract | This thesis mainly designs a digital signal processing circuit for electroencephalogram (EEG) of steady state visual evoked potential (SSVEP) to implement a real time brain computer interface (BCI) system. In order to reduce the cost of BCI system, it has not used personal computer, commercialized signal processing software and data acquisition card. Thus, a FPGA-based BCI system is proposed. It establishes a low cost and easily used BCI system through the real time hardware signal processing circuit of SSVEP. Moreover, the EEG signal of SSVEP is evoked through designing a light emitting diode (LED) flicker light circuit. Furthermore the visual stimulated method using LED flicker is proposed. To generate selections using LED flicker light, the multi-frequency and multi-phase encoding technique is used. Moreover, the transmission of EEG signal is wireless. Finally, a prototype system is built. Experimental results verify the proposed BCI system is feasible.
| en_US |
| DC.subject | 無線傳輸 | zh_TW |
| DC.subject | 相位編碼 | zh_TW |
| DC.subject | 大腦人機介面 | zh_TW |
| DC.subject | 腦電訊號 | zh_TW |
| DC.subject | 穩態視覺誘發電位 | zh_TW |
| DC.subject | FPGA | en_US |
| DC.subject | BCI | en_US |
| DC.subject | SSVEP | en_US |
| DC.subject | EEG | en_US |
| DC.subject | WIRELESS | en_US |
| DC.title | 多頻相位編碼於穩態視覺誘發電位之大腦人機介面系統設計 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | SSVEP Processing with Multi- Frequency and Multi-Phase Encode for Design of BCI System | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |