博碩士論文 973306016 完整後設資料紀錄

DC 欄位 語言
DC.contributor環境工程研究所在職專班zh_TW
DC.creator李洲銤zh_TW
DC.creatorCHOU-MI LEEen_US
dc.date.accessioned2010-7-19T07:39:07Z
dc.date.available2010-7-19T07:39:07Z
dc.date.issued2010
dc.identifier.urihttp://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=973306016
dc.contributor.department環境工程研究所在職專班zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract以印刷電路板鍍銅水平製程探討晶膜現象衍生之銅層斷裂 摘 要 我國電子產品向來以資訊、通訊和消費性產品三者為主要。產品的發展趨勢除了高速和多功能外,更朝向輕、薄、短、小方向發展,其中,內部重要零組件-印刷電路製作、電鍍技術的需求日益殷切。特別是近年來台灣成為全世界印刷電路板生產重鎮,製造技術更是居全球領導地位之一。 本研究方向希望藉由印刷電路板之高污染產業,其重要鍍銅水平製程探討銅晶格晶膜現象(Epitaxy)衍生之銅層斷裂(crack),如何改善銅與銅之間銅晶格,探討以利於Epitaxy的生成因子,進行製程改善以減少銅層斷裂,Epitaxy的生成有利因子如下︰加強酸浸槽硫酸濃度及提高處理溫度,目的為加強酸浸槽去除氧化銅及有機污染物的能力並有預活化功能。在酸浸槽加入電鍍銅光澤劑(Brightener),可活化化學銅表面。當化學銅表面氧化嚴重時,酸浸槽無法將氧化銅去除就會造成後續電鍍銅與化學銅的結合力不佳,另外判斷水平電鍍線化學銅後接觸空氣的時間(holding time)在造成銅層斷裂方面是否有影響。Epitaxy生成表示基材銅、化學銅與電鍍銅之晶格為同一個類型,結合力強,機械能力佳,可減少銅層斷裂,降低廢棄物產生,藉以提升製程效能及企業經營效率,期許能從製程源頭改善,達到資源有效利用,並能提供產業界類似高污染高耗能製程改善之參考。 關鍵詞:印刷電路板, 水平銅製程 zh_TW
dc.description.abstractAbstract Taiwan’s electronic product is focused on the development of 3C product (Communication, Computer, and consumable electronic prodcut). In additional to high-speed and multi function, the size of 3C products also develops to be more light, thin, and short. One of important part of electronic product is PCB. Cu plating technology is become more and more important. Especially, Taiwan is the leading producer of PCB and the manufacture technology is also the top leader. This research hopes to investigate PCB horizontal Cu plating system and research the Epitaxy morphology which induces the crack of Cu plating layer. How to improve Cu grain strength and investigate the grow factor of Epitaxy is the topic to this research. Some factors influence the formation of epitaxy such as increase the concentration of sulfuric acid, and increase temperature. The increased concentration of sulfuric acid can remove native copper oxide and organic contamination. It also has ability to active e’less copper surface. Adding the Brightener into plating bath can also active E’less copper’s surface. As e’less copper’s surface oxidized very damaged, some problems will occur as sequence plating contiue, such as poor adhesion between E’less copper and plating copper and poor mechanical properties of copper grain. The holding time of E’less copper is also an index to evaluate the orientation of copper grain’s crack. The formation of Epitaxy indicated that inner copper, e’less copper and plating have the same copper grain structure. The grain structure had high bonding ability and good mechanical properties which reduce the crack of copper layer. By improving the plating process to reduce waste and have souce recycle, we improved the plating process to be more efficiency and to have source recycle and we also hope the result of this research can be considered and refered by high energy waste and high polluted industry for reference. Keywords: Printed circuit boards, copper horizontal of process en_US
DC.subject印刷電路板zh_TW
DC.subject水平銅製程zh_TW
DC.subjectPrinted circuit boardsen_US
DC.subjectcopper horizontal of processen_US
DC.title以印刷電路板鍍銅水平製程探討晶膜現象衍生之銅層斷裂zh_TW
dc.language.isozh-TWzh-TW
DC.titleThe investigation of copper crack inducing epitaxy morphology by PCB horizontal plating systemen_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

若有論文相關問題,請聯絡國立中央大學圖書館推廣服務組 TEL:(03)422-7151轉57407,或E-mail聯絡  - 隱私權政策聲明