| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 李俊家 | zh_TW |
| DC.creator | Chun-Chia Lee | en_US |
| dc.date.accessioned | 2010-7-26T07:39:07Z | |
| dc.date.available | 2010-7-26T07:39:07Z | |
| dc.date.issued | 2010 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=975201011 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 本論文包含兩主題，第一部份為壓控振盪器，對於相位雜訊的生成做描述並研製一K頻段與兩個Ku頻段壓控振盪器。第二部份為注入鎖定式除頻器，分別對不同的注入鎖定式除頻器架構作簡介，研製兩種不同形態的Ku頻段注入鎖定式除頻器。以上電路分別使用tsmcTM 0.18 µm與tsmcTM 0.13 µm CMOS製程實現電路設計。
第一部份設計為K頻段轉導提升式考畢茲壓控振盪器，解決傳統考畢茲振盪器不易起振的問題。使用tsmcTM 0.13 µm CMOS製程，其振盪中心頻率為25.64 GHz，可調頻率範圍為860 MHz，偏移主頻率1 MHz之相位雜訊為-108.3 dBc/Hz。在供應電壓為1.2 V下，功率消耗為3.06 mW。並計算優化參數(FOM)為-191.6 dBc/Hz，晶片面積為0.08 mm2。Ku頻段偏壓位移式壓控振盪器，解決傳統交錯耦合壓控振盪器使用電流源方式造成閃爍雜訊對於相位雜訊的干擾。並討論電晶體的偏壓方式，對壓控振盪器相位雜訊做最佳化。使用tsmcTM 0.18 µm CMOS製程，其振盪中心頻率為12.78 GHz，可調頻率範圍為780 MHz，偏移主頻率1 MHz之相位雜訊為-110 dBc/Hz。在供應電壓為1.0 V下，功率消耗為5.22 mW。並計算優化參數(FOM)為-185.2 dBc/Hz，晶片面積為0.33 mm2。Ku頻段電流重新使用轉導提升式考畢茲壓控振盪器，此方式減少壓控振盪器在電流的使用，降低整體的功率消耗。使用tsmcTM 0.18 µm CMOS製程，其振盪中心頻率為12.2 GHz，可調頻率範圍為1400 MHz，偏移主頻率1 MHz之相位雜訊為-107.1 dBc/Hz。在供應電壓為1.9 V下，功率消耗為1.0 mW。並計算優化參數(FOM)為-188 dBc/Hz，晶片面積為0.308 mm2。
第二部份為注入鎖定式除頻器之設計，Ku頻段振幅重新分佈式注入鎖定式除頻器，使用振幅重新分佈式架構，增加電晶體本身訊號雜訊比(SNR)並實現除二除頻器。使用tsmcTM 0.18 µm CMOS製程，在輸入功率為0 dBm下，鎖定頻寬範圍為11.7~14.4 GHz達20 %鎖定範圍。在供應電壓為1.0 V下，功率消耗為3.4 mW。計算優化參數(FOM)為6.45 % / mW，晶片面積為0.5 mm2。Ku頻段注入增強鎖定式除頻器，以傳統注入鎖定式除頻器為基本架構，串接一PMOS電晶體，在相同的直流功率消耗下，輸入信號可增加。提高信號注入的效率，增加可鎖定除頻的範圍，並以此架構實現除二除頻器。使用tsmcTM 0.18 µm CMOS製程，在輸入功率為0 dBm下，鎖定頻寬範圍為11.0~14.3 GHz達26 %的鎖定範圍。在供應電壓為1.0 V下，功率消耗為1 mW。計算優化參數(FOM)為26 % / mW，晶片面積為0.48 mm2。
| zh_TW |
| dc.description.abstract | The thesis studies two subjects. The first one is on voltage control oscillator design where one K-band and two Ku-band VCOs are demonstrated. The second one is on injection locked frequency divider (ILFD) design where two Ku-band ILFDs are demonstrated. Aforementioned circuits were implemented in tsmcTM 0.13 µm and 0.18 µm CMOS processes.
The first part presents a K-band gm-boosted Coliptts VCO. The proposed gm-boosted technique solves the problem of difficult oscillation of conventional Coliptts VCO. The obtained oscillation frequency is 25.64 GHz with a tuning range of 860 MHz at 1.2 V supply voltage. The power consumption is 3.06 mW. The measured phase noise at 1 MHz offset frequency is -108.3 dBc/Hz. The FOM (figure-of-merit) is -191.6 dBc/Hz. The chip size is 0.076 mm2. The bias level shifting technique was applied in a Ku-band VCO which solves the flicker noise from current source. The DC bias voltage of transistors is discussed, and the phase noise is then optimized. The designed Ku-band VCO was implemented in tsmcTM 0.18 µm CMOS process. The obtained oscillation frequency is 12.78 GHz with a tuning range 780 MHz at 1.0 V supply voltage. The power consumption is 5.22 mW. The measured phase noise at 1 MHz offset frequency is -110 dBc/Hz. The FOM is -185.2 dBc/Hz. The chip size is 0.33 mm2. The current-reused technique was adopted in a Ku-band gm-boosted Coliptts VCO design, this technique reduces the amount of the current and then saves the power consumption. The obtained oscillation frequency is 12.2 GHz with a tuning range 1400 MHz at 1.9 V supply voltage. The power consumption is 1.0 mW. The measured phase noise at 1 MHz offset frequency is -107.1 dBc/Hz. The FOM is -188 dBc/Hz. The chip size is 0.308 mm2.
The second part developed ILFD designs. The amplitude-redistribution technique was applied to a Ku-band ILFD design, this technique increases the signal-noise-ratio of the transistors. The Ku-band amplitude-redistribution ILFD was implemented using tsmcTM 0.18 µm CMOS process. The obtained locking range is 11.7 ~ 14.4 GHz (20%) at 0 dBm input power and 1.0 V supply voltage. The power consumption is 3.4 mW. The FOM is 6.45 %/mW. The chip size is 0.5 mm2. The Ku-band injection-enhancement injection locked frequency divider. Using conventional ILFD for fundamental substrate, then series a PMOS transistor, the input signal increases at the same power consumption, the injection efficiency increases. The last Ku-band ILFD is used injection-enhancement technique and implemented in tsmcTM 0.18 µm CMOS process. The measured locking range is 11.0 ~ 14.3 GHz (26%) at 0 dBm input power and biased at 1.0 V supply voltage. The power consumption is 1.0 mW. The FOM is 26 %/ mW. The chip size is 0.473 mm2.
| en_US |
| DC.subject | 壓控振盪器 | zh_TW |
| DC.subject | 注入鎖定式除頻器 | zh_TW |
| DC.subject | Injection Locked Frequency Divider | en_US |
| DC.subject | Voltage Controlled Oscillator | en_US |
| DC.title | Ku/K頻段壓控振盪器與Ku頻段注入鎖定式除頻器之研製 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Implementations on Ku/K-Band Voltage Controlled Oscillators and Ku-Band Injection Locked Frequency Dividers | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |