DC 欄位 |
值 |
語言 |
DC.contributor | 電機工程學系 | zh_TW |
DC.creator | 周信宏 | zh_TW |
DC.creator | Sin-hong Chou | en_US |
dc.date.accessioned | 2010-7-22T07:39:07Z | |
dc.date.available | 2010-7-22T07:39:07Z | |
dc.date.issued | 2010 | |
dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=975201057 | |
dc.contributor.department | 電機工程學系 | zh_TW |
DC.description | 國立中央大學 | zh_TW |
DC.description | National Central University | en_US |
dc.description.abstract | 本篇論文所研究之單電洞電晶體,以FinFET技術為構想,利用二氧化矽作為奈米溝渠之側壁,不僅可以微縮奈米溝渠的寬度,而且利用氮化矽作為單電洞電晶體的穿隧位障。當奈米溝渠中的矽鍺經氧化在中心形成單一顆鍺量子點時,可以製作出具有對稱穿隧位障之鍺量子點單電洞電晶體。此元件在室溫下展現明顯的庫倫階梯與庫倫振盪的單電子特性。
| zh_TW |
dc.description.abstract | This thesis studies the fabrication and tunneling spectroscopy of Ge QD single hole transistors (SHTs) realized in FinFET technology. The Ge QD is generated by oxidizing a SiGe nanocavity, which is separated from the adjacent electrodes by Si3N4 spacers. Thermally oxidizing SiGe in the nanotrench produces single Ge QD in the center with symmetrical tunneling junctions of Ge QD SHTs. Such devices exhibit clear Coulomb oscillation and staircase in room temperature.
| en_US |
DC.subject | 利用氮化矽作為穿隧接面之鍺量子點單電洞電晶體 | zh_TW |
DC.subject | Ge QD SHT with Si3N4 tunnel junction | en_US |
DC.title | 利用氮化矽作為穿隧接面之鍺量子點單電洞電晶體之製作與特性分析 | zh_TW |
dc.language.iso | zh-TW | zh-TW |
DC.title | Fabrication and electrical characterization of Germanium QD Single Hole Transistor with Si3N4 tunnel junction | en_US |
DC.type | 博碩士論文 | zh_TW |
DC.type | thesis | en_US |
DC.publisher | National Central University | en_US |