| DC 欄位 |
值 |
語言 |
| DC.contributor | 通訊工程學系在職專班 | zh_TW |
| DC.creator | 蔡益昌 | zh_TW |
| DC.creator | Yi-Chang Tsai | en_US |
| dc.date.accessioned | 2015-1-20T07:39:07Z | |
| dc.date.available | 2015-1-20T07:39:07Z | |
| dc.date.issued | 2015 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:88/thesis/view_etd.asp?URN=975303017 | |
| dc.contributor.department | 通訊工程學系在職專班 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 電力線通訊(Power Line Communication, PLC)，是一種運用電力線通訊的方式。在本論文中，我們設計、實現及驗證電力線類比前級(AFE)耦合電路，並且運用此平台來驗證所有住家室內電力線的通道和估測等。此電力線通訊平台包括設計的類比前級(AFE)電路，搭配數位轉類比(DAC)與類比轉數位(ADC)開發板及FPGA 實驗板，參考HomePlug AV標準，使用軟體定義OFDM訊號偶合(Coupling)到住家牆壁上的電源插座(Electric Outlet)進行電力線訊號傳輸。我們也針對室內電力線通道的特有現象進行探討，包括了特殊雜訊以及通道變化等。 | zh_TW |
| dc.description.abstract | PLC (Power line Communication) is a communication technology using power line as the transmission medium. The research topic of this thesis is on the design implementation and verification of the Analogy Front End (AFE) for a software-defined PLC platform which is composed of Analogy Front End (AFE) circuit board, Digital Analog Converter (DAC) and Analog Digital Converter (ADC) development board and FPGA board. The effectiveness of the AFE is demonstrated by a transmission of a software-defined OFDM signal, which is derived by referring to the HomePlug AV standard, through the real indoor electric outlet power line. We also measure the indoor PLC channel′s response and investigate a particular phenomenon of powerline channel-special noise and channel variation using the composed software-defined PLC platform. | en_US |
| DC.subject | 類比前級 | zh_TW |
| DC.subject | 電力線通訊 | zh_TW |
| DC.subject | 正交分頻多工 | zh_TW |
| DC.subject | 現場可程式化閘陣列 | zh_TW |
| DC.subject | Analog Front End | en_US |
| DC.subject | PLC | en_US |
| DC.subject | OFDM | en_US |
| DC.subject | FPGA | en_US |
| DC.title | 軟體定義電力線通訊平台類比之前級硬體設計，實現與驗證 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Hardware Design, Implementation and Verification of the Analog Front-End for Software-Defined Power-Line Communications Platform | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |