| dc.description.abstract | Research on the stacked power amplifiers (PAs) and dual-gate PAs in microwave are presented in this dissertation. The stacked power amplifier circuits are designed using several heterojunction bipolar transistor (HBT) and high electron mobility transistor (HEMT) process. The analysis and simulation is agreed well with experimental results. By investigated the best combination of transistors in dual stacked power amplifier, the best stacked transistor of triple stacked power amplifiers is analyzed. Different stacked architectures (HEMT-HBT, HBT-HEMT, HBT-HBT, and HEMT-HEMT stacking architectures) are analyzed, and the optimal dual stacked architecture is analyzed to obtain larger output impedance, enhancement in the maximum output power, and broad bandwidth characteristics. The single-chip single-stage dual stacked power amplifier achieves an operating frequency from 3.5 to 6.5 GHz with a gain of more than 13 dB, an output 1-dB compression point (P1dB) of higher than 26.4 dBm, and an efficiency of up to 38%. Base on the architecture of the proposed dual stacked PA, the third-stacked transistor in the triple stacked PA is analyzed and realized with an enhancement of gain, bandwidth and output power performance. The single-chip single-stage triple-stacked power amplifier achieves an operating frequency from 3.1 to 5.8 GHz with a gain of more than 15 dB, a P1dB of higher than 29.5 dBm, and a maximum efficiency of up to 38.3%.
The dual-gate power amplifier is realized by a GaAs HEMT process. There are two gates between the drain and source terminal in one transistor. The channel is controlled by two gates in different operation mode. The equivalent model of dual-gate transistor is obtained from the small signal extraction. By using of the equivalent model and the design methodology of stacked PA, two dual-gate PAs are designed and realized. According to the design and analysis of dual-gate PA, two different architectures (depletion-depletion D-D mode, and enhancement-enhancement E-E mode) are realized. The dual-gate E-E mode PA exhibits a larger output P1dB, a good linearity and broad bandwidth characteristics. The single-chip single-stage dual-gate power amplifier achieves an operating frequency from 3.6 to 8 GHz with a gain of more than 12 dB, a P1dB greater than 26.8 dBm, and a maximum efficiency of up to 29.7%.
Dual stacked PAs, triple stacked PAs and dual-gate PAs are successfully designed and analyzed in this dissertation. The bandwidth characteristic is analyzed by the stacked transistor. According to the design methodology of the stacked PA, the dual-gate PAs are designed and analyzed with good linearity characteristic. It can be further utilized to the new generation wireless communication PA and modern mobile application due to its good circuit performance and the mass-production MMIC process. | en_US |