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姓名	陳政佑(Cheng-yu Chen)  查詢紙本館藏	畢業系所	電機工程學系
論文名稱	數位家庭無線資料傳輸系統之壓控振盪器設計與實現 (Design and Implementation of Voltage Controlled Oscillators for Wireless Data Transmission System in Digital Home)
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摘要(中)	射頻收發機中，壓控振盪器為一不可或缺的電路區塊，其功能在於提供系統穩定的訊號源，以對發射和接收信號進行升頻與降頻。壓控振盪器的重要性能參數包括頻率調整幅度、相位雜訊、直流功率消耗及射頻輸出功率等。 隨著電子科技的飛躍使數位化生活得以實現，在數位化家居生活的情境中，影音資料等多媒體內容傳輸是不可或缺的應用。近年來高畫質視訊傳輸的需求亦隨之興起，用於高畫質視訊無線傳輸的通訊標準也相繼制定，其中包括使用60 GHz頻段的WirelessHD及使用5 GHz ISM頻段的WHDI。在一般無線收發前端中，通常會使用兩個相位相差90°的射頻訊號來對基頻I與Q訊號進行調變及解調變；因此本論文首先探討一個60 GHz正交壓控振盪器，可產生無線前端所需之正交射頻訊號。本電路使用TSMC 90-nm CMOS製程實現，並採用傳統並聯式正交壓控振盪器的架構。當控制電壓由0 V調至1.2 V，振盪頻率可由60.61 GHz調至63.01 GHz，頻率調整幅度約為3.88%。於10-MHz offset之最佳相位雜訊與FoM分別為−89.61 dBc/Hz與−155.1 dBc/Hz。在頻率可調範圍內，輸出功率為−25.8±2 dBm，核心直流功耗小於11.1 mW；控制電壓為0.4 V時，最小相位及振幅誤差分別為3.25°/0.39 dB。 其次，在射頻前端子系統中，測試為數眾多的電路區塊是一件相當花費成本及時間的工作。如果各電路區塊本身具有即時監控及自我檢測的功能，可以大幅降低電路測試的時間及成本。於是我們將波包偵測器整合至一壓控振盪器內，藉著找出射頻輸出功率與偵測器輸出電壓之關係，來驗證此概念。操作頻段與使用製程分別為X頻段與TSMC 0.18-μm CMOS。電路使用LC-tank交錯耦合式振盪器架構；在1.8 V供應電壓下，當控制電壓由0 V調至1.8 V，振盪頻率可從9.25 GHz調至12.08 GHz，頻率調整幅度約為26.6%；此電路的最佳相位雜訊與FoM在1-MHz offset分別為−116.3 dBc/Hz與−182.7 dBc/Hz；在頻率可調範圍內，輸出功率為8±0.4 dBm，核心直流功耗小於17.37 mW；波包偵測器之輸出電壓約為60±20 mV。 我們成功地設計及實現一個可應用於數位家庭之60 GHz正交壓控振盪器；此外，我們整合一波包偵測器於壓控振盪器中，驗證其射頻輸出功率與偵測電壓之間的對應關係，期能應用於射頻內建自我測試。
摘要(英)	In RF transceivers, voltage controlled oscillator (VCO) is an indispensable circuit block. The function of a VCO is to provide a stable signal source for up-converting and down-converting the transmitted and received signals, respectively. Important metrics for VCO include frequency tuning range, phase noise, DC power consumption, and RF output power. The advance of electronic technology enables digital life. In digital-home scenario, the transmission of multimedia content with both video and audio is necessary. In recent years, the demand for high-definition (HD) video transmission has increased and the associated wireless standards are successively defined, including WirelessHD and WHDI, which use 60-GHz band and 5-GHz ISM band, respectively. For wireless transceivers, it is a common practice to use two RF signals whose phases are 90° in difference to modulate or demondulate the baseband I/Q signals. Therefore, we first develop a 60-GHz quadrature VCO (QVCO), which can provide the quadrature RF signals required in wireless front-ends. The circuit adopts traditional parallel-QVCO topology and is implemented using TSMC 90-nm CMOS techonology. The measured oscillation frequency can be tuned from 60.61 GHz to 63.01 GHz, which corresponds a frequency tuning range of 3.88%, as the control voltage is swept from 0 V to 1.2 V. At 10-MHz offset, the minimum phase noise and FoM are −89.61 dBc/Hz and −155.1 dBc/Hz, respectively. With the frequency tuning range, the output power is −25.8±2 dBm and DC power consumption of the VCO core is less than 11.1 mW. At control voltage is 0.4 V, the minimum phase and amplitude error are 3.25° and 0.39 dB, respectively. Next, in an RF system with numerous circuit blocks, the testing could be costly and time-consuming. To overcome this difficulty, the concept of built-in self test (BIST) can be applied. BIST would not only reduce the cost of testing but provide the capability of real-time monitoring. We design a VCO that has built-in envelope detectors integrated with it and demonstrate its potential for RF BIST by relating the output voltage of the detectors with the output power of the VCO. The VCO is designed and implemented in TSMC 0.18-μm CMOS. On 1.8-V supply, the measured oscillation frequency is from 9.25 GHz to 12.08 GHz, translating into a tuning range of 26.6%, as the control voltage is swept from 0 V to 1.8 V. At 1-MHz offset, the minimum phase noise and FoM are −116.3 dBc/Hz and −182.7 dBc/Hz, respectively. With the frequency tuning range, the output power is 8±0.4 dBm, the DC power consumption of the VCO core is less than 17.37 mW, and the detected output voltage is 60±20 mV. In this work, a 60-GHz QVCO for digital home application is designed and measured. In addition, a VCO with built-in envelop detector is designed and measured. The relation between its detector output voltage and output power is found, demonstrating its potential for RF BIST.
關鍵字(中)	★ 壓控振盪器 ★ 內建自我測試功能 ★ 正交壓控振盪器 ★ 數位家庭 ★ 射頻模組	關鍵字(英)	★ VCO ★ BIST ★ QVCO ★ Digital Home ★ RF module
論文目次	國 立 中 央 大 學 I 摘要 I Abstract III 第一章 緒論 1 1–1 研究動機 1 1–2 文獻回顧 3 1–3 論文架構 4 第二章 60 GHz正交壓控振盪器 5 2–1 簡介 5 2–1–1 正交相位輸出架構 8 2–1–2 正交相位輸出原理 12 2–2 振盪器電路之設計 14 2–3 振盪器電路之模擬與量測結果 18 2–3–1 量測方式介紹 21 2–3–2 模擬與量測結果比較 28 2–3–3 量測與重新模擬結果比較 34 2–4 結果與討論 39 第三章 內建波包偵測之X頻段壓控振盪器 41 3–1 壓控振盪器簡介 41 3–2 振盪器電路之設計原理 43 3–3 振盪器電路之模擬與量測結果 46 3–3–1 模擬與量測結果比較 48 3–3–2 量測與重新模擬結果比較 58 3–4 結果與討論 74 第四章 結論與未來展望 76 參考文獻 78
參考文獻	[1] W. Deng, T. Siriburanon, A. Musa, K. Okada, and A. Matsuzawa, “A 58.1-to-65.0 GHz frequency synthesizer with background calibration for millimeter-wave TDD transceivers,” European Solid-State Circuits Conf., 2012, pp. 201–204. [2] A. Moroni, R. Genesi, and D. Manstretta, “A distributed “Hybrid” wave oscillator array for millimeter-wave phased-arrays,” Custom Integrated Circuits Conf., 2012. [3] V. Vidojikovic et al., “A low-power 57-to-66 GHz transceiver in 40nm LP CMOS with −17 dB EVM at 7 Gb/s,” IEEE Int. Solid-State Circuits Conf., Feb. 2012, pp. 268–270. [4] H. Asada et al., “A 60 GHz 16 Gb/s 16QAM low-power direct-conversion transceiver using capacitive cross-coupling neutralization in 65 nm CMOS,” IEEE Asian Solid-State Circuits Conf., Nov. 2011, pp. 373–376.. [5] K. Okada et al., “A 60 GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE 802.15.3c,” IEEE Journal of Solid-State Circuits, vol. 46, no. 12, Dec. 2011. [6] B. Razavi, RF Microelectronics, Prentice Hall Inc., 1998. [7] A. Rofougaran, J. Rael, M. Rofougaran, and A. Abidi, “A 900 MHz CMOS LC-oscillator with quadrature outputs,” IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 1996, pp. 392–393. [8] A. Rofougaran, J. Rael, M. Rofougaran, and A. Abidi, “Design issues in CMOS differential LC oscillators,” IEEE Journal of Solid-State Circuits, vol 34, no. 5, pp. 717–724, May 1999. [9] G. Gonzalez, Microwave Transistor Amplifiers Analysis and Design, Prentice Hall Inc., 1997. [10] Z. Gu, B. Bartsch, A. Thiede, R. Tao, and Z.-G. Wang, “Fully integrated 10 GHz CMOS LC VCOs,” European Microwave Conference, Oct. 2003, pp. 583–586. [11] T.-Y. Choi, H. Lee, Linda P. B. Katehi, and S. Mohammadi “A low phase noise 10 GHz VCO in 0.18μm CMOS,” European Microwave Conference, Oct. 2005, pp. 273–276. [12] C.-Y. Yang, C.-H. Chang, J.-M. Lin, and J.-H. Weng, “A 0.6 V 10 GHz CMOS VCO using a negative-Gm back-gate tuned technique,” Microw. Wireless Compon. Lett., pp. 163–165, Mar. 2011. [13] W. D. Cock and M. Steyaert, “A CMOS 10GHz voltage controlled LC-oscillator with integrated high-Q inductor,” 27th European Solid-State Circuits Conference, Sept. 2001, pp. 498–501. [14] R. Aparicio and A. Hajimiri, “A noise-shifting differential colpitts VCO,” IEEE Journal of Solid-State Circuits, vol 37, no. 12, pp. 1728–1736, Dec. 2002. [15] X. Li, S. Shekhar and D. J. Allstot, , “Low-power gm-boosted LNA and VCO circuit in 0.18 μm CMOS,” IEEE Journal of Solid-State Circuits, vol 40, no. 12, pp. 2609–2619, Dec. 2005. [16] “Optimization of quadrature modulator performance,” Technical Note and Articles, RF Micro Devices Inc.. [17] B. Parvais, K. Scheir, V. Vidojikovic, R. Vandebriel, G. Vandersteen, C. Soens, and P. Wambacq “A 40 nm LP CMOS PLL for high–speed mm–wave communication,” Compound Semiconductor Integrated Circuit Symposium, 2010. [18] A. Barghouthi, A. Krause, C. Carta, and F. Ellinger, “Design and characterization of a V-Band quadrature VCO based on a common-collector SiGe Colpitts VCO,” Compound Semiconductor Integrated Circuit Symposium, 2010. [19] K. Scheir, G. Vandersteen, Y. Rolain, and P. Wambacq, “A 57-to-66GHz quadrature PLL in 45nm digital CMOS,” IEEE Int. Solid-State Circuits Conf., Feb. 2009, pp. 494–496. [20] F. Ellinger, U. Jörges, and S. Hauptmann, “Small signal analysis of quadrature LC oscillator operating at 59–62.5 GHz,” Institution of Engineering and Technology, 2009. [21] P. Sakian, E. Heijden, H. M. Cheema, R. Mahmoudi, and A. V. Roermund, “A 57–63 GHz quadrature VCO in CMOS 65 nm,” 4th European Microwave Int. Circuits Conf., 2009. [22] I. R. Chamas, S. Raman “Design of CMOS millimeter-wave cross–coupled LC quadrature VCOs with varactorless frequency tuning,” Silicon Monolithic Integrated Circuits in RF Systems, 2008. [23] U. Decanis, A. Ghilioni, E. Monaco, A. Mazzanti, and F. Svelto, “A low-noise quadrature VCO based on magnetically coupled resonators and a wideband frequency divider at millimeter waves,” IEEE Journal of Solid-State Circuits, vol. 46, no. 12, Dec. 2011. [24] P. Andreani, “A 2 GHz, 17% tuning rage quadrature CMOS VCO with high figure-of-merit and 0.6∘phase error,” IEEE European Solid-State Circuits Conf., 2002, pp. 815–818. [25] W.-Z. Chen, C.-L. Kuo, and C.-C. Liu, “10 GHz quadrature-phase voltage controlled oscillator and prescaler,” IEEE European Solid-State Circuits Conf., 2003, pp. 361–364. [26] Adel S. Sedra and Kenneth C. Smith, Microelectronic Circuits, Oxford, New York, pp. 1112–1113, 1998. [27] F. Maloberti and M. Signorelli, “Quadrature waveform generator with enhanced performance,” VLSI Circuits Dig. of Tech. Symposium, pp. 56–57, 1998. [28] A. Rofougaran et al., “A single-chip 900-MHz spread-spectrum wireless transceiver in 1-μm CMOS–part I: Architecture and transmitter design,” IEEE Journal of Solid-State Circuits, vol. 33, no. 4, Apr. 1998. [29] H.-Y. Chang, and Y.-T. Chiu, “K-band CMOS differential and quadrature voltage-controlled oscillators for low phase-noise and low-power application,” IEEE transactions on microwave theory and techniques, vol. 60, no. 1, Jan. 2012. [30] Y.-C. Chang, Y.-C. Chiu, S.-G. Lin, Y.-Z. Juang, and H.-K. Chiou, “High phase accuracy on-wafer measurement for quadrature voltage-controlled oscillator,” European Microwave Conference, Oct. 2007, pp. 340–343. [31] C.-A. Lin, J.-L. Kuo, K.-Y. Lin, and H. Wang, “A 24 GHz low power VCO with transformer feedback,” IEEE RFIC Symp. Dig., pp. 75–78, Boston, Jun. 2009. [32] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, pp. 179-194, Feb. 1998. [33] L. Dai and R. Harjani, “Design of high-performance CMOS voltage-controlled oscillators,” Kluwer Academic Publishers, 2003. [34] J. Kim, J. O. Plouchart, N. Zamdmer, R. Trzcinski, K. Wu, B. J. Gross, and M. Kim, “A 44 GHz differentially tuned VCO with 4 GHz tuning range in 0.12 μm SOI CMOS,” IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2005, pp. 416–417. [35] I. Nasr, M. Dudek, R. Weigel, and D. Kissinger, “A 33% tuning range high output power V-band superharmonic coupled quadrature VCO in SiGe technology,” Radio Frequency Integrated Circuits Symposium, Jun. 2012, pp. 301–304. [36] R. Banin, O. Degani, and E. Socher, “V-band low phase noise QVCO in 90nm CMOS technology using a gate-connected tank,” 16th Electronics Letters, vol. 48, no. 17, Aug. 2012. [37] L. Wu and H.-C. Luong, “A 49-to-62 GHz CMOS quadrature VCO with bimodal enhanced magnetic tuning,” European Solid-State Circuits Conf., 2012, pp. 297–300. [38] G. Mangraviti et al., “A 52–66 GHz subharmonically injection-locked quadrature oscillator with 10 GHz locking range in 40 nm LP CMOS,” Radio Frequency Integrated Circuits Symposium, Jun. 2012, pp. 309–312. [39] S. Rong and H.-C. Luong, “Design and analysis of varactor-less interpolative- phase-tuning millimeter-wave LC oscillators with multiphase outputs,” IEEE Journal of Solid-State Circuits, vol. 46, no. 8, Aug. 2011. [40] H. M. Cheema, R. Mahmoudi, and A. V. Roermund, “On the importance of chip-level EM-simulations for 60-GHz CMOS circuits,” 5th European Microwave Int. Circuits Conf., 2009. [41] W.-L. Chan and J.-R. Long, “A 56-65 GHz injection-locked frequency tripler with quadrature outputs in 90-nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 43, no. 12, Dec. 2008. [42] C.-H. Lin, “Research on injection-locking nonlinear monolithic microwave integrated circuits,” Ph.D. dissertation, National Central University, 2012. [43] C.-H. Lu, “Design and analysis of microwave and millimeter-wave low phase noise signal source integrated circuits using injection-locked technique,” Master dissertation, National Central University, 2013. [44] N. Billstrom, H. Berg, K. Gabrielson, E. Hemmendorff, and M. Hertz, “T/R "core chips" for S-, C- and, X-band radar systems,” 34th European Microwave Conference, vol. 2, Oct. 2004, pp.1029–1032. [45] S. Wang, K.-H. Tsai, K.-K. Huang, S.-X Li, H.-S. Wu, and C.-K. C. Tzuang, “Design of X-band RF CMOS transceiver for FMCW monopulse radar,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 1, pp. 61–70, Jan. 2009. [46] H. Greinacher, “The ionometer and its application to the measurement of radium and röntgen rays,” Physikalische Zeitschrift, vol. 15, pp. 410–415, 1914. [47] O. Inac, D. Shin, and G. M.Rebeiz, “A phased array RFIC with built-in self-test capabilities,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 1, pp.139–148, Jan. 2012. [48] M. A. Do, R. Zhao, K. S. Yeo and J.-G. Ma, “Fully integrated 10 GHz CMOS VCO,” Electronics Letters, vol. 37, no. 16, pp. 1021–1023, Aug. 2001. [49] M.-T. Hsu and C.-T. Chiu, “A low power 10 GHz current reused VCO using negative resistance enhancement technique,” Asia Pacific Microwave Conference, pp. 2276–2279, 2009. [50] M.-T. Hsu and W.-H. Lin, “A low power 10 GHz voltage-controlled oscillator,” Asia Pacific Microwave Conference, pp. 578–581, 2010. [51] J. Lin, J.-G. Ma, K. S. Yeo and M. A. Do, “9.3–10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 4, pp. 1273–1278, Apr. 2004. [52] B. Park, S. Lee, S. Choi and S. Hong, “A 12-GHz fully integrated cascade CMOS LC VCO with Q-enhancement circuit,” Microw. Wireless Compon. Lett., vol. 52, no. 4, pp. 1273–1278, Apr. 2004. [53] U. Karthaus and M. Fischer, “Fully integrated passive UHF RFID transponder IC with 16.7 uW minimum RF input power,” IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1602–1608, Oct. 2003. [54] H. Jacobssson, M. Bao, L. Aspemyr, A. Mercha, and G. Chrchon, “Low phase noise sub-1 V supply 12 and 18 GHz VCOs in 90 nm CMOS,” IEEE MTT-S Int. Microw. Symp. Dig., June 2006, pp. 573–576. [55] T.-P. Wang and C.-C. Li, “A 0.4-V 1.08-mW 12-GHz high-performamce VCO in 0.18-μm CMOS,” Radio and Wireless Symposium, Jan. 2012, pp. 207–210. [56] Y.-H. Liao, “Microwave and millimeter-wave broadband oscillator and phase-locked loop,” Master dissertation, National Central University, 2013.
指導教授	傅家相(Jia-shiang Fu)	審核日期	2013-10-16
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