博碩士論文 100581009 詳細資訊




以作者查詢圖書館館藏 以作者查詢臺灣博碩士 以作者查詢全國書目 勘誤回報 、線上人數:39 、訪客IP:3.145.184.162
姓名 王慶奇(Ching-Chi Wang)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 應用於熱電元件之矽鍺奈米結構開發研究
(SiGe Nanostructures for Thermoelectric Microcooler Applications)
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摘要(中) 本論文主題在於製備與探討矽鍺奈米結構(如量子點和奈米線)及其相關熱電元件。
矽鍺半導體材料應用於熱電應用之最大的優勢是與目前積體電路製程技術的高度相容性。本論文利用選擇性氧化矽鍺位於含矽材料之上的技術來製備可定位、定量以及可調變尺寸的三維鍺量子點陣列,並探討其光學與熱電特性。在高溫氧化矽鍺形成鍺量子點過程中,實驗觀察到在過長的氧化時間下,鍺量子點在穿越過氮化矽層,進入矽基板時會發生類似爆炸的行為,整顆量子點分散成了雲霧般的鍺團。我們提出了模型來解釋,當鍺量子點在氧化期間進入含矽層時,含矽層所釋出的矽原子流量的多寡對於掌控鍺量子點的幾何型態有重要的影響。此發現輔助了我們對鍺量子點定位和定量掌控性的認識。在光學特性部分,我們由光激發螢光譜分析觀察到鍺量子點擁有準能隙特性,且光譜上的波峰能量隨鍺量子點尺寸縮小而有藍移的現象,此歸因於量子侷限效應。熱傳導係數量測實驗發現藉由量子侷限效應,對於鍺量子點崁入二氧化矽之薄膜而言,由於奈米結構的表面聲子散射以及矽鍺本身的合金散射有效地拖曳了聲子的傳輸,使熱傳導係數大幅下降,而且此熱傳導降低的現象與鍺量子點的尺寸與反比關係。
我們亦研究開發矽鍺奈米柱狀結構,並特討其熱電性質。實驗觀察到鍺莫耳比12-36%的矽鍺奈米柱的的熱傳導係數約在0.8-2 W/m•K,且隨著鍺濃度的提升而有下降的趨勢。在電傳導係數方面,不論是N-type和P-type矽鍺奈米柱皆隨著鍺濃度的增加而上升,此歸因於等效質量的降低因而增強載子遷移率。由此可見,矽奈米柱加入鍺確實可以分別調整聲子與載子的傳輸表現。
在矽鍺奈米柱致冷元件中,我們使用矽鍺化鎳奈米線做為矽鍺奈米柱的底部電連結。由於熱電致冷元件在運作時,常需注入高電流或高偏壓,因此我們需詳加了解矽鍺化鎳奈米矽線的電連結在高電流或是高電壓的操作條件下的熱穩定性。為了瞭解矽鍺化鎳奈米線的電氣特性,首要之務是其晶相的控制。因此,我們先對不同幾何大小矽奈米線的鎳化反應進行探討。實驗發現矽化鎳奈米線的晶體相位、幾何體積膨脹以及電阻率與矽奈米線的幾何尺寸有著緊密的關係。在鎳化反應溫度為500oC的條件下,矽奈米線寬度範圍為250-450 nm之間,其矽化鎳相位為NiSi,所對應的電阻值約為12.5 -cm;但是當矽奈米線寬度範圍微縮至40-100 nm時,其矽化鎳相位則轉換為Ni2Si,電阻值上升至30 -cm。矽化鎳如此的相位產生有別於塊材矽薄膜層反應受反應溫度控制而統一形成NiSi。我們提出一新穎的塑性形變機制來解釋之。
利用電子束微影技術與電漿蝕刻實作出矽鍺奈米柱陣列(柱子寬度約250 nm/高度約1000 nm)。藉由調變不同的柱子陣列面積(17×12 μm^2、37×32 μm^2與56×52 μm^2)以及矽鍺柱子之鍺濃度(0%與24%),我們系統性的探討柱子陣列面積和鍺濃度對熱電致冷元件的致冷能力的影響。以柱子陣列尺寸面積37×32 μm2以及鍺濃度為24%矽鍺奈米柱致冷元件為例,在環境溫度為90oC的條件下,其致冷溫度可達到15oC,而致冷效率為1.36 oC/μA。
摘要(英)
This thesis concerns the fabrication and characterization of SiGe nanostructures (such as quantum dots (QDs) and nanowires (NWs)) as well as related thermoelectric devices.
For thermoelectric application, the major advantage of SiGe-based material is the compatibility to prevailing complementary metal-oxide-semiconductor (CMOS) integrated circuits (IC) technology. We propose thermally oxidizing SiGe on Si-containing layer, for generating precise numbering, placing and size-tunable Ge QD array, and study their optical and thermoelectric properties in this thesis. Interestingly, unique ‘explosive’ behavior of Ge QDs through Si3N4 layers into the underlying Si substrate is observed during high-temperature oxidation for a long time; the QDs regress almost to their origins as individual Ge nuclei are formed during the oxidation of the original nanopatterned SiGe structures that were used for their generation. A kinetic model is proposed to explain the anomalous migration behavior and morphological changes of the Ge QDs, based on the Si flux that is generated during the oxidation of Si-containing layers. This finding enhances control over the location and quantity of Ge QDs. Moreover, we observed the transition energy of Ge QD appears to have a systematic blue-shift with a decrease in Ge QD size, indicating the transition of Ge from indirect to direct band-gap materials, thanks to quantum confinement effects. The temperature-dependent thermal conductivity of the Ge QD array is systematically investigated. The experimental results appear to reveal an inverse dependence of the thermal conductivity of Ge QDs on dot size in a SiO2 system. Clearly, surface/boundary scattering of nanostructures and alloy scattering cause phonon drag and considerably reduce thermal conductivity, owing to quantum confinement.
The thermoelectric properties of Si1-xGex nanopillars were systematically investigated. The thermal conductivities of Si1-xGex nanopillars with Ge mole fractions of 0.12-0.36 are between 0.8 and 2 W/m•K, and depend inversely on Ge content. An increase in the Ge content significantly increases the electrical conductivity of both N- and P-type Si1-xGex NWs, because of a reduction in the effective mass and, therefore, an increase in carrier mobility. The inclusion of Ge into the nanopillar structures can support the decoupling of the resistances to phonon and charge transport.
NiSi1-xGex nanocontacts are used to connect pairs of N- and P-type pillars at the bottom of each in the Si1-xGex microcooler. Therefore, obtaining a detailed understanding of the thermal stability, electrical property and phase formation of NiSi1-xGex NWs is important due to the injected high current and voltage in Si1-xGex microcoolers. The experimental finding suggests the geometry of Si NWs is key factor to affect the phase, volumetric expansion and electrical resistivity of the NixSiy NWs. The phase transition from NiSi with large NWs (WSi NW = 250-450 nm) to Ni2Si with small NWs (WSi NW = 40-100 nm) is closely correlated associated with the observed variation in electrical resistivity with NW width after silicidation at 500oC, and the resistivities of the various NixSiy phases are NiSi - 12.5 -cm and Ni2Si - 30 -cm. Interestingly, an Ni-rich phase of the NixSiy NWs is formed, in sharp contrast to the formation of nickel monosilicide for the NiSi film. A new, plastic deformation mechanism is proposed to explain it.
Electron-beam lithography and plasma etching were used to generate SiGe nanopillars with a diameter of 250 nm and a height of 1000 nm. Then, the Si1-xGex (x = 0 and 0.24) P/N-pair nanopillar arrays with sizes of 17×12 μm^2, 37×32 μm^2, and 56×52 μm^2 for use in thermoelectric microcoolers is developed. The effects of Ge content and the size of the array of SiGe nanopillars on cooling capability are systematically studied. An array of Si0.76Ge0.24 nanopillars with an area of 37×32 µm^2 exhibits a cooling efficiency as high as 1.36oC/μA at 90oC, such that cooling by more than 15oC is achieved at 90oC.
關鍵字(中) ★ 量子點
★ 奈米線
★ 矽鎳化物
★ 熱電效應
★ 微致冷器
★ 矽鍺合金
關鍵字(英) ★ quantum dot
★ nanowire
★ NiSi
★ thermoelectric
★ microcooler
★ SiGe
論文目次
Table of Contents
摘要  i
Abstract  iii
致謝  v
Table of Contents  vi
List of Figures  viii
List of Tables  xiv
Chapter 1 SiGe Nano-structure for Thermoelectric Applications  1
1-1 Introduction to thermoelectrics  1
1-2 Material selection for thermoelectrics  3
1-3 SiGe-based nanostructures in thermoelectric materials  4
1-4 Organization of thesis  5
Chapter 2 Ge crystal QD structure – analysis of thermoelectric characteristics of zero-dimensional QD structure  11
2-1 Introduction  11
2-2 Formation of Ge QD structure by thermally oxidizing poly-SiGe alloy 12
2-3 Exploding Ge QD - migration and growth behaviors of Ge under Si oxidation  17
2-4 Dependence of PL emission peak energy on QD size  22
2-5 Tremendous reduction in thermal conductivity of Ge QDs/SiO2 system 23
2-6 Summary  27
Chapter 3 Poly-SiGe nanowire structure – analysis of thermoelectric characteristics of one-dimensional nanowire structure  38
3-1 Introduction  38
3-2 Fabrication of poly-SiGe nanowire structure  39
3-3 Effects of alloy and dopant on thermal conductivity of poly-SiGe nanopillar array  40
3-4 High electrical conductivity of poly-SiGe nanowire array  43
3-5 Summary  44
Chapter 4 Formation and properties of nickel-silicide nanowire  52
4-1 Introduction  52
4-2 Fabrication of nickel-silicide nanowires  53
4-3 Geometry-dependent phase and stress state in nickel-silicide nanowires 54
4-4 Electrical properties of nickel-silicide nanowires  58
4-5 Summary  59
Chapter 5 Thermoelectric coolers based on poly-SiGe nanopillar arrays 72
5-1 Introduction  72
5-2 Fabrication of dense N/P-type poly-SiGe nanopillar cooler  73
5-3 Thermoelectric characterization and discussion  75
5-4 Summary  77
Chapter 6 Conclusion and future work  86
6-1 Conclusion  86
6-2 Future work  88
References  90
Curriculum Vitae  101
Publication List  102
參考文獻

References
[1] Lon E. Bell, “Cooling, heating, generating power, and recovering waste heat with thermoelectric systems,” Science, 321, 1457, 2008.
[2] D. K. C. MacDonald, “Thermoelectricity: an introduction to the principles,” New York: Wiley, 1962.
[3] A. F. Ioffe, “Semiconductor thermoelements and thermoelectric cooling”, Infosearch, 1957.
[4] D. M. Rowe and Gao Min, “Evaluation of thermoelectric modules for power generation,” Journal of Power Sources, 73, 193, 1998.
[5] M. Strasser, R. Aigner, C. Lauterbach, T. F. Sturm, M. Franosch, and G. Wachutka, ”Micromachined CMOS thermoelectric generators as on-chip power supply,” Sensors and Actuators A, 114, 362, 2004.
[6] H. J. Goldsmid and R. W. Douglas, “The use of semiconductors in thermoelectric refrigeration,” Journal of Applied Physics, 5, 386, 1954.
[7] G. Min and D. M. Rowe, “Cooling performance of integrated thermoelectric microcooler,” Solid-State Electronics, 43, 923, 1999.
[8] H. J. Goldsmid, “thermoelectric refrigeration,” New York: Plenum Press, 1964.
[9] J. Snyder, Thermoelectrics, http://thermoelectrics.matsci.northwestern.edu/thermoelectrics/index.html.
[10] D. M. Rowe, “CRC Handbook on Thermoelectrics,” CRC Press, 1995.
[11] F. Völklein, H. Reith, T. W. Cornelius, M. Rauber, and R. Neumann, “The experimental investigation of thermal conductivity and the Wiedemann-Franz law for single metallic nanowires,” Nanotechnology, 20, 325706, 2009.
[12] C. Kittel, “Introduction to solid state physics,” Hoboken NJ: Wiley, 2005.
[13] G. Slack, “Handbook of Thermoelectrics,” ed. D. M. Rowe, Boca Raton: CRC Press, 1995.
[14] A. J. Minnich, M. S. Dresselhaus, Z. F. Ren, and G. Chen, “Bulk nanostructured thermoelectric materials: current research and future prospects,” Energy and Environmental Science, 2, 466, 2009.
[15] H. J. Goldsmid and R. W. Douglas, “The use of semiconductors in thermoelectric refrigeration,” British Journal of Applied Physics, 5, 386, 1954.
[16] H. J. Goldsmid, A. R. Sheard, and D. A. Wright, “The performance of bismuth telluride thermojunctions,” British Journal of Applied Physics, 9 , 365, 1958.
[17] C. J. Vineis, Ali Shakouri , A. Majumdar, and M. G. Kanatzidis, “Nanostructured thermoelectrics: big efficiency gains from small features,” Advanced Materials, 22, 3970, 2010.
[18] L. D. Hicks and M. S. Dresselhaus, “Thermoelectric figure of merit of a one dimensional conductor,” Physical Review B, 47, 16631, 1993.
[19] L. D. Hicks and M. S. Dresselhaus, “Effect of quantum-well structures on the thermoelectric figure of merit,” Physical Review B, 47, 12727, 1993.
[20] C. J. Glassbrenner and Glen A. Slack, “Thermal conductivity of silicon and germanium from 3oK to the melting point,” Physical Review, 134, A1058, 1964.
[21] P. D. Maycock, “Thermal conductivity of silicon, germanium, III-V compounds and III-V alloys,” Solid-State Electronics, 10, 161, 1967.
[22] H. T. Chang, C. C. Wang, J. C. Hsu, M. T. Hung, P. W. Li, and S. W. Lee, “High quality multifold Ge/Si/Ge composite quantum dots for thermoelectric materials,” Applied Physics Letters, 102, 101902, 2013.
[23] A. Samarelli, L. Ferre Llin, S. Cecchi, J. Frigerio, T. Etzelstorfer, E. Muller, Y. Zhang, J. R. Watling, D. Chrastina, G. Isella, J. Stangl, J. P. Hague, J. M. R. Weaver, P. Dobson, and D. J. Paul, “The thermoelectric properties of Ge/SiGe modulation doped superlattices”, Journal of Applied Physics, 113, 233704, 2013.
[24] B. Yang, J. L. Liu, K. L. Wang, and G. Chen, “Simultaneous measurements of Seebeck coefficient and thermal conductivity across superlattice,” Applied Physics Letters, 80, 1758, 2002.
[25] B. Yang, W. L. Liu, J. L. Liu, K. L. Wang, and G. Chen, “Measurements of anisotropic thermoelectric properties in superlattices,” Applied Physics Letters, 81, 3588, 2002.
[26] S. T. Huxtable, A. R. Abramson, C. L. Tien, A. Majumdar, C. LaBounty, X. f. Fan, G. Zeng, J. E. Bowers, Ali Shakouri, and E. T. Croke, “Thermal conductivity of Si/SiGe and SiGe/SiGe superlattices,” Applied Physics Letters, 80, 1737, 2002.
[27] T. Borca-Tasciuc, W. Liu, J. Liu, T. Zeng, D. W. Song, C. D. Moore, G. Chen, K. L. Wang, M. S. Goorsky, T. Radetic, R. Gronsky, T. Koga, and M. S. Dresselhaus, “Thermal conductivity of symmetrically strained Si/Ge superlattices,” Superlattices Microstructures, 28, 199, 2000.
[28] S. M. Lee, D. G. Cahill, and R. Venkatasubramanian, “Thermal conductivity of Si–Ge superlattices,” Applied Physics Letters, 70, 2957, 1997.
[29] Z. Li, Q. Sun, X. D. Yao, Z. H. Zhu, and G. Q. Lu, “Semiconductor nanowires for thermoelectrics,” Journal of Materials Chemistry, 22, 22821, 2012.
[30] E. K. Lee, L. Yin, Y. Lee, J. W. Lee, S. J. Lee, J. Lee, S. N. Cha, D. Whang, G. S. Hwang, K. Hippalgaonkar, A. Majumdar, C. Yu, B. L. Choi, J. M. Kim, and K. Kim, “Large thermoelectric figure-of-merits from SiGe nanowires by simultaneously measuring electrical and thermal transport properties,” Nano Letters, 12, 2918-2923, 2012.
[31] J. Lim, K. Hippalgaonkar, S. C. Andrews, A. Majumdar, and P. Yang, “Quantifying surface roughness effects on phonon transport in silicon nanowires,” Nano Letters, 12, 2475, 2012.
[32] J. A. Martinez, Paula P. Provencio, S. T. Picraux, John P. Sullivan, and B. S. Swartzentruber, “Enhanced thermoelectric figure of merit in SiGe alloy nanowires by boundary and hole-phonon scattering,” Journal of Applied Physics, 110, 074317, 2011.
[33] M. C. Wingert, Z. C. Chen, E. Dechaumphai, J. Moon, J. H. Kim, J. Xiang, and R. Chen, “Thermal conductivity of Ge and Ge−Si core−shell nanowires in the phonon confinement regime,” Nano Letters, 11, 5507, 2011.
[34] Y. H. Park, J. Kim, H. Kim, I. Kim, K. Y. Lee, D. Seo, H. J. Choi, and W. Kim, “Thermal conductivity of VLS-grown rough Si nanowires with various surface roughnesses and diameters,” Applied Physics A, 104, 7, 2011.
[35] D. Donadio and G. Galli, “Temperature Dependence of the Thermal Conductivity of Thin Silicon Nanowires,” Nano Letters, 10, 847, 2010.
[36] H. J. Kim, I. Kim, H. J. Choi, and W. C. Kim, “Thermal conductivities of Si1−xGex nanowires with different germanium concentrations and diameters,” Applied Physics Letters, 96, 233106, 2010.
[37] Z. Wang and N. Mingo, “Diameter dependence of SiGe nanowire thermal conductivity,” Applied Physics Letters, 97, 101903, 2010.
[38] P. Martin, Z. Aksamija, E. Pop, and U. Ravaioli, “Impact of Phonon-Surface Roughness Scattering on Thermal Conductivity of Thin Si Nanowires,” Physical Review Letters, 102, 12, 2009.
[39] A. I. Hochbaum, R. Chen, R. D. Delgado, W. Liang, E. C. Garnett, M. Najarian, A. Majumdar, and P. Yang, “Enhanced thermoelectric performance of rough silicon nanowires,” Nature, 451, 163, 2008.
[40] A. I. Boukai1, Y. Bunimovich, J. Tahir-Kheli, J. K. Yu, W. A. Goddard, and J. R. Heath, “Silicon nanowires as efficient thermoelectric materials”, Nature, 451,168, 2008.
[41] D. Li, Y. Wu, P. Kim, L. Shi, P. Yang, and A. Majumdar, “Thermal conductivity of individual silicon nanowires,” Applied Physics Letters, 83, 2934, 2003.
[42] J. Zou and A. Balandian, “Phonon heat conduction in a semiconductor nanowire,” Journal of Applied Physics, 89, 2932, 2001.
[43] T. Yi, S. Chen, S. Li, H. Yang, S. Bux, Z. Bian, N. A. Katcho, A. Shakouri, N. Mingo, J. P. Fleurial, N. D. Browningc, and S. M. Kauzlarich, “Synthesis and characterization of Mg2Si/Si nanocomposites prepared from MgH2 and silicon, and their thermoelectric properties,” Journal of Materials Chemistry, 22, 24805, 2012.
[44] J. E. Chang, P. H. Liao, C. Y. Chien, J. C. Hsu, M. T. Hung, H. T. Chang, S. W. Lee, W. Y. Chen, T. M. Hsu, T. George, and P W Li, “Matrix and quantum confinement effects on optical and thermal properties of Ge quantum dots,” Journal of Physics D: Applied Physics, 45,105303, 2012.
[45] P. E. Hopkins, J. C. Duda, C. W. Petz, and J. A. Floro, “Controlling thermal conductance through quantum dot roughening at interfaces,” Physical Review B, 84, 035438, 2011.
[46] N. Mingo, D. Hauser, N. P. Kobayashi, M. Plissonnier, and A. Shakour, ““Nanoparticle-in-Alloy” approach to efficient thermoelectrics: silicides in SiGe,” Nano Letters, 9, 711, 2009.
[47] X. W. Wang, H. Lee, Y. C. Lan, G. H. Zhu, G. Joshi, D. Z. Wang, J. Yang, A. J. Muto, M. Y. Tang, J. Klatsky, S. Song, M. S. Dresselhaus, G. Chen, and Z. F. Ren, ”Enhanced thermoelectric figure of merit in nanostructured n-type silicon germanium bulk alloy,” Applied Physics Letters, 93, 193121, 2008.
[48] W. Kim and A. J. Majumdar, “Phonon scattering cross section of polydispersed spherical nanoparticles,” Journal of Applied Physics, 99, 084306, 2006.
[49] J. L. Liu, A. Khitun, K. L. Wang, W. L. Liu, G. Chen, Q. H. Xie, and S. G. Thomas, “Cross-plane thermal conductivity of self-assembled Ge quantum dot superlattices,” Physical Review B, 67, 165333, 2003.
[50] K. H. Chen, C. Y. Chien, W. T. Lai, T. George, A. Scherer, and P. W. Li, “Controlled heterogeneous nucleation and growth of germanium quantum dots on nano-patterned silicon dioxide and silicon nitride substrates,” Journal of Crystal Growth & Design, 11, 3222, 2011.
[51] C. Y. Chien, Y. J. Chang, K. H. Chen, W. T. Lai, T. George, A. Scherer, and P. W. Li, “Nanoscale, catalytically-enhanced local oxidation of silicon-containing layers by “burrowing” Ge quantum dots,” Nanotechnology, 22, 435602, 2011.
[52] C. Y. Chien, Y. R. Chang, R. N. Chang, M. S. Lee, W. Y. Chen, T. M. Hsu, and P. W. Li, “Formation of Ge quantum dots array in layer-cake technique for advanced photovolatics,” Nanotechnology, 21, 505201, 2010.
[53] W. T. Lai and P. W. Li, “Growth kinetics and related physical/electrical properties of Ge quantum-dots formed by thermal oxidation of Si1-xGex-on-insulator,” Nanotechnology, 18, 145402, 2007.
[54] P. W. Li, W. M. Liao, S. W. Lin, P. S. Chen, S. C. Lu, and M. J. Tsai, “Formation of atomic-scale germanium quantum dots by selective oxidation of SiGe/Si-on-insulator,” Applied Physics Letters, 83, 4628, 2003.
[55] M. Saitoh, H. Harata, and T. Hiramoto, “Room-temperature demonstration of integrated silicon single-electron transistor circuit for current switching and analog pattern matching,” IEEE International Electron Device Meeting Technical Digest, 187, 2004.
[56] O. Astafiev, K. Inomata, A. O. Niskanen, T. Yamamoto, Y. A. Pashkin, Y. Nakamura, and J. S. Tsai, “Single artificial-atom lasing,” Nature, 449, 588, 2007.
[57] L. Robledo, J. Elzerman, G. Jundt, M. Atature, A. Hogele, S. Falt, and A. Imamoglu, “Quantum computing with electron spins in quantum dots,” Science, 320, 772, 2008.
[58] V. Aroutiounian, S. Petrosyan, A. Khachatryan, and K. Touryan, “Quantum dot solar cells,” Journal of Applied Physics, 89, 2268, 2001.
[59] M. A. Green, “Third generation photovoltaics: solar cells for 2020 and beyond,” Physica E, 14, 65, 2002.
[60] T. Harman, P. Taylor, M. Walsh, and B. LaForge, “Quantum dot superlattice thermoelectric materials and devices,” Science, 297, 2229, 2002.
[61] D. M. T. Kuo and Y. C. Chang, “Thermoelectric and thermal rectification properties of quantum dot junctions,” Physical Review B, 81, 205321, 2010.
[62] Y. Maeda, “Visible photoluminescence from nanocrystallite Ge embedded in a glassy SiO2 matrix: Evidence in support of the quantum-confinement mechanism,” Physical Review B, 51, 1658, 1995.
[63] W. Ostwald, “Lehrbuch der Allgemeinen Chemie,” Leipzig: Engelmann, 2, part 1, 1896.
[64] L. Ratke, P. W. Voorhees, “Growth and Coarsening: Ostwald Ripening in Material Processing,” Heidelberg: Springer press, 2002.
[65] S. T. Dunham and J. D. Plummer, “Point‐defect generation during oxidation of silicon in dry oxygen.I. Theory,” Journal of Applied Physics, 59, 2541, 1986.
[66] S. T. Dunham, “Interstitial kinetics near oxidizing silicon interfaces,” Journal of The Electrochemical Society, 136, 250, 1989.
[67] M. Uematsu, H. Kageshima, and K. Shiraishi, “Microscopic mechanism of thermal silicon oxide growth,” Computational Materials Science, 24, 229, 2002.
[68] B. Leroy, “Stresses and silicon interstitials during the oxidation of a silicon substrate,” Philosophical Magazine Part B, 55, 159, 1987.
[69] S. M. Hu, “Kinetics of interstitial supersaturation during oxidation of silicon,” Applied Physics Letters, 43, 449, 1983.
[70] K. Brunner, “Si/Ge nanostructures,” Reports on Progress in Physics, 65, 27, 2002.
[71] G. Medeiors-Ribeiro and R. S. Williams, “Thermodynamics of coherently-strained GexSi1-x nanocrystals on Si(001): alloy composition and island formation,” Nano Letters, 7, 223, 2007.
[72] D. K. Nayak, J. Kimjoo, J. S. Park, J. C. S. Woo, and K. L. Wang, “Wet oxidation of GeSi strained layers by rapid thermal processing,” Applied Physics Letters, 57, 369, 1990.
[73] F. K. LeGoues, R. Rosenberg, T. Nguyen, F. Himpsel, and B. S. Meyerson, “Oxidation studies of SiGe,” Journal of Applied Physics, 65, 1724, 1989.
[74] J. Eugene, F. K. LeGoues, V. P. Kesan, S. S. Iyer, and F. M. d’Heurle, “Diffusion versus oxidation rates in silicon‐germanium alloys,” Applied Physics Letters, 59, 78, 1991.
[75] J. D. Plummer, M. D. Deal, and P. B. Griffin, “Silicon VLSI Technology: Fundamentals, Practice and Modeling,” New Jersey: Prentice Hall, 2000.
[76] T. Enomoto, R. Ando, and H. Morita, “Thermal oxidation rate of a Si3N4 film and its masking effect against oxidation of silicon,” Journal of Applied Physics, 17, 1049, 1978.
[77] B. E. Deal and A. S. Grove, “General relationship for the thermal oxidation of silicon,” Journal of Applied Physics, 36, 3770, 1965.
[78] P. S. Flint, “The rates of oxidation of silicon,” The Spring Meeting of The Electrochemical Society (Los Angeles), 94, 1962.
[79] C. Y. Chien, “Matrix engineering of Ge quantum-dot for visible photodetection applications,” Ph. D. thesis, 2014.
[80] T. Weber, H. Stolz, W. Osten, M. Heuken, and K. Heime, “Fabry–Perot oscillations in epitaxial ZnSe layers,” Semiconductor Science and Technology, 10, 1113, 1995.
[81] T. Y. Kim, N. M. Park, K. H. Kim, and G. Y. Sung, “Quantum confinement effect of silicon nanocrystals in situ grown in silicon nitride films,” Applied Physics Letters, 85, 5355, 2004.
[82] I. Sychugov, R. Juhas, J. Valenta, and J. Linnros, “Narrow luminescence linewidth of a silicon quantum dot,” Physical Review Letters, 94, 087504, 2005.
[83] S. S. Walavalkar, A. P. Homyk, C. E. Hofmann, M. D. Henry, C. Shin, H. A. Atwater, and A. Scherer, “Size tunable visible and near-infrared photoluminescence from vertically etched silicon quantum dots,” Applied Physics Letters, 98, 153114, 2011.
[84] S. Takeoka,K. Toshikiyo, M. Fujii, S. Hayashi, and K.Yamamoto, “Photoluminescence from Si1−xGex alloy nanocrystals,” Physical Review B, 61, 15988, 2000.
[85] S. M. Lee and D. G. Cahill, “Heat transport in thin dielectric films,” Journal of Applied Physics, 8, 2590, 1997.
[86] M. T. Hung, C. C. Wang, J. Y. Chiou, J. C. Hsu, S. W. Lee, T. M. Hsu, and P. W. Li, “Large reduction in thermal conductivity for Ge quantum dots embedded in SiO2 system,” Applied Physics Letters, 101, 251913, 2012.
[87] M. G. Holland, “Analysis of lattice thermal conductivity,” Physical Review, 132, 2461, 1963.
[88] K. Hippalgonkar, B. Huang, R. Chen, K. Sawyer, P. Ercius, and A. Majumdar, “Fabrication of microdevices with integrated nanowires for investigating low-dimensional phonon transport,” Nano Letters, 10, 4341, 2010.
[89] C. Bera, N. Mingo, and S. Volz, “Marked effects of alloying on the thermal conductivity of nanoporous materials ,” Physical Review Letters, 104, 115502, 2010.
[90] D. Li, Y. Wu, R. Fan, P. Yang, and A. Majumdar, “Thermal conductivity of Si/SiGe superlattice nanowires,” Applied Physics Letters, 83, 3186, 2003.
[91] Y. K. Choi, J. Zhu, J. Grunes, J. Bokor, and G. A. Samorjaj, “Fabrication of sub-10-nm silicon nanowire arrays by size reduction lithography,” The Journal of Physical Chemistry B, 107, 3340, 2003.
[92] Y. Li, K. Buddharaju, N. Singh, and S.J Lee, “Silicon nanowires based thermoelectric generator: design and characterization,” Journal of Electronic Materials, 41, 6, 2012.
[93] B. M. Curtin, E. W. Fang, and J. E. Bowers, “Highly ordered vertical silicon nanowire array composite thin films for thermoelectric devices,” Journal of Electronic Materials, 41, 887, 2012.
[94] S. M. Lee and D. G. Cahill, “Heat transport in thin dielectric films,” Journal of Applied Physics, 81, 2590, 1997.
[95] D. G. Cahill, “Thermal conductivity measurement from 30 to 750 K:the 3 method,” Review of Scientific Instrument, 61, 802, 1990.
[96] R. Venkatasubramanian, “Lattice thermal conductivity reduction and phonon localization like behavior in superlattice structure,” Physical Review B, 61, 3091, 2000.
[97] H, Kim, I. Kim, H. J. Choi, and W. Kim, “Thermal conductivities of Si1-xGex nanowires with different germanium concentrations and diameters,” Applied Physics Letters, 96, 233106, 2010.
[98] N. Mingo, L. Yang, D. Li, and A. Majumdar, ”Predicting the thermal conductivity of Si and Ge nanowires,” Nano Letters, 3, 1713, 2003.
[99] N. Tomozeiu, S. Antohe, and M. Modreanu, “Electrical properties of LPCVD polysilicon deposited in the vicinity of amorphous – polycrystalline phase,” Journal of Optoelectronics and Advanced Materials, 2, 657, 2000.
[100] D. A. Neamen, “Semiconductor Physics & Devices,” McGraw-Hill, 2002.
[101] H. Iwai, T. Ohguro, and S. Ohmi, “NiSi salicide technology for scaled CMOS,” Microelectronic Engineering, 60, 157, 2002.
[102] C. Lavoie, F. M. d’Heurle, C. Detavernier, and C. Cabral Jr., “Towards implementation of a nickel silicide process for CMOS technologies,” Microelectronic Engineering, 70, 144, 2003.
[103] K. De Keyser, C. Van Bockstael, R. L. Van Meirhaeghe, C. Detavernier, E. Verleysen, H. Bender, W. Vandervorst, J. Jordan-Sweet, and C. Lavoie, “Phase formation and thermal stability of ultrathin nickel-silicides on Si(100),” Applied Physics Letters, 96, 173503, 2010.
[104] M. Tinani, A. Mueller, Y. Gao, E. A. Irene, Y. Z. Hu, and S. P. Tay, “In situ real-time studies of nickel silicide phase formation,” Journal of Vacuum Science & Technology B, 19, 376, 2001.
[105] K. Ogata, E. Sutter, X. Zhu, and S. Hofmann, “Ni-silicide growth kinetics in Si and Si/SiO2 core/shell nanowires,” Nanotechnology, 22, 365305, 2011.
[106] S. Habicht, Q. T. Zhao, S. F. Feste, L. Knoll, S. Trellenkamp, B. Ghyselen, and S. Mantl, “Electrical characterization of strained and unstrained silicon nanowires with nickel silicide contacts,” Nanotechnology, 21, 105701, 2010.
[107] Q. Wang, Q. Luo, and C. Z. Gu, “Nickel silicide nanowires formed in pre-patterned SiO2 trenches and their electrical transport properties,” Nanotechnology, 18, 195304, 2007.
[108] Y. C. Lin, Y. Chen, D. Xu, and Y. Huang, “Growth of nickel silicides in Si and Si/SiOx core/shell nanowires,” Nano Letters, 10, 4721, 2010.
[109] D. Mangelinck and K. Hoummada, “Effect of stress on the transformation of Ni2Si into NiSi,” Applied Physics Letters, 92, 254101, 2008.
[110] W. M. Weber, L. Geelhaar, A. P. Graham, E. Unger, G. S. Duesberg, M. Liebau, W. Pamler, C. Cheze, H. Riechert, P. Lugli, and F. Kreupl, “Silicon-nanowire transistors with intruded nickel-silicide contacts,” Nano Letters, 6, 2660, 2006.
[111] N. S. Dellas, B. Z. Liu, S. M. Eichfeld, C. M. Eichfeld, T. S. Mayer, and S. E. Mohney, “Orientation dependence of nickel silicide formation in contacts to silicon nanowires,” Journal of Applied Physics, 105, 094309, 2009.
[112] L. W. Cheng, H. M. Lo, S. L. Cheng, L. J. Chen, and C. J. Tsai, “Effects of stress on the formation and growth of nickel silicides in Ni thin films on (001)Si,” Materials Science and Engineering A, 409, 217, 2005.
[113] M. A. Nicolet and S. S. Lau, “VLSI Electronics-Microstructure Sciences,” ed N. G. Einspruch and G. B. Larrabee, New York: Academic Press, 6, 329, 1983.
[114] C. Lavoie, C. Detavernier, and P. Besser, “Silicide Technology for Integrated Circuits,” ed L. J. Chen, London: The Institution of Engineering and Technology, p. 95, 2004.
[115] S. L. Zhang and F. M. d’Heurle, “Stresses from solid state reactions: a simple model, silicides,” Thin Solid Films, 213, 34, 1992.
[116] L. J. Chen, “Solid state amorphization in metal/Si systems,” Materials Science and Engineering, 29, 115, 2000.
[117] F. d’Heurle, C. S. Petersson, J. E. E. Baglin, S. J. La Placa, and C. Y. Wong, “Formation of thin films of NiSi: Metastable structure, diffusion mechanisms in intermetallic compounds,” Journal of Applied Physics, 55, 4208, 1984.
[118] K. C. Lu, W. W. Wu, H. W. Wu, C. M. Tanner, J. P. Chang, L. J. Chen, and K. N. Tu, “In situ control of atomic-scale Si layer with huge strain in the nanoheterostructure NiSi/Si/NiSi through point contact reaction,” Nano Letters, 7, 8, 2007.
[119] R. Pretorius, “Prediction of silicide formation and stability using heats of formation,” Thin Solid Films, 290, 477, 1996.
[120] J. P. Lu, D. Miles, J. Zhao, A. Gurba, Y. Xu, C. Lin, and M. Hewson, International Conference on IEEE International Electron Devices Meeting (San Francisco), p. 371, 2002.
[121] Q. Xiang, C. Woo, E. Paton, J. Foster, B. Yu, and M. R. Lin, Symposium on VLSI Technology Digest of Technical Papers (Honolulu), p. 76, 2000.
[122] R. Chau, J. Kavalieros, B. Doyle, A. Murthy, N. Paulsen, D. Lionberger, D. Barlage, R. Arghavani, B. Roberds, and M. Doczy, International Conference on International Electron Devices Meeting (Washington), 29.1.1, 2001.
[123] R. Chau, J. Kavalieros, B. Roberds, R. Schenker, D. Lionberger, D. Barlage, B. Doyle, R. Arghavani, A. Murthy, and G. Dewey, International Conference on International Electron Devices Meeting (San Francisco), p. 45, 2000.
[124] R. Mahajan, C. Chiu, and G. Chrysler, “Cooling a microprocessor chip,” Proceedings of IEEE, 94, 1476, 2006.
[125] Y. Zhang, J. Christofferson, A. Shakouri, G. Zeng, J. E. Bowers, “On-chip high speed localized cooling using superlattice microrefrigerators”, IEEE Transactions on Components, Packaging and Manufacturing Technology, 29, 395, 2006.
[126] I. Chowdhury, R. Prasher, K. Lofgreen, G. Chrysler, S. Narasimhan, R. Mahajan, D. Koester, R. Alley, and R. Venkatasubramanian, “On-chip cooling by superlattice-based thin-film thermoelectrics,” Nature Nanotechnology, 4, 235, 2009.
[127] G. J. Snyder, M. Soto, R. Alley, D. Koester, and B. Conner, “Hot spot cooling using embedded thermoelectric cooler”, 22nd IEEE Semi-Therm Symposium, 135, 2006.
[128] B. M. Curtin, E. W. Fang, and J. E. Bowers, “Highly ordered vertical silicon nanowire array Ccomposite thin films for thermoelectric devices” Journal of Electronic Materials, 41, 887, 2012.
[129] Y. Li, K. Buddharaju, N. Singh, G. Q. Lo, and S.J Lee, “Chip-level thermoelectric power generators based on high density silicon nanowire array prepared with top-down CMOS technology,” IEEE Electron Device Letter, 32, 5, 2011.
[130] Y. Li, K. Buddharaju, N. Singh, and S.J Lee, “Effect of electrical contact resistance in silicon nanowire thermoelectric cooler and a design guideline for on chip cooling applications”, Journal of Electronic Materials, 42,7, 2013.
[131] Y. Zhang, “Silicon Microrefrigerator,” IEEE Transactions on Components and Packaging Technologies, 29, 570, 2006.
[132] Y. Zhang, J. Christofferson, A. Shakouri, G. Zeng, J. E. Bowers, and E. T. Croke, “On-chip high-speed localized cooling using superlattice microrefrigerators,” IEEE Transactions on Components and Packaging Technologies, 29, 395, 2006.
[133] M. P. Gupta, M.-H. Sayer, S. Mukhopadhyay, and S. Kumar, “Ultrathin Thermoelectric Devices for On-Chip Peltier Cooling,” IEEE Transactions on Components, Packaging, and Manufacturing Technology, 1, 1395, 2011.
[134] G. Bulman, P. Barletta, J. Lewis, N. Baldasaro, M. Manno, A. Bar-Cohen, and B. Yang, “Superlattice-based thin-film thermoelectric modules with high cooling fluxes,” Nature Communications, 7, 10302, 2016.
[135] S. H. Choday, M. S. Lundstrom, and K. Roy, “Prospects of Thin-Film Thermoelectric Devices for Hot-Spot Cooling and On-Chip Energy Harvesting,” IEEE Transactions on Components, Packaging, and Manufacturing Technology, 3, 2059, 2013.
[136] C. Chen, R. Jia, H. Yue, H. Li, X. Liu, D. Wu, W. Ding, T. Ye, S. Kasai, H. Tamotsu, J. Chu, and S. Wang, “Silicon nanowire-array-textured solar cells for photovoltaic application,” Journal of Applied Physics, 108, 094318, 2010.
[137] K. Q. Peng and S.T. Lee, “Silicon nanowires for photovoltaic solar energy conversion,” Advanced Materials, 23, 198, 2011.
[138] H. J. In, C. R. Field, and P. E. Pehrsson, “Periodically porous top electrodes on vertical nanowire arrays for highly sensitive gas detection,” Nanotechnology, 22, 355501, 2011.
[139] Z. Li, Y. Chen, X. Li, T. I. Kamins, K. Nauka, and R. S. Williams, “Sequence-Specific Label-Free DNA Sensors Based on Silicon Nanowires,” Nano Letters, 4, 245, 2004.
指導教授 李佩雯、郭明庭(Pei-Wen Li David Ming-Ting Kuo) 審核日期 2017-7-27
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