博碩士論文 101521013 詳細資訊




以作者查詢圖書館館藏 以作者查詢臺灣博碩士 以作者查詢全國書目 勘誤回報 、線上人數:15 、訪客IP:3.215.182.36
姓名 林坤彥(Kun-Yan Lin)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 鉭錳合金及銅鍺化合物應用於積體電路後段製程中銅導線之研究
(The application of tantalum-manganese alloy and copper-germanide on copper interconnect in back-end module of integrated circuit)
相關論文
★ 以熱熔異質磊晶成長法製造之鍺光偵測器★ 在SOI基板上以快速熱熔法製造高品質鍺及近紅外線光偵測元件之研製
★ 快速熱熔磊晶成長法製造側向PIN(Ge-Ge-Si)光偵測器★ 二維薄膜及三維塊材Seebeck係數量測
★ 塊材、薄膜與奈米線之熱導係數量測方法探討★ 以快速熱熔異質磊晶成長法製作鍺矽累增型光偵測器
★ 以快速熱熔融磊晶成長法製作 鍺錫合金PIN型光偵測器★ 利用火花電漿燒結法製備以矽為基底之奈米材料於熱電特性上之應用研究
★ P型金屬氧化物薄膜的製備應用於軟性電子★ 金屬氧化物製備應用於軟性電子元件
★ 超導材料釔鋇銅氧化物熱電特性量測分析★ 鎂矽錫合金熱電特性研究及應用
★ 矽基熱電模組開發及特性研究★ P型金屬氧化物與硫化物之研究
★ 物聯網之熱感測器應用★ P型金屬氧化物與硫化物合金薄膜之研究
檔案 [Endnote RIS 格式]    [Bibtex 格式]    [相關文章]   [文章引用]   [完整記錄]   [館藏目錄]   至系統瀏覽論文 ( 永不開放)
摘要(中) 摘要

根據摩爾定律(Moore′s Law)指出,積體電路上可容納電晶體數目,約每隔24個月就會增加一倍,隨著元件尺寸的不斷縮小,晶片運作速度不只受限於電晶體本身電性功能,亦受到金屬導線傳遞訊號速度的影響,因此後段連線系統中的時間延遲(RC Delay)就會變成限制積體電路發展的主要原因之一[1],為了提高導線的傳輸速率,因此採用低電阻的銅取代鋁,同時銅導線的抗電致遷移能力也比鋁更好,可以提高IC電路的可靠性,但銅的擴散係數很高,很容易擴散到基材。在快速縮小銅導線寬度同時又要承受更高的電流密度,電致遷移效應與擴散阻擋會是要面對的主要問題[2]。
本論文中的實驗使用微影製程製作出銅導線,嘗試使用TaMn 合金作為擴散阻擋層材料及以Cu3Ge合金作為電鍍晶種層材料,在高電流密度與高溫下量測銅導線在不同的測試結構下的失效時間,藉此求出個別的活化能(activation energy)與電流加速因子(current acceleration factor),並和Ta/TaN比較,並討論不同的擴散阻擋層對於銅導線可靠度的影響,分析造成元件失效的原因。
摘要(英) Abstract

According to Moore’s Law, the number of transistors in the integrated circuit has double approximately every twenty-four months. With the scaling of feature size, the performance of chips will be limited not only by the electrical performance of the transistors but also by the transmission rate of interconnect. Therefore, the RC delay of back-end interconnect will be one of main issue for limiting the development of integrated circuit. [1] To enhance the transmission rate of interconnect, aluminum was replaced with copper which has lower resistivity and better ability against eletromigration. As a result, it could enhance the performance of integrated circuit. However, the diffusion coefficient of copper is very large, and it is easy for copper to diffuse into silicon substrate. It is a great issue that how to enhance diffusion barrier and electromigration when we scale down the width of interconnect and hold up high current density. [2]

In the research, lithography and deposition process were employed to fabricate interconnect with TaMn alloy as diffusion barrier and Cu3Ge alloy as seed layer of plating. The failure time of different test structure was measured by high current density and high temperature. By this method, the activation energy and current acceleration factor can be obtained. To compare with the samples with diffusion barrier of TaN/Ta, interconnect reliability with different diffusion barriers and seeding layer was summarized and the mechanism of the failure mode was analyzed.
關鍵字(中) ★ 銅導線
★ 可靠度
★ 擴散阻擋層
關鍵字(英) ★ Cu interconnect
★ reliability
★ diffusion barrier
論文目次 目錄
摘要…………………………………………………………………………………I
Abstrate……………………………..…………………………………………...…II
目錄….…………………………………………………………………………..…IV
圖表目錄.………………………………………………………………….………VI
第一章 簡介………………………………………………………………………….1
1-1 連接導線可靠度….…………..…………………………………………...3
1-2 擴散阻擋層………………………………………………………………..5
1-3 自行成擴散阻擋層......................................................................................9
1-4 電致遷移....................................................................................................10
第二章 研究動機.......................................................................................................13
第三章 實驗方法.......................................................................................................14
3-1 實驗設計...................................................................................................14
3-2 實驗流程……………..…………………………….……………………15
3-3 量測機台與量測方法…….……..…………………...….………………18
第四章 結果與討論…………………...…..………………………………………..19
4-1 變溫量測分析………..………………………………………………….19
4-2 試片表片分析...……..….……………………………………………….29
4-3 自行成擴散阻擋層TEM分析…….……………………………………….30
第五章 實驗結論…………………......…………………………………………...33
參考文獻…………………………………………………………………………..34















參考文獻 參考文獻
[1] Li, Jian, Tom E. Seidel, and Jim W. Mayer. "Copper-Based Metallization in ULSI Structures: Part II: Is Cu Ahead of Its Time as an On-Chip Interconnect Material?." MRS Bulletin 19.08 (1994): 15-21.
[2] Torres, J., et al. "Copper-based metallization for ULSI circuits." Microelectronic engineering 34.1 (1996): 119-122.
[3] International Technology Roadmap for Semiconductors. Interconnect, 2007
[4] International Technology Roadmap for Semiconductors. Interconnect, 2005
[5] 林明賢,“銅導線中電遷移效應所引發之故障特性探討”, 博士論文, 國立交通大學,2006
[6] Suni, I., et al. "Thermal stability of hafnium and titanium nitride diffusion barriers in multilayer contacts to silicon." Journal of the Electrochemical Society 130.5 (1983): 1215-1218.
[7] 鄭義榮、黃俊夫、栢添賜、高凱傑、黃麒嘉, “內建連接導線系統之可靠度” 奈米通訊, 20卷1
[8] 黃孟碩. "雙層超薄 Ru/Ta-Si-C 擴散阻障層與銅連導線製程特性探討." 虎尾科技大學材料科學與綠色能源工程研究所學位論文 (2011): 1-118.
[9] Bystrova, Svetlana. Diffusion barriers for Cu metallisation in Si integrated circuits: deposition and related thin film properties. University of Twente, 2004.
[10] Shin, Young-Hoon, and Yukihiro Shimogaki. "Diffusion barrier property of TiN and TiN/Al/TiN films deposited with FMCVD for Cu interconnection in ULSI." Science and Technology of Advanced Materials 5.4 (2004): 399-405.
[11] Nicolet, M-A. "Diffusion barriers in thin films." Thin Solid Films 52.3 (1978): 415-443.
[12] Wang, Shi‐Qing, et al. "Diffusion barrier properties of TiW between Si and Cu." Journal of applied physics 73.5 (1993): 2301-2320.
[13] Kaloyeros, A. E., and E. Eisenbraun. "Ultrathin diffusion barriers/liners for gigascale copper metallization." Annual review of materials science 30.1 (2000): 363-385.
[14] Kapur, Pawan, et al. "Technology and reliability constrained future copper interconnects. II. Performance implications." Electron Devices, IEEE Transactions on 49.4 (2002): 598-604.
[15] H. Shibata, Proceedings of International Symposium on ULSI ProcessIntegration of the 199th Electro-Chemical Society Meeting, 2001 , p. 402.
[16] Barmak, K., et al. "On the use of alloying elements for Cu interconnect applications." Journal of Vacuum Science & Technology B 24.6 (2006): 2485-2498.
[17] Lee, Wonhee, et al. "Factors affecting passivation of Cu (Mg) alloy films." Journal of The Electrochemical Society 147.8 (2000): 3066-3069.
[18] Liu, C. J., et al. "Effects of Ti addition on the morphology, interfacial reaction, and diffusion of Cu on SiO2." Journal of Vacuum Science & Technology B 20.6 (2002): 2361-2366.
[19] Koike, J., and M. Wada. "Self-forming diffusion barrier layer in Cu–Mn alloy metallization." Applied Physics Letters 87.4 (2005): 041911.
[20] Haneda, M., J. Iijima, and J. Koike. "Growth behavior of self-formed barrier at Cu-Mn/SiO2 interface at 250-450° C." Applied physics letters 90.25 (2007): 2107.
[21] Chung, S-M., and J. Koike. "Analysis of dielectric constant of a self-forming barrier layer with Cu–Mn alloy on TEOS-SiO 2." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 27.5 (2009): L28-L31.
[22]C. Y. Chang and S. M. Sze, ULSI Technology, the McGRAWHILL,
P. 663, 1996
[23] 吳文發、秦玉龍, ”電遷移效應對銅導線可靠度之影響 ”奈米通訊 第六卷第一期,1999
[24] Lienig, Jens. "Introduction to electromigration-aware physical design." Proceedings of the 2006 international symposium on Physical design. ACM, 2006.
[25] Arnaud, Lucile, et al. "Microstructure and electromigration in copper damascene lines." Microelectronics Reliability 40.1 (2000): 77-86.
[26] Waltz, Patrice, et al. "Influence of thermal heating effect on pulsed DC electromigration result analysis." Microelectronics Reliability 38.10 (1998): 1531-1537.
[27] Rossiter, Paul L. The electrical resistivity of metals and alloys. Cambridge University Press, 1991.
[28] E.Ivanov, Thin Solid Films, 1332,325, 1998
[29] Wang, M. T., Y. C. Lin, and M. C. Chen. "Barrier properties of very thin Ta and TaN layers against copper diffusion." Journal of The Electrochemical Society 145.7 (1998): 2538-2545.
[30] The International Technology Roadmap for Semiconductor, ITRS (2010).
[31] ASTM Standards, "Standard Guide For Design of Flat, Straight-Line Test Structure for Detecting Metalliztion Open-Circuit of Resistance-Increase Failure Due to Electromigration ", Designation : F1259-89
[32]秦玉龍,“電遷移效應對銅金屬連線之危害”,博士論文, 國立交通大學, 2002
[33] Yokogawa, S., et al. "A novel resistivity measurement technique for scaled-down Cu interconnects implemented to reliability-focused automobile applications." Electron Devices Meeting, 2006. IEDM′06. International. IEEE, 2006.
[34] Torazawa, Naoki, et al. "Effects of N doping in Ru-Ta alloy barrier on film property and reliability for Cu interconnects." Interconnect Technology Conference, 2009. IITC 2009. IEEE International. IEEE, 2009.
[35] Tao, Jiang, Nathan W. Cheung, and Chenming Hu. "Electromigration characteristics of TiN barrier layer material." Electron Device Letters, IEEE 16.6 (1995): 230-232.
[36] Cao, Linjun, Paul S. Ho, and Patrick Justison. "Electromigration reliability of Mn-doped Cu interconnects for the 28 nm technology." Reliability Physics Symposium (IRPS), 2013 IEEE International. IEEE, 2013.
[37] Gambino, J., et al. "Reliability of Cu interconnects with Ta implant." International Interconnect Technology Conference, IEEE 2007. IEEE, 2007.
[38] Haneda, M., J. Iijima, and J. Koike. "Growth behavior of self-formed barrier at Cu-Mn/SiO2 interface at 250-450° C." Applied physics letters 90.25 (2007): 2107.
指導教授 辛正倫(Cheng-Lun Hsin) 審核日期 2015-7-1
推文 facebook   plurk   twitter   funp   google   live   udn   HD   myshare   reddit   netvibes   friend   youpush   delicious   baidu   
網路書籤 Google bookmarks   del.icio.us   hemidemi   myshare   

若有論文相關問題,請聯絡國立中央大學圖書館推廣服務組 TEL:(03)422-7151轉57407,或E-mail聯絡  - 隱私權政策聲明