氨電漿處理對高介電常數氧化鋯薄膜電容器特性研究

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劉嘉吉(Chia-Chi Liu) 查詢紙本館藏

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機械工程學系在職專班

論文名稱

氨電漿處理對高介電常數氧化鋯薄膜電容器特性研究
(Study on characteristics of high dielectric constant Zirconia thin film capacitors treatment with Ammonia plasma)

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摘要(中)

本論文主旨在研究以具有高介電常數的氧化鋯(ZrO2)薄膜，作為金氧半電容器(MOSC)之介電層，以取代傳統使用的二氧化矽(SiO2)，並藉由金氧半電容之電性及材料分析結果，將氧化鋯薄膜應用於製作鍺鰭式電晶體元件(Ge FinFET)。利用「加熱式原子層沉積系統沉積含有高介電常數及寬能隙的氧化鋯(ZrO2)薄膜應用於製作金氧半電容器(MOSC)及鍺鰭式電晶體元件(Ge FinFET)」，並探討其薄膜電性及相關材料特性。
　　實驗試片之特性量測與分析則包含：
(1)利用電容-電壓(C-V)與電流-電壓(I-V)特性曲線，萃取薄膜的界面缺陷密度與等效氧化厚度(EOT)，並探討MOSC元件的漏電流與散射效應。
(2)利用TEM觀察介電層的厚度及薄膜與基板之間的介面品質。
(3)利用XPS進行表面化學態分析，以了解氧化鍺(GeOx)介面層在氧化鋯介電層與鍺基板之組成關係。
在本研究中，以加熱式原子層沉積系統沉積氧化鋯薄膜，並探討沉積薄膜時表面處理的影響，其鍺鰭式電晶體元件的次臨界擺幅與導通電流比雖仍無法與文獻之最佳結果比擬，但在金氧半元件的等效氧化厚度、界面缺陷密度、漏電流與射散特性方面，則有較佳的表現；故未來研究規劃將持續針對薄膜製程進行改善，並積極開發新的高介電材料。

摘要(英)

The purposes of this thesis is to research the physical and electrical characteristics of MOS-Capacitor on germanium (Ge) with high-κ gate oxide (ZrO2). Moreover, the Ge FinFET are also attempting to fabricate by ZrO2 MOS-Capacitor results. The Rare-earth metal-oxide (ZrO2), that has high dielectric constant and wide bandgap, was deposited by thermal atomic layer deposition. The ZrO2 MOS-Capacitor and Ge GAA-FETs are also conferred by electro property and similar material property.
ZrO2 samples were analyzed and discussed by the following measurements:
(1)C-V and I-V curves: extract interface trap density, equivalent oxide thickness, leakage current, and dispersion effect.
(2)TEM: measure film thickness and film/substrate interface quality.
(3)XPS: this work explores how using the GeOx as the interlayer was the material chemical property was formed between ZrO2 and Ge substrate.
In this study, a ZrO2 film was deposited by the thermal atomic layer deposition system and the effect of surface treatment on the deposited film was investigated Though the sub-threshold swing (S.S.) and on-off current ratio (Ion/Ioff) of ZrO2 Ge FinFET are still not well enough than reported papers, thinner equivalent oxide thickness, low leakage current, low interface trap density and low dispersion effect are obtained. Follow-up research will be continued to further improve the characteristics of ZrO2 gate dielectric on Ge FinFET.

關鍵字(中)

★ 高介電常數
★ 加熱式原子層沉積
★ 等效氧化厚度
★ 閘極介電層
★ 氧化鋯

關鍵字(英)

★ High-κ
★ Atomic layer deposition
★ Equivalent Oxide Thickness(EOT)
★ Gate dielectric
★ Ziconium oxide

論文目次

摘要 ii
ABSTRACT iii
誌謝 iv
目錄 v
表目錄 vii
圖目錄 viii
1. 緒論 1
1.1 研究動機與目的 1
1.2 論文架構 3
2. 理論架構 7
2.1 金氧半電容之簡介 7
2.2 金氧半電容之操作原理 8
2.3 金氧半電容之氧化層缺陷探討 13
2.3.1 介面捕獲電荷(Interface Trapped Charge, Qit) 13
2.3.2 固定氧化層電荷(Fixed Oxide Charge, Qf) 14
2.3.3 移動性離子電荷(Mobile Ion Charge, Qm) 14
2.3.4 氧化層捕獲電荷(Oxide Trapped Charge, Qot) 15
2.4 原子層沉積原理 15
2.4.1 原子層沉積 15
2.4.2 原子層沉積理論與流程 16
2.4.3 ALD 成長Al2O3 薄膜 17
2.4.4 薄膜沉積 19
2.5 濺鍍原理 20
2.5.1 濺鍍 20
2.5.2 濺鍍理論 25
3.加熱式原子層沉積系統應用於氧化鋯之沉積與元件之製作 27
3.1 實驗製程及步驟 27
3.2 晶片清洗 28
3.3 氧化鍺(GeO2)薄膜之沉積 28
3.4 氧化鋯(ZrO2)薄膜之沉積 29
3.5 氧化鋯薄膜的熱退火 29
3.6 閘極金屬電極與背面金屬電極的濺鍍 29
3.7 TEM 量測 29
3.8 化學能譜分析儀(ESCA)量測 32
4. 結果與討論 35
4.1 氧化鍺介面層對於電容器元件之電容-電壓之探討 35
4.2 表面處理對於氧化鋯電容器元件之電性探討 38
4.3 NH3/H2 RPT 表面處理次數對MOSC 元件之電性討論 41
4.4 氧化鋯電容器之TEM 與XPS 分析 44
4.5 鍺鰭式電晶體元件製作與電性分析 47
5. 結論與未來展望 50
5.1 結論 50
5.2 未來展望 51
參考文獻 52

參考文獻

[1] Andrea, M. (2013, July 02). Re: Andrea Morello Explains Moore′s Law and Quantum Computers. Retrieved from http://www.33rdsquare.com/2013/07/ andrea-morello-explains-moores-law-and.html
[2] Gusev, E. P., Cartier, E., Buchanan, D. A., Gribelyuk, M., Copel, M., Okorn-Schmidt, H., and Emic, C. D., “Ultrathin High-K Metal Oxides on Silicon: Processing Characterization and Integration Issues,” Microelectronic Engineering, Vol. 59, pp. 341-349, 2001.
[3] Steegen, A. (2013, July 08). Re: A POWER-PERFORMANCE-AREA-COST TRADE-OFF. Retrieved from http://www2.imec.be/content/user/File/ ITF2013US%20PRESENTATIONS/ITFLogicScaling_IMEC_Steegen_July2013_final%20to%20be%20publsihed.pdf
[4] S. Y. Tan, microelec. j., Vol. 38, 783, 2007.
[5] Neamen, D. A., Semiconductor Physics and Devices﹐McGraw-Hill Book Company, New York, pp. 450-454, 2003.
[6] 陳貞夙、陳立民、江珮錞，”奈米微晶鋯矽酸鹽閘極氧化層之製備與特性研究”，行政院國家科學委員會專題研究計畫成果報告，2003。
[7] Lim, K. Y., Park, D. G., Cho, H. J., Kim, J. J., Yang, J. M., Choi, I. S., Yeo, I. S., and Park, J. W., “Electrical Characteristics and Thermal Stability of n+ Polycrystalline-Si/ZrO2/SiO2/Si Metal-Oxide-Semiconductor Capacitors,” Journal of Applied Physics, Vol. 91, No. 1, pp. 414-429, January, 2002.
[8] Kang, L., Lee, B. H., Qi, W. J., Jeon, Y., Nieh, R., Gopalan, S., Onishi, K., and Lee, J. C., “Electrical characteristics of Highly Reliable Ultrathin Hafnium Oxide Gate Dielectric,” IEEE Electron Device Letters, Vol. 21, No. 4, pp. 181-183, April, 2000.
[9] Lee, S. J., Choi, C. H., Kamath, A., Clark, R., and Kwong, D. L., “Characterization and Reliability of Dual High-K Gate Dielectric Stack (Poly-Si-HfO2-SiO2) Prepared by In Situ RTCVD Process for System-on-Chip Applications,” IEEE Electron Device Letters, Vol. 24, No. 2, pp. 105-107, February, 2003.
[10] Callegari, A., Cartier, E., Gribelyuk, M. H., Okorn-Schmidt, F., and Zabel, T., “Physical and Electrical Characterization of Hafnium Oxide and Hafnium Silicate Sputtered Films,” Journal of Applied Physics, Vol. 90, No. 12, pp. 6466-6475, 15 Dec., 2001.
[11] Kuo, D. H, Tzeng, K. H, “Growth and Properties of Titania and Aluminum Titanate Thin Films Obtained by R.f. Magnetron Sputtering,” Thin Solid Films, pp. 497-502, 2002.
[12] Tang, H., Prasad, K., Sanjinbs, R., Schmid, P. E., and Levy, F., “Electrical and Optical Properties of TiO2 Anatase Thin Films,” Journal of Applied Physics, Vol. 75, No. 4, pp. 2042-2047, 15 Feb., 1994.
[13] Bera, M. K., Maiti, C. K., “Electrical Properties of SiO2/TiO2 High-k Gate Dielectric Stack,” Materials Science in Semiconductor Processing, Vol. 9, pp. 909-917, 13 Nov., 2006.
[14] Wu, S. Y., Hong, M., Kortan, A. R., Kwo, J., Mannaerts, J. P., Lee, W. C., and Huang, Y. L., “High-Quality Thin Single-Crystal γ-Al2O3 Films Grown on Si(111),” Appl. Phys. Lett., Vol. 87, pp. 091908, 2005.
[15] Kwo, J., Hong, M. and Kortan, A. R., “High ε Gate Dielectrics Gd2O3 and Y2O3 for Silicon,” Appl. Phys. Lett., Vol. 77, No. 1, pp. 130-132, 2000.
[16] Kwo, J., Hong, M., Kortan, A. R. and Queeney, K. L., “Properties of High-k Gate Dielectrics Gd2O3 and Y2O3 for Si,” Journal of Applied Physics, Vol. 89, No. 7, pp. 3920-3927, 2001.
[17] Wilk, G. D., Wallace, R. M., and Anthony, J. M., “High-k Gate Dielectrics: Current Status and Materials Properties Considerations,” Journal of Applied Physics, Vol. 89, pp. 5243-5275, 2001.
[18] Sze, S. M., Physics of Semiconductor Devices, Wiley & Sons Inc., New Caledonia, pp. 170-174, 2001.
[19] 吳孟奇，洪勝富，連振炘，龔正，半導體元件，東華書局，第 301-318 頁。
[20] Sze, S. M., Physics of Semiconductor Devices, Wiley & Sons Inc., New York, pp.181-182, 2001.
[21] Schroder, D. K., Semiconductor Material and Device Characterization, Wiley & Sons Inc., New York, pp. 337-339, 1998.
[22] 李正中，薄膜光學與鍍膜技術，藝軒圖書出版社，2002。
[23] 林素霞，”氧化鋅薄膜的特性改良及應用之研究”，博士論文，國立成功大學材料科學及工程研究所，台南，第6-8頁，2003.
[24] 賴耿陽，薄膜製作工藝學，復漢出版社，第 32-43 頁。
[25] Brian Chapman, Glow Discharge Processes, Wiley & Sons Inc., New York, pp.79-268, 1980.
[26] 楊錦章，“基礎濺鍍電漿”，電子發展月刊，68 期，第13-40 頁，1983。
[27] Rickerby, D. S., Matthews, A., Advanced Surface Coatings: A handbook of surface engineering, Blackie, New York, pp.28-95, 1991.
[28] 陳建淼，洪連輝，穿透式電子顯微鏡，Retrieved from http://highscope.ch.ntu.edu.tw/wordpress/?p=1599
[29] 汪建民，材料分析，中國材料科學學會，新竹，第 353、354、626 頁，2004。
[30] Trinh, H. D., Chang, E. Y., Wu, P. W., Wong, Y. Y., Chang, C. T., Hsieh, Y. F., Yu, C. C., Nguyen, H. Q., Lin, Y. C., Lin, K. L., and Hudait, M. K.,” The influences of surface treatment and gas annealing conditions on the inversion behaviors of the atomic-layer-deposition Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor capacitor,” Appl. Phys. Lett., Vol. 97, pp. 042903, 2010.
[31] 張維軒，” a-IGZO 薄膜電晶體的製作與特性分析”，碩士論文，國立交通大學電子工程研究所，新竹，第15-17頁，2013.
[32] Lee, Y. J., Luo, G. L., Hou, F. J., Chen, M. C., Yang, C. C., Shen, C. H., Wu, W. F., Shieh, J. M., and Yeh, W. K.,”Ge GAA FETs and TMD FinFETs for the Applications Beyond Si,” IEEE J ELECTRON DEVI., Vol. 4, No. 5, pp. 286-293, 2016.

指導教授

傅尹坤(Yiin-Kuen Fuh)

審核日期

2017-7-18

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