具鐵電可變電容之積體被動元件製程及其應用於微波相位偏移器之製作

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姓名

游振琮(Chen-Tsung Yu) 查詢紙本館藏

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電機工程學系

論文名稱

具鐵電可變電容之積體被動元件製程及其應用於微波相位偏移器之製作
(An Integrated Passive Device Process Featuring Ferroelectric Varactors and Its Application in the Fabrication of a Microwave Phase Shifter)

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摘要(中)

使用積體被動元件製程可有效縮小微波電路之尺寸。本論文呈現一具鐵電可變電容之積體被動元件製程的開發。我們所開發的積體被動元件製程目前可製作的元件包含鐵電可變電容及螺旋電感。我們利用所開發之積體被動元件製程實現一微波相位偏移器，以顯示本製程用於製作可調式微波電路之潛力。
本論文第二章詳細描述本積體被動元件製程。本積體被動元件製程可製作鐵電可變電容及螺旋電感。鐵電可變電容由第一金屬層（M1）、鐵電鈦酸鍶鋇薄膜，及第二金屬層（M2）構成；而螺旋電感則由第三金屬層（M3）、苯並環丁烯（benzocyclobutene, BCB）介電層，及第四金屬層（M4）所構成。本論文主要貢獻在於發展了製作第三金屬層及第四金屬層所需的金電鍍工序，以及旋覆與蝕刻BCB介電層之工序。經金電鍍工序，第三金屬層與第四金屬層可達數微米（µm）之厚度，以降低螺旋電感的微波損耗。而具低介電常數並達數微米厚的BCB介電層則可降低螺旋電感之寄生電容。
本論文第三章介紹一10-GHz類比式相位偏移器之設計，並用第二章所述之積體被動元件製程來製作。相位偏移器使用具磁耦合之全通網路此一電路架構來實現，由可變電容與兩耦合電感所組成；兩耦合電感間之耦合係數設計為正值，以期單級網路便可達到大的相位偏移量。由於製程良率尚不高，因此未有完整的相位偏移器可供量測；但有鐵電可變電容及耦合電感測試鍵可各別量測。量測結果顯示，鐵電可變電容於5-V偏壓下可達到2:1的可調度，0-V時的電容密度約為20 fF/µm2；上電極面積為7×7 µm2的鐵電可變電容其品質因子在10 GHz時約在8–13間。耦合電感量測得之自感於10 GHz為1.4 nH，品質因子約為14，耦合係數為0.64。我們將鐵電可變電容及扣掉下針pad的耦合電感的實際量測結果匯入電路模擬軟體以模擬相位偏移器之性能。模擬結果顯示，相移器的輸入及輸出電壓駐波比由dc至10.5 GHz皆小於2。於原始設計頻率10 GHz時，植入損耗小於5 dB，在可變電容偏壓6 V下的相位偏移量為135°；但相位偏移量最大的點為8.6 GHz，而相移量可達180°。經檢查發現，造成最大相位偏移量的頻率由原始設計的10 GHz移至8.6 GHz的原因為耦合電感之全波電磁模擬時並不準確。經重新模擬後，耦合電感的全波電磁模擬結果與量測結果則相當貼近。
本論文成功地發展了具鐵電可變電容之積體被動元件製程，並用以製作出鐵電可變電容及耦合螺旋電感。將鐵電可變電容及耦合電感的實際量測結果用於模擬一微波相位偏移器之性能，驗證本論文所述之積體被動元件製程具有實現可調式微波電路之潛力。

摘要(英)

When implemented using IPD processes, the size of a microwave circuit can be effectively reduced. In this thesis, the development of an integrated passive device (IPD) process featuring ferroelectric capacitors is presented. The devices that can currently be fabricated using the IPD process we develop include ferroelectric varactors and spiral inductors. A microwave phase shifter is implemented using the developed IPD process to demonstrate its potential for fabricating tunable microwave circuits.
The detail of the proposed IPD process is articulated in Chapter 2. The proposed IPD process can be used to fabricated ferroelectric capacitors and spiral inductors. The ferroelectric capacitor is formed by the first metal layer (M1), the ferroelectric barium strontium titanate (BST) thin film, and the second metal layer (M2), whereas the spiral inductor is constructed using the third metal layer (M3), the benzocyclobutene (BCB) inter-metal dielectric layer, and the fourth metal layer (M4). The major contribution of this work is to develop the gold-electroplating procedure for the M3 and M4 layers as well as the procedures for spin-coating and etching the BCB dielectric layer. By gold plating, the thicknesses of the M3 and M4 layers can reach several µm, which would reduce the microwave loss of the spiral inductor. On the other hand, the low-k BCB layer with a thickness of several µm reduces the parasitic capacitance of the spiral inductor.
In Chapter 3, the design of a 10-GHz analog phase shifter, which will be realized using the IPD process described in Chapter 2, is shown. The magnetically coupled all-pass network (MCAPN), composed of varactors and two coupled inductors, is used as the circuit topology for the phase shifter. To achieve a large phase shift by only one section of the MCPN, the coupling coefficient of the two coupled inductors within the MCAPN is set to be positive value. Due to the low yield of the IPD process, we currently do not have a complete phase shifter for measurement. Nevertheless, testkeys of ferroelectric varactors and coupled inductors are available. The measurement results of the testkeys show that the ferroelectric varactor exhibits a tunability of 2:1 under 5-V bias and a 20- fF/µm2 capacitance density at 0 V, and the quality factor of a ferroelectric varactor with a top-electrode area of 7×7 µm2 at 10 GHz ranges from 8 to 13. The measured self-inductance, quality factor, and coupling coefficient of the coupled inductors are 1.4 nH, 14, and 0.64, respectively, at 10 GHz. The measurement results of the ferroelectric varactors and the deembeded inductors are used for simulating the performances of the designed phase shifter. Simulation results show that the input and output voltage standing wave ratios (VSWRs) of the phase shifter are less than 2 from dc to 10.5 GHz. At 10 GHz, which is the original design frequency, the insertion loss is less than 5 dB and the phase shift is 135° when the varactors are biased up to 6 V. However, maximum phase shift, which is 180, occurs at 8.6 GHz. After investigation, it is found that the reason for the frequency shift is due to the inaccurate full-wave electromagnetic (em) simulation of the coupled inductors. After re-simulation, the em simulation result of the coupled inductors now closely matches the measured result.
In this work, an IPD process featuring ferroelectric varactors is successfully developed and used for fabricating ferroelectric varactors and coupled spiral inductors. Using the measured results of the fabricated ferroelectric varactors and coupled inductors to simulate the performance of a microwave phase shifter, it is demonstrated that the IPD process proposed in this thesis has the potential for fabricating tunable microwave circuits.

關鍵字(中)

★ 鐵電可變電容
★ 積體被動元件製程
★ 相位偏移器

關鍵字(英)

論文目次

目錄
國立中央大學 I
摘要 I
Abstract III
目錄 VII
圖目錄 IX
表目錄 XI
第一章緒論 1
1–1　研究動機 1
1–2　文獻回顧[5] 2
1–3　論文架構 3
第二章積體被動元件製程發展 4
2–1　簡介 4
2–2　可變電容技術及鐵電材料特性簡介 5
2–3　保護層及BCB特性簡介 9
2–4 積體被動元件製程 10
2–4–1 Metal1（電容下電極）製作 10
2–4–2 鐵電薄膜沉積 12
2–4–3 Metal2（電容上電極）製程流程 13
2–4–4 鐵電薄膜介電層製程流程 14
2–4–5 氮化矽保護層之沉積與製作流程 15
2–4–6 Metal3製作流程 16
2–4–7 保護層製程流程 19
2–4–8 Metal4製程流程 21
2–5　結論 23
第三章使用積體被動元件製程實現之微波相位偏移器 24
3–1　簡介 24
3–2　研究動機 25
3–3 單級全通網路相位偏移器 26
3–3–1 理論分析 26
3–3–2 設計流程 29
3–3–3 被動元件和PHS設計 30
3–3–4 製程流程 39
3–3–5 量測結果 43
3–3–6 結果與討論 49
3–4 結論 55
第四章結論 57
參考文獻 59
附錄 59

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指導教授

傅家相(Jia-Shiang Fu)

審核日期

2015-11-18

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