參考文獻 |
[1] K.-J. Hsiao and T.-C. Lee, “An 8-GHz to 10-GHz distributed DLL for multiphase clock generation,” IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2478–2487, Sep. 2009.
[2] X. Maillard, F. Devisch, and M. Kuijk, “A 900-Mb/s CMOS data recovery DLL using half-frequency clock,” IEEE J. Solid-State Circuits, vol. 37, no. 6, pp. 711–715, Jun. 2002.
[3] A. L. Coban, M. H. Koroglu, and K. A. Ahmed, “A 2.5–3.125-Gb/s quad transceiver with second-order analog DLL-based CDRs,” IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1940–1947, Sep. 2005.
[4] G. Chien and P. R. Gray, “A 900-MHz local oscillator using a DLLbased frequency multiplier technique for PCS applications,” IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1996–1999, Dec. 2000.
[5] T.-C. Lee and K.-J. Hsiao, “The design and analysis of a DLL-based frequency synthesizer for UWB application,” IEEE J. Solid-State Circuits, vol. 41, no. 6, pp. 1245–1252, Jun. 2006.
[6] Dandan Zhang, Hai-Gang Yang, Wenrui Zhu, Wei Li, Zhihong Huang, Lin Li, and Tianyi Li, "A Multiphase DLL With a Novel Fast-Locking Fine-Code Time-to-Digital Converter," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 11, pp. 2680-2684, Nov. 2015.
[7] R.-J. Yang and S.-I. Liu, “A 2.5 GHz all-digital delay-locked loop in 0.13 μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 42,no. 11, pp. 2338–2347, Nov. 2007.
[8] N. Khan, M. Hossain, and K. L. E. Law, "A Low Power Frequency Synthesizer for 60-GHz Wireless Personal Area Networks," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, pp. 622-626, 2011.
[9] L. Chihun, C. Lan-Cho, L. Shen-Iuan, K. Chun-Lin, Y. Z. Juang, and C. Chin-Fong, "A 1.2V 37-38.5GHz 8-Phase Clock Generator in 0.13 μm CMOS Technology," IEEE Int. Symp.on VLSI Design, Automation and Test, Jun.2006, pp. 27-28.
[10] T. Toifl , C. Menolfi, P. Buchmann, M. Kossel, T. Morf, R. Reutemann, M. Ruegg, M. Schmatz, and J. Weiss, "0.94ps-rms-jitter 0.016mm2 2.5GHz multi-phase generator PLL with 360° digitally programmable phase shift for 10Gb/s serial links," in Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International, 2005, pp. 410-607 Vol. 1.
[11] R. H. Caverly, “Time-domain electrothermal circuit-level modeling of microwave and RF PIN diodes,” 2012 IEEE/MTT-S International Microwave Symposium Digest, Montreal, QC, Canada, 2012, pp. 1-3.
[12] S. Bellone, F. G. Della Corte, L. F. Albanese and F. Pezzimenti, "An Analytical Model of the Forward I– V Characteristics of 4H-SiC p-i-n Diodes Valid for a Wide Range of Temperature and Current," in IEEE Transactions on Power Electronics, vol. 26, no. 10, pp. 2835-2843, Oct. 2011.
[13] C. L. Ma and P. O. Lauritzen, "A simple power diode model with forward and reverse recovery," in IEEE Transactions on Power Electronics, vol. 8, no. 4, pp. 342-346, Oct 1993.
[14] A. G. M. Strollo, "A new SPICE model of power P-I-N diode based on asymptotic waveform evaluation," in IEEE Transactions on Power Electronics, vol. 12, no. 1, pp. 12-20, Jan 1997.
[15] A. T. Bryant, L. Lu, E. Santi, P. R. Palmer and J. L. Hudgins, "Physical Modeling of Fast p-i-n Diodes With Carrier Lifetime Zoning, Part I: Device Model," in IEEE Transactions on Power Electronics, vol. 23, no. 1, pp. 189-197, Jan. 2008.
[16] E. Elwarraki, A Sabir, "Pspice behavior and thermal modeling of the PIN diode: a circuit approach", Electronics, Circuits and Systems, ICECS 14th IEEE International Conference on, 2007 , Page(s): 1031 -1034
[17] N. Mijlad, E. El and A. Elbacha, "Electrical behavior modeling of power PIN diode in SIMULINK," 2014 Second World Conference on Complex Systems (WCCS), Agadir, 2014, pp. 346-349.
[18] A. W. DiVergilio, J. J. Pekarik and V. Jain, "An electrothermal PIN diode model with substrate injection," 2014 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), Coronado, CA, 2014, pp. 207-210.
[19] A. Colquhoun and L. P. Schmidt, "MMICs for automotive and traffic applications," GaAs IC Symposium Technical Digest 1992, Miami Beach, FL, USA, 1992, pp. 3-6.
[20] T. Buber, F. Kolak, N. Kinayman and J. Bennett, "A low-loss high-isolation absorptive GaAs SPDT PIN switch for 24 GHz automotive applications," Radio and Wireless Conference, 2003. RAWCON ′03. Proceedings, Boston, MA, 2003, pp. 349-352.
[21] P. Song, R. L. Schmid, A. Ç. Ulusoy, and J. D. Cressler, “A high-power, low-loss W-band SPDT switch using SiGe PIN diodes,” 2014 IEEE Radio Frequency Integrated Circuits Symp. Dig., June 2014, pp. 195-198.
[22] J.-E. Mueller, A. Bangert et.al., ”A GaAs HEMT MMIC chip set for automotive radar systems fabricated by optical stepper lithography”, 1996 GaAs IC Symposium, pp. 189-192.
[23] J. Putnam, M. Fukuda, P. Staecker, Y-H. Yun, “A 94 GHz monolithic switch with a vertical PIN diode structure”, IEEE 1994 GaAs IC Symposium, pp. 333-336.
[24] B.R. Jackson, Y. Zheng, C.E. Saavedra, “A CMOS Direct-Digital BPSK Modulator Using an Active Balun and Common-Gate Switches”, IEEE International Symposium on Circuits and Systems, ISCAS 2007, pp. 2534-2537.
[25] A. Tang, F. Yuan, E. Law, “A new CMOS PBSK modulator with optimal transaction bandwidth control”, IEEE international symposium on circuits and systems, ISCAS 2007, pp. 2550-2553.
[26] N. Amin, N. W. Jye, M. Othman, “A BPSK Backscatter Modulator Design for RFID Passive Tags”, IEEE International Workshop on Radio-Frequency Integration Technology, RFIT 2007, pp. 262-265.
[27] D. C. W. Lo, H. Wang, B. R. Allen, G. S. Dow, K. W. Chang, M. Biedenbender, R. Lai, S. Chen, and D. Yang, “Novel monolithic multifunctional balanced switching low-noise amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 42, no. 12, pp. 2629–2634, Dec. 1994.
[28] T. Lodhi, D. L. Edgar, H. McLelland, S. Ferguson, K. Elgaid, C. R. Stanley, and I. G. Thayne, “A 77 GHz coplanar waveguide MMIC BPSK vector modulator realized using InP technology,” in IEEE GaAs IC Symp. Dig., Nov. 2000, pp. 183–186.
[29] A. E. Ashtiani, S. Nam, A. d’Espona, S. Lucyszyn, and I. D. Robertson, “Direct multilevel carrier modulation using millimeter-wave balanced vector modulators,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pp. 2611–2619, Dec. 1998.
[30] Y. Sun and A. P. Freundorfer, “A new overlay coupler for direct digital modulator in GaAs HBT,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 8, pp. 1830–1835, Aug. 2004.
[31] H.-Y. Chang, P.-S. Wu, T.-W. Huang, H. Wang, C.-L. Chang, and J. G. J. Chern, “Design and analysis of CMOS broadband compact highlinearity modulators for gigabit microwave/millimeter-wave applications,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 1, pp. 20–30, Jan. 2006.
[32] H.-Y. Chang, H. Wang, and W. Lin, “A miniature 35-110 GHz modified reflection-type BPSK modulator using 65-nm CMOS technology,” in IEEE MTT-S Int. Dig., Honolulu, HI, Jun. 2007, pp. 2165–2168.
[33] Y. Hamada, K. Maruhashi, M. Ito, S. Kishimoto, T. Morimoto and K. Ohata, "A 60-GHz-band Compact IQ Modulator MMIC for Ultra-high-speed Wireless Communication," 2006 IEEE MTT-S International Microwave Symposium Digest, San Francisco, CA, 2006, pp. 1701-1704.
[34] H. Y. Chang, T. W. Huang, H. Wang, Y. C. Wang, P. C. Chao, and C. H. Chen, "A broadband HBT MMIC IQ modulator and millimeter-wave vector signal characterization," 2003 IEEE MTT-S Int. Microwave Symp. Dig., vol. 1, pp. 99-102, June 2003.
[35] J. Y. Park, S. S. Jeon, Y. Wang, and T. Itoh, "Integrated antenna with direct conversion circuitry for broad-band millimeter-wave communications," IEEE Trans. Microwave Theory & Tech., vol. 51, no. 5, pp. 1482-1488, May 2003.
[36] M. Varonen M. Karkkainen, J. Riska, P. Kangaslahti, and K. A. I. Halonen, "Resistive HEMT mixers for 60-GHz broad-band telecommunication," IEEE Trans. Microwave Theory & Tech., vol. 53, no. 4, pp. 1322-1330, April 2005.
[37] 涂祐豪,“具高頻操作及自我向為校正之延遲鎖定迴路與頻率倍頻器”,民國99年10月。
[38] 吳孟哲,“寬頻操作為基礎之靜態相位誤差校正延遲鎖定迴路”,民國97年1月。
[39] 葉彥良,“應用於為波及毫米波鎖相迴路之金氧半場效電晶體注入鎖定振盪器研究”,民國102年6月。
[40] B. M. Helal, M. Z. Straayer, G.-Y. Wei, and M. H. Perrott, “A highly digital MDLL-based clock multiplier that leverages a self-scrambling time-to-digital converter to achieve subpicosecond jitter performance,” IEEE J. Solid-State Circuits, vol. 43, pp. 855-863, Apr. 2008.
[41] F.-R. Liao and S.-S. Lu, “A programmable edge-combining DLL with a current-splitting charge pump for spur suppression,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, pp. 946-950, Dec. 2010.
[42] J. Lee, and H. Wang, “Study of subharmonically injection-locked PLLs,” IEEE J. Solid-State Circuits, vol. 44, no. 5, pp. 1539-1553, May. 2009.
[43] J. Lee, M. Liu, and H. Wang, “A 75-GHz phase-locked loop in 90-nm CMOS technology,”IEEE J. Solid-State Circuits, vol. 43, no. 6, pp.1414–1426, June 2008.
[44] K.-H Tsai and S.-L Liu, “A 43.7mW 96GHz PLL in 65nm CMOS,” inIEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2009, pp. 276–277.
[45] Y. Xiaochen and L. Jin, “An open-loop 10GHz 8-phase clock generator in 65nm CMOS,” in Proc. IEEE Custom Integr.Circuit Conf., Sept, pp. 1-4. 2011.
[46] K. Yamguchi, M. Fukaishi, T. Sakamoto, N. Akiyama, and K. Nakamura, “2.5 GHz 4-phase clock generator with scalable and no feedback loop architecture," in proc. Int.Solid-State Circuits Conf., 2001, pp. 398-399.
[47] B. Analui and A. Hajimiri, “Statistical analysis of integrated passive delay lines,” in Proc. IEEE Custom Integr. Circuits Conf., 2003, pp. 107–110.
[48] C. N. Chuang and S. I. Liu, "A 0.5–5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 54, no. 11, pp. 939-943, Nov. 2007.
[49] S. Kang, J. C. Chien and A. M. Niknejad, "A W-Band Low-Noise PLL With a Fundamental VCO in SiGe for Millimeter-Wave Applications," in IEEE Transactions on Microwave Theory and Techniques, vol. 62, no. 10, pp. 2390-2404, Oct. 2014.
[50] H. H. Chang, C. H. Sun, and S. I. Liu, “A low jitter and precise multiphase delay-locked loop using shifted averaging VCDL,” in International Solid-State Circuits Conference, Feb. 2003, pp. 434–435.
[51] Hsiang-Hui Chang, Jung-Yu Chang, Chun-Yi Kuo and Shen-Iuan Liu, "A 0.7-2-GHz self-calibrated multiphase delay-locked loop," in IEEE Journal of Solid-State Circuits, vol. 41, no. 5, pp. 1051-1061, May 2006.
[52] 李孟瀚,”多相位微波及毫米波低相位雜訊時脈產生器之研製”, 民國104年6月。
[53] K. K. Tantwai, "Microwave-frequency non-linear universal model for PIN diode," 2007 International Workshop on Physics of Semiconductor Devices, Mumbai, 2007, pp. 119-122.
[54] J. G. Yang and K. Yang, “High-linearity K-Band absorptive-type MMIC switch using GaN PIN-diodes,” IEEE Microw. Wireless Compon. Lett., vol. 23, no. 01, pp. 37–39, Jan. 2013.
[55] J. G. Yang and K. Yang, “Ka-band 5-Bit MMIC phase shifter using InGaAs PIN switching diodes,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 03, pp. 151–153, Mar. 2011.
[56] B. J. Jang, I. B. Yom and S. P. Lee, "An Enhanced PIN Diode Model for Voltage-Controlled PIN Diode Attenuator," 2003 33rd European Microwave Conference, Munich, Germany, 2003, pp. 231-234.
[57] M. Uzunkol and G. Rebeiz, "A Low-Loss 50–70 GHz SPDT Switch in 90 nm CMOS," in IEEE Journal of Solid-State Circuits, vol. 45, no. 10, pp. 2003-2007, Oct. 2010.
[58] R. Shu, A. Tang, B. Drouin and Q. J. Gu, "A 54–84 GHz CMOS SPST Switch with 35 dB Isolation," 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Phoenix, AZ, 2015, pp. 15-18.
[59] Dongning Hao, Nan Li and Xiuping Li, "A Split-Ring Resonator (SRR) based Millimeter-Wave SPST Switch in 0.13um BiCMOS Technology," 2016 IEEE International Conference on Computational Electromagnetics (ICCEM), Guangzhou, 2016, pp. 236-238.
[60] Wei Hongtao, Gao Xuebang, Wu Hongjiang, Wei Bihua and Lu Yanan, "W-band GaAs PIN Diode SPST Switch MMIC," 2012 International Conference on Computational Problem-Solving (ICCP), Leshan, 2012, pp. 93-95.
[61] M. Thian and V. Fusco, "40–70 GHz 13 Gbps 1-dB Loss SPST and SPDT Differential Switches in 0.35 μm SiGe Technology," Active RF Devices, Circuits and Systems Seminar, Belfast, 2011, pp. 11-15.
[62] L. Zhao, W. F. Liang, J. Y. Zhou and X. Jiang, "Compact 35–70 GHz SPDT Switch With High Isolation for High Power Application," in IEEE Microwave and Wireless Components Letters, vol. 27, no. 5, pp. 485-487, May 2017.
[63] Wenju Li, Kaixue Ma and Shouxian Mou, "A Ku-band High-Isolation SPDT Switch in 0.35um SiGe BiCMOS Technology," 2016 International Symposium on Integrated Circuits (ISIC), Singapore, 2016, pp. 1-4.
[64] M. Davulcu, E. Özeren, M. Kaynak and Y. Gurbuz, "A New 5–13 GHz Slow-Wave SPDT Switch With Reverse-Saturated SiGe HBTs," in IEEE Microwave and Wireless Components Letters, vol. 27, no. 6, pp. 581-583, June 2017.
[65] Y.-L. Tsai, C.-Y. Lin, B.-C. Wang, and T.-H. Lin, “A 330-μW 400-MHz BPSK Transmitter in 0.18-μm CMOS for Biomedical Applications,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 63, no. 5, pp. 448-452, May 2016.
[66] H.-Y. Chang, T.-W. Huang, H. Wang, Y.-C. Wang, P.-C. Chao, and C.-H. Chen, “Broad-band HBT BPSK and IQ modulator MMICs and millimeter-wave vector signal characterization,” IEEE Trans. Microw. Theory Techn., vol. 52, pp.908-919, Mar. 2004.
[67] J.-H. Tsai and C.-C. Wang, “A 25–55 GHz CMOS sub-harmonic direct-conversion mixer for BPSK demodulator,” in 2008 IEEE Asia–Pacific Microw. Conf., Dec. 2008, pp. 1–4.
[68] H.-Y. Chang, S.-H. Weng, and C.-C. Chiong, “A 30–50 GHz wide modulation bandwidth bidirectional BPSK demodulator/modulator with low LO power,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 5, pp. 332–334, May 2009.
[69] H.-Y. Chang, C.-K. Lin, and Y.-C.Wang, “A 30–130 GHz ultra broadband direct-conversion BPSK modulator using a 0.5-mm E/D-phemt process,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 11, pp. 805–807, Nov. 2007.
[70] H. Takahashi, T. Kosugi, A. Hirata, K. Murata, and N. Kukutsu, “10-Gbit/s BPSK modulator and demodulator for a 120-GHz-band wireless link,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 5, pp. 1361–1368, May 2011.
[71] H. Y. Chang, "Design of Broadband Highly Linear IQ Modulator Using a 0.5 μm E/D-PHEMT Process for Millimeter-Wave Applications," in IEEE Microwave and Wireless Components Letters, vol. 18, no. 7, pp. 491-493, July 2008.
[72] Y. H. Lin, J. L. Kuo and H. Wang, "A 60-GHz sub-harmonic IQ modulator and demodulator using drain-body feedback technique," 2012 7th European Microwave Integrated Circuit Conference, Amsterdam, 2012, pp. 365-368.
[73] W. H. Lin, H. Y. Yang, J. H. Tsai, T. W. Huang and H. Wang, "1024-QAM High Image Rejection E-Band Sub-Harmonic IQ Modulator and Transmitter in 65-nm CMOS Process," in IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 11, pp. 3974-3985, Nov. 2013.
[74] C. Loyez, A. Siligaris, P. Vincent, A. Cathelin and N. Rolland, "A direct conversion IQ modulator in CMOS 65nm SOI for multi-gigabit 60GHz systems," 2012 7th European Microwave Integrated Circuit Conference, Amsterdam, 2012, pp. 5-7.
[75] M. Gavell, H. Zirath, M. Ferndahl and S. E. Gunnarsson, "A linear 70-95 GHz differential IQ modulator for E-band wireless communication," 2010 IEEE MTT-S International Microwave Symposium, Anaheim, CA, 2010, pp. 788-791. |