電子零件浸焊製程之智能性不良率評估與異常診斷模型建構研究

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姓名

張翊翔(YI-XIANG ZHANG) 查詢紙本館藏

畢業系所

機械工程學系

論文名稱

電子零件浸焊製程之智能性不良率評估與異常診斷模型建構研究

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摘要(中)

隨著電子業對產能的需求提升，為降低生產設備維護成本及提升生產效率，焊接良率高低成為電子製造業生產力的重要指標，製程監測與管控問題在生產製程變得極為重要；常見的應對方法是透過自動化光學檢測(Automated optical inspection, AOI)的方式取得焊點影像，基於規則或機器學習方法對焊點進行瑕疵檢測，藉此管控產品良率。然而AOI無得知製程狀態的訊息，對於製程狀態異常的應對仍極度仰賴製程工程師經驗進行停機、調整製程參數，當異常發生時若未及時得知及判別故障類別(如溫度異常、轉臂轉速異常等)，將導致產線後端組裝產出大量不良品，且耗費大量的生產時間。
基於上述，本研究以廠商現有RJ45連結器之高頻被動元件自動化產線製程為例，探討智能性不良率評估與異常診斷方法。首先於產線評估階段，利用部分因子實驗設計以少量的實驗組數求得關鍵參數(如焊接溫度、浸焊轉速及浸焊停留時間)，以利於架設適當感測器(如熱電偶及慣性感測器)；接著透過實驗設計模擬產線容易出現的異常狀態，利用自組織映射(Self-organizing feature maps, SOM)將數據映射於二維拓樸結構，觀察群集的分布以篩選有效特徵。爾後以多層感知機(Multilayer perceptron, MLP)建構不良率評估模型，提供不良率估計，以提早得知製程不良，減少後端失效的料件成本。最終在30組測試數據上得到1.1%的平均絕對誤差；另以SOM的輸出作為K-means++算法的訓練數據來建構異常狀態模型，在測試數據集上得到100%的F1度量(F1-measure)。本研究透過不良率評估與異常診斷模型的相互輔助，建構不良率評估及異常診斷系統，當異常發生時，產線人員可即時判斷異常製程狀態，減少調整製程所費時間成本，藉此提升產線稼動率。

摘要(英)

With the increasing demand for production capacity in the electronics industry, in order to reduce the maintenance cost of production equipment and improve production efficiency, the soldering yield rate has become an important indicator of the productivity of the electronics manufacturing industry. Process monitoring and control issues have become extremely important in the production process; the common way to solute the problem is to capture the solder joint image by means of automated optical inspection (AOI), and perform defect detection on the solder joint based on the rule or machine learning method, thereby controlling the product yield. However, the AOI has no information on the process status. The process status abnormality still relies on the process engineer experience to stop and adjust the process parameters. If the abnormality occurs and fault category (such as temperature abnormality and arm revolution speed) is unknown on time, that will result in a large number of defective products at the back end of the production line, and it takes a lot of production time.
Based on the above, this study takes the RJ45 connector of high-frequency passive component of automatic production line as an example to discuss the intelligent defect rate evaluation and abnormal diagnosis methods. First, in the production line evaluation stage, the partial factor experiment design is used to obtain key parameters (such as soldering temperature, dip soldering speed and dip soldering dwell time) with a small number of experimental groups to facilitate the installation of appropriate sensors (such as thermocouples and habits). Then, through experiments, the abnormal state that is occur frequently in the production line is simulated. The self-organizing feature maps (SOM) mapping the data to the two-dimensional topological structure, and the distribution of the cluster is observed to select effective features. Subsequently, the multi-layer perceptron (MLP) used to construct a defect rate evaluate model to provide an estimate of the defect rate, so as know the poor process and reduce the cost of the back-end failure. Finally, the defect rate evaluate model obtain the score of average absolute error 1.1% on 30 sets of test data. The output of SOM was used as the training data of K-means++ algorithm to construct the abnormal state model, and 100% F1 measure (F1-measure) was obtained on the same test data set as above. In this study, through the mutual assistance of the defect rate evaluate and the abnormal diagnosis model, the defect rate evaluation and abnormality diagnosis system are constructed. When an abnormality occurs, the production line personnel can immediately judge the abnormal process state and reduce the time cost of the adjustment process, thereby improving the production line rate.

關鍵字(中)

★ 自組織映射
★ 多層感知機
★ k-平均演算法
★ 焊接製程智能應用

關鍵字(英)

★ self-organizing map
★ multi-layer perceptron
★ K-means++
★ soldering process intelligent application

論文目次

摘要 V
Abstract VI
致謝 VII
目錄 VIII
圖目錄 X
表目錄 XII
第一章緒論 1
1-1 研究動機與目的 1
1-2 文獻探討 3
1-3 論文範疇 6
第二章理論基礎 7
2-1 二水準部分因子實驗 7
2-2 類神經網路 10
2-2-1 多層感知機 10
2-2-2 自組織映射 13
2-2-3 K-means++演算法 16
2-3 模型性能指標 17
第三章感測融合系統建構 18
3-1 焊點瑕疵模式 18
3-2 關鍵參數選擇 20
3-3 監測架構 22
3-4 使用者介面 24
第四章焊點不良率評估與製程異常診斷模型 25
4-1 數據蒐集與分集 25
4-2 數據前處理 27
4-2-1 感測失效數據 27
4-2-2 特徵提取 29
4-2-3 特徵篩選 31
4-3 不良率評估模型訓練 32
4-4 異常診斷模型訓練 34
第五章模型應用測試與討論 36
第六章結論與未來展望 41
6-1 結論 41
6-2 未來展望 41
參考文獻 42
附錄 A 不良率評估模型訓練過程 45

參考文獻

[1] 鍾俊元，「電子零組件產業現況與展望」，證券服務，654期，100-102頁，2016。
[2] 台灣趨勢研究股份有限公司:被動電子元件製造業發展趨勢。2012年，取自https://www.twtrend.com/upload/shares/a_13282361700.pdf
[3] 湧德電子:RJ45 ICM Connector。2019年，取自http://www.ude-corp.com/frontproduct/product1/lang/en/BigId/50.html。
[4] 電子狂人:何謂SMT(Surface Mount Technology)表面貼焊(裝)技術?。2013年，取自
http://www.researchmfg.com/2013/10/smt-surface-mount-technology/。
[5] K. Suganuma, “Advances in lead-free electronics soldering”, Current Opinion in Solid State and Materials Science, Vol. 5(1), pp. 55-64, January 2001.
[6] 白蓉生，2009年版電路板術語手冊，台灣電路板協會出版，桃園，2009。
[7] I. E. Anderson and J. L. Harringa, “Elevated temperature aging of solder joints based on Sn-Ag-Cu: Effects on joint microstructure and shear strength”, Electronic Materials, Vol. 33(12), pp. 1485-1496, December 2004.
[8] H. C. Tsai, M. C. Liao and C. H. Lee, “Formation and growth of intermetallics evolution at the SAC305 and SAC0307 solder joints after wave soldering”, 2010 5th International Microsystems Packaging Assembly and Circuits Technology Conference, pp. 1-4, Taipei, Taiwan, October 2010.
[9] 白蓉生，電路板與無鉛焊接，全華圖書出版，桃園，2007。
[10] Ning-Cheng Lee, Lead-free soldering-where the world is going, Society of manufacturing engineers, Indium Corporation of America, Clinton, 2000.
[11] J. Glazer, “Metallurgy of low temperature Pb-free solders for electronic assembly”, International Materials Reviews, Vol. 40(2), pp.65-93, November 1995.
[12] 顧靄雲、張海程和徐民，表面組裝技術（SMT）基礎與通用工藝，電子工業出版社，北京，2014。
[13] G. S. Wable, S. Chada, B. Neal and R. A. Fournelle, “Solidification shrinkage defects in electronic solders“, The Journal of The Minerals, Metals & Materials Society, Vol. 57(6), pp. 38-42, July 2005.
[14] 玖琪實業有限公司:電子廠全面DIP波峰焊工藝流程及波峰焊接的缺陷不良原因分析。2017年，取自http://www.dgjiuqi.com/NewsView.asp?ID=403。
[15] T. N. Tsai, “Development of a soldering quality classifier system using a hybrid data mining approach”, Expert Systems with Applications, Vol. 39(5), pp. 5727-5738, April 2012.
[16] Y. H. Lin, W. J. Deng, J. R. Shie and Y. K. Yang, “Optimization of reflow soldering process for BGA packages by artificial neural network”, Microelectronics International, Vol. 24(2), pp. 64-70, April 2007.
[17] T. Cang, E. S. Pan and M. X. Zhang, “Optimization study of reflow soldering profile for Surface Mount Technology”, 2011 International Conference on Computer Science and Network Technology, pp. 1772-1775, December 2011.
[18] T. N. Tsai, “Thermal parameters optimization of a reflow soldering profile in printed circuit board assembly: A comparative study”, Applied Soft Computing, Vol. 12(8), pp. 2601-2613, August 2012.
[19] T. N. Tsaia and M. Liukkonen, “Robust parameter design for the micro-BGA stencil printing process using a fuzzy logic-based Taguchi method”, Applied Soft Computing, Vol. 48(1), pp. 124-136, November 2016.
[20] N. Khadera, S. W. Yoona and D. Lib, “Stencil Printing Optimization using a Hybrid of Support Vector Regression and Mixed-integer Linear Programming”, Procedia Manufacturing, Vol. 11(1), pp. 1809-1817, January 2017.
[21] N. Morad, “Development of an intelligent system for the solder paste printing process”, 2000 TENCON Proceedings. Intelligent Systems and Technologies for the New Millennium, pp. 479-483, Kuala Lumpur, Malaysia, September 2000.
[22] D. W. Coit, B. T. Jackson and A. E. Smith, “Neural network open loop control system for wave soldering”, Electronics Manufacturing, Vol. 11(1), pp. 95-105, March 2002.
[23] M. Liukkonen, T. Hiltunen, E. Havia, H. Leinonen and Y. Hiltunen, “Modeling of Soldering Quality by Using Artificial Neural Networks”, IEEE Transactions on Electronics Packaging Manufacturing, Vol. 32(2), April 2009.
[24] M. Liukkonen, E. Havia, H. Leinonen and Y. Hiltunen, “Application of self-organizing maps in analysis of wave soldering process”, Expert Systems with Applications, Vol. 36(3), pp. 4604-4609, April 2009.
[25] M. Liukkonen, E. Havia, H. Leinonen and Y. Hiltunen, “Quality-oriented optimization of wave soldering process by using self-organizing maps,” Applied Soft Computing, Vol. 11(1), pp. 214-20, January 2011.
[26] 葉怡成，實驗計劃法-製程與產品最佳化，五南圖書出版公司，台北，2005。
[27] S. Haykin, Neural networks: a comprehensive foundation, Prentice Hall, 1994.
[28] 李航，統計學習方法，清華大學出版社，北京，2012。
[29] I. Goodfellow, Y. Bengio and A. Courville, Deep learning, MIT press, 2016.
[30] M. Nielsen, Neural Networks and Deep Learning, Determination press, San Francisco, CA, USA., 2015.
[31] 周志華，機器學習，清華大學出版社，北京，2016。
[32] 范淼和李超，Python 機器學習及實踐—從零開始通往 Kaggle 競賽之路，崧博出版，北京，2019。
[33] H. Ritter and T. Kohonen, “Self-organizing semantic maps”, Biological Cybernetics, Vol. 61(4), pp. 241-254, August 1989.
[34] E. A. Uriarte and F. D. Martin, “Topology Preservation in SOM”, Mathematics and Computer Sciences, Vol. 1(1), pp. 19-22, August 2008.
[35] B. H. Ott, A convergence criterion for self-organizing maps, University of Rhode Island, 2012.
[36] M. Zhang and K. F. Duan, “Improved Research to K-means Initial Cluster Centers”, 2015 Ninth International Conference on Frontier of Computer Science and Technology, pp. 349-353, Dalian, China, 2015.
[37] Honeywell, “3-Axis Digital Compass IC”, HMC5843 datasheet, 2009.
[38] Atmel, “Atmel AVR 8-Bit Microcontroller”, ATmega328 datasheet, 2015.
[39] Scikit-Learn: Cross-validation: evaluating estimator performance.2019, Retrieved from https://scikit-learn.org/stable/modules/cross_validation.html.
[40] T. Kohonen, “Self-organized formation of topologically correct feature maps”, Biological Cybernetics, Vol. 43(1), pp. 59-69, January 1982.

指導教授

潘敏俊(Min-Chun Pan)

審核日期

2019-10-15

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