博碩士論文 106451030 詳細資訊




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姓名 楊惠清(Hui-Ching Yang)  查詢紙本館藏   畢業系所 企業管理學系在職專班
論文名稱 半導體封測廠生產力分析模型與應用
(The model and analysis of productivity in semiconductor field _case in IC assembly industry)
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摘要(中) 生產規劃對半導體製造商尤其重要,規劃產能的目標是獲取最大產出結果外,也因 製造設備的高資本下,業者被要求維持高使用率確保財務上的平衡,以利公司長久的競 爭力。目前製造商的作法是維持高產出,如積極拉攏新生意甚至不惜降低售價,或減少 機台稼動率以縮短週期時間(Cycle-Time)去完成現有訂單。而生產規劃系統能準確的說 明週期時間的影響,與資源利用率可能會替公司創造優勢。

而在過去的生產規劃,製造商有產能不足的警訊會從:產品週期時間被拉長與每月 客戶發出預估的需求量得知,此時,製造商再評估是否需擴充產能,添購新設備以解決 產能不足之情形。擴充產能可以做為產能不足的解決方案,但當市場需求銳減時,過多 的產能不知該如何處置。

本研究目的即為,利用生產力模型取得生產平衡,以兩模型串聯式批量生產模型搭 配總生產效率模型(Total Operational Efficiency;TOE)達到生產平衡。此外,半導體供應 鏈之製程非常多,通常會以批量生產來達到生產彈性,本研究會透過串聯式批量生產模 型,分析各站點製造、調機和搬運時間,以找出更合理的生產週期。縮短週期時間意味 著成品越快被製作出來,現金回收週期縮短、增加營收的可能,但也表示產能利用率可 能會受週期時間波動影響,故本研究希望週期時間縮減情況下,也有提升產出量的目標。

研究結果發現,生產週期會受批量數量影響,而批量過多則使生產週期拉長,並影 響產出。再者,在現有生產水準下,利用串聯式批量生產模型搭配總生產效率模型(Total Operational Efficiency;TOE),縮減週期時間提升產出量,以案例公司發現,顯著日產量 增加40%,週期時間縮減37%。故透過本研究,協助設計廠商或是代工廠商了解生產週 期與產出量的相互影響關係,生產製造商也可以利用本文兩個模型發展更適配的生產規 劃。
摘要(英) The production planning is most important for manufacturer in semiconductor industry. Purpose of planning capacity is not only obtain maximum throughput but also maintain the balance between capital asset and high machine usage for long-term competitiveness in this industry. Now the behavior of manufacturer is actively accepting and creating new business or decreasing the utilization reduce the cycle time to maintain the balance. We can say production planning be impacted by cycle time and the usage of resource may create advantage for the company.

For the past production planning, manufacturer find capacity shortage at cycle time lengthened and forecast from customer per month. At the same time, manufacturer will evaluate expend the capacity or not and usually purchase the equipment solve the shortage. It is one of solution for capacity shortage, but overmuch capacity will occur the demand sharp decrease.

This research is looking forward to increase the capacity by two models- serial process batching model and total operational efficiency model. Besides, the semiconductor process is pretty much, and usually use batch production more flexible. The research will use serial process batching to analysis the cycle time including process time, setup time and handling time and to get more proper cycle time. On the other hand, shorter cycle time means faster product produced and shorter the cash payback period. But fluctuation of cycle time will impact capacity utilization, we also want short the cycle time and raise the throughput at the same time.

Finally, the cycle time will fluctuated by number per batch. If number is large, the cycle time will be lengthened and impact the throughput. We use the serial process batching model and total operational efficiency model to increase the capacity by down CT. Based on the case company, we estimate the throughput will increase 40% and the cycle time decrease 37%. The IC design house get more understand on production manufacturer and help manufacturer develop his own production planning through this research.
關鍵字(中) ★ 產出量
★ 週期時間
★ 串聯式批量生產模型
★ TOE 模型
關鍵字(英) ★ Throughput
★ Cycle-Time
★ Serial Process Batching Model
★ Total Operational Efficiency Model
論文目次 中文提要 …………………………………………………………………………… i
英文提要 …………………………………………………………………………… ii
誌謝 …………………………………………………………………………… iii
目錄 …………………………………………………………………………… iv
圖目錄 …………………………………………………………………………… v
表目錄 …………………………………………………………………………… vi
符號說明 …………………………………………………………………………… vii
1、研究動機與目的 ........................................................ 1
1.1 研究動機 ........................................................... 1
1.2 研究目的 ........................................................... 2
2、問題陳述與分析 ........................................................ 5
2.1 封裝全製程介紹 ..................................................... 5
2.2 半導體封測廠之生產力管理 .......................................... 11
2.3 產能與收益分析 .................................................... 12
3、文獻回顧與方法架構 ................................................... 15
3.1 增加總產出之文獻回顧 .............................................. 15
3.2 縮減 CT 之文獻回顧 ................................................. 18
4、模型發展 ............................................................. 21
4.1 加工時間依各站點拆解 .............................................. 23
4.2 修正 CT 以代入 Throughput 模型 ...................................... 24
5、應用案例 ............................................................. 26
5.1 產出量估計模型計算結果一 .......................................... 29
5.2 產出量估計模型計算結果二 .......................................... 30
5.3 週期時間估計模型計算結果一 ........................................ 30
5.4 週期時間估計模型計算結果二 ........................................ 31
6、結論與後續研究 ....................................................... 33
6.1 結論 .............................................................. 33
6.2 後續研究 .......................................................... 33
參 考 文 獻 ............................................................ 34
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指導教授 呂俊德(Jun-Der Leu) 審核日期 2019-6-24
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