博碩士論文 106521018 詳細資訊




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姓名 陳昱嘉(Yu-Jia Chen)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 砷化銦鎵/砷化銦鋁平台式雙累增層單光子崩潰二極體的設計與其特性
(Design and Characteristics of Mesa-type InGaAs/InAlAs Single-Photon Avalanche Diodes with Dual Multiplication Layers)
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摘要(中) 砷化銦鎵單光子崩潰二極體 (InGaAs Single-photon Avalanche Diode, InGaAs SPAD)主要為改善以往利用矽作為主要材料的崩潰二極體,在波段超過1100 nm以上無法進行偵測的限制。應用範圍在醫療電子、光纖通訊 (Fiber-optic communication) 、自駕車操控系統等,尤其於自駕車應用當中,光達 (Lidar) 的應用更是格外重要,藉由感測器與雷射光模組以Time of flight (ToF) 技術計算行車時與路上的汽車、行人與障礙物的安全距離,在波長為905 nm的雷射光於光達系統中成熟應用,但其缺點為長期的累積下會對於人體的視網膜會造成傷害,所以趨於發展能夠偵測高波長的偵測器,以砷化銦鎵單光子崩潰二極體作為偵測器則能改善此情況,我們能夠偵測到1310 nm與1550 nm的雷射光。以砷化銦鎵與磷化銦為基礎的崩潰二極體(Avalanche photodiode, APD)至今仍蓬勃發展,除了此材料系統外,近年文獻顯示,以砷化鋁銦作為放大層有較高的崩潰機率,因此預期能有較高的光偵測效率 (Photon detection efficiency) ;故本研究以砷化銦鎵與砷化鋁銦作為結構中吸收層與累增層進行研究,主要目的為偵測波長1310 nm與1550 nm的光,元件結構包含吸收層、漸變層、電荷層、累增層,經由Silvaco TCAD軟體模擬電場大小與分布,進而計算元件結構的崩潰電壓與擊穿電壓分別為49 伏特、20 伏特;在結構設計上,我們為了降低穿隧電流以降低暗計數率,會提高累增層厚度,但厚度提高同時會使二次崩潰效應 (Afterpulsing effect) 與時閃 (Timing jitter) 變嚴重,為使兩者表現最佳化,我們在累增層中間再加入一層電荷層以讓累增層分為高電場與次高電場區,使得實際有效發生崩潰的厚度變薄,進而改善afterpulsing effect與timing jitter。
側壁包覆層的選擇上,我們選擇了兩種在文獻中可有效降低漏電流的BCB與PI,利用此兩種包覆層的元件在室溫下的崩潰電壓為42.7 伏特,擊穿電壓為25 伏特,溫度係數為49 mV/K,並取在漏電流與暗計數率量測下結果較好的BCB進行後續光量測;在脈衝寬度為20 ns、溫度187.5 K、過量偏壓3 %的操作條件下,光偵測效率可達到39 %,暗計數率為19 %,暗計數率表現不佳,其主要來自二次崩潰的影響,為此我們降低脈衝寬度至5 ns,無論在室溫或低溫187.5 K,二次崩潰機率在500 kHz操作下可低於1%;暗計數率在187.5 K、過量偏壓8%下,下降至2.9 %,此時光偵測效率為32.3 %,timing jitter為61 ps,timing jitter tail僅有13 ps;該元件亦具備室溫操作之特性,在室溫、過量偏壓8%操作下,暗計數率為19 %,光偵測效率達26 %,timing jitter為72 ps、timing jitter tail為17 ps。
摘要(英) InGaAs based Single-photon Avalanche Diode (SPAD) instead of Si SPAD is studied for the detection of light with wavelength longer than 1μm. It has great potential in the applications of medical electronics, fiber-optic communication, self-driving control systems and etc. The application of Light Detection and Ranging (Lidar) receives especial attention. In such application, SPAD can acts as a ToF sensor to accurately calculate the safe range of the car from the car in proximity, pedestrians and obstacles. InGaAs/InP based SPAD had been studied for a long time and is currently still active. Along with the multiplication layer using InP, the multiplication using InAlAs recently receives much interest due to its higher avalanche triggering probability, so a higher photon detection efficiency (PDE) is anticipated. This work focuses on the study of InGaAs/InAlAs based SPAD which is composed with absorption, grading, charge and multiplication layer. We use Silvaco technology computer-aided design (TCAD) to simulate the electric field strength and distribution for the determination of breakdown voltage (49 V) as well as punch-through voltage (20 V). In a typical SPAD design, the multiplication layer should be thick enough for reducing the tunneling current and hence suppressing the dark count rate (DCR). However, as the thickness of multiplication layer increases, the afterpulsing effect and the timing jitter will also get worse. Therefore, a unique design in the multiplication layer is proposed to compromise DCR, afterpulsing and jitter. The multiplication layer is separated into two layers with different electric field strength by an additional charge layer, which makes the effective avalanche region narrower, and hence improving the afterpulsing effect and the timing jitter.
SPAD devices are processed into mesa-type to define the active detection region. The sidewall of mesa is first treated by the sulphidation and protected by the passivation for reducing the leakage current. The anode and cathode are plated with p/n metal respectively and then wired bond to a PCB for subsequent measurement, including current-voltage characteristics, capacitance-voltage characteristics, dark count rate analysis, afterpulsing probability, photon detection efficiency, and jitter.
For the sidewall passivation, we chose BCB and PI which can effectively reduce the leakage current according to the literature. The breakdown voltage and punch-through voltage of our SPAD device are 42.7 V and 25 V at room temperature respectively. The temperature coefficient is 49 mV / K. The subsequent measurements are carried out for the SPAD device passivated by BCB since it has better performance in the leakage current and dark count rate. Under the operation condition of gating pulse width of 20 ns, the temperature of 187.5 K and the excess bias of 3 %, the PDE reaches 39 % and the dark count rate is 19 %. Since the dark count rate is really high at such long pulse width for the reason of serious afterpulsing effect, we further reduce the gating pulse width to 5 ns. The afterpulsing is thus greatly reduced to below 1 % while operating at 500 kHz either for room temperature or for 187.5 K. We obtain the best DCR of 0.5 % per gate, the PDE of 26 % and timing jitter is 72 ps at 187.5 K for the excess bias of 7 %. It is worthy to emphasize that our SPAD device can perform well at room temperature, with the DCR of 13 % and PDE of 18 %, under the excess bias of 7 %.
關鍵字(中) ★ 砷化鋁銦
★ 單光子累增崩潰二極體
★ 高時閃
★ 砷化銦鎵
關鍵字(英)
論文目次 目錄
中文摘要………………………………………………………………….i
英文摘要 Abstract……………………………………………………...iii
誌謝………………………………………………………………………v
目錄……………………………………………………………………..vii
圖目錄……………………………………………………………………x
表目錄……………………………………………………….………….xv
一、前言…………………………………………………………………1
1.1研究背景……………………………………………………..1
1.2 論文架構……………………………………………………...2
二、單光子累增崩潰二極體……………………………………………3
2.1 APD基本元件物理………………………………………….3
2.1.1 操作模式與I-V特性分析…………………………..3
2.1.2 蓋格模式下的崩潰機制……………………………..6
2.1.3 偵測器結構設計……………………………………..8
2.1.4 偵測器之電場分布探討……………………………10
2.2 參數介紹…………………………………………………...10
2.2.1光偵測效率………………………………………….10
2.2.2暗計數……………………………………………….11
2.3 元件操作截止電路………………………………………...14
2.3.1閘控模式電路……………………………………….14
2.3.2主動截止電路與被動截止電路…………………….17
2.3.3 自我截止電路………………………………………18
三、元件結構設計與製程…………………………………………..…19
3.1 結構設計………………………………………………...…19
3.1.1吸收層…………………………………………….…19
3.1.2累增層…………………………………………….....20
3.1.3場控層與漸變層…………………………………….23
3.1.4結論………………………………………………….24
3.2 光罩圖案與校準圖案設計………………………………...30
3.3 元件製程…………………………………………………...33
3.3.1破片切割與清洗…………………………………….33
3.3.2平台蝕刻………………………………………….…33
3.3.3 n與p金屬電極蒸鍍………………………………..36
3.3.4 側壁包覆層…………………………………………37
3.3.5 打線墊金屬蒸鍍……………………………………38
3.3.6 抗反射層……………………………………………39
3.3.7 完整元件俯視圖……………………………………39
四、量測架構…………………………………………………………..40
4.1 電壓與電流量測方式……………………………………...41
4.2 暗計數率量測方式………………………………………...41
4.3 光計數率量測方式…………………………………..…….43
4.4 二次崩潰機率量測方式………………………………...…44
五、量測結果…………………………………………………………..46
5.1室溫下元件的電壓電流量測與良率探討…………………46
5.1.1室溫下的電壓與電流曲線量測…………………….46
5.1.2 切割與打線後室溫下的電壓與電流曲線量測……50
5.2 變溫下的量測……………………………………………...52
5.2.1 變溫下電壓與電流量測……………………………52
5.2.2 變溫下暗計數率量測………………………………56
5.2.3 二次崩潰機率與光偵測效率量測...………………70
5.3結果比較與討論……………………..………………...……82
六、未來展望…………………………………………………………..87
參考文獻………………………………………………………………..90

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指導教授 李依珊(Yi-Shan Lee) 審核日期 2020-1-9
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