博碩士論文 106521059 詳細資訊




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姓名 吳宗桓(Zong-Huan Wu)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 應用於IEEE 802.3bp車用乙太網路之硬決定與軟決定里德所羅門解碼器架構與電路設計
(Architecture and circuit Design of Hard-Decision/Soft-Decision Reed-Solomon Decoding for IEEE 802.3bp Automotive Ethernet)
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摘要(中) 本論文依據IEEE Std 802.3bpTM-2016標準的車用乙太網路規格,RS(450, 406)解碼器是專用於此通訊系統,由於經過高速傳輸,解碼器的選擇就相當重要,且解碼過程最為繁複,需先找出錯誤位置與對應之錯誤值再加以更正。在計算完徵狀值後,採用低複雜度的Berlekamp-Massey演算法、Chien search演算法和Forney演算法來硬性解碼。為了能更進一步提升更正效能,在相同碼率下軟性解碼能提高錯誤更正能力,依據經過通道後所接收的軟性資訊,計算出每個位元的可信度,並將Chase演算法加入到硬決定解碼中達到軟決定解碼,一般的Chase演算法是需要多組硬決定解碼器來計算出多組候選碼並從中選出一最佳解,不過本論文在Chase演算法增加一個判斷的決定器後,只需要一組硬決定解碼器就能完成軟決定解碼。硬體電路架構使用Verilog硬體描述語言來設計,並透過Design Compiler與 IC Compiler來驗證在製程為TSMC-40nm下的電路功能。
摘要(英) This thesis is based on the IEEE Std 802.3bpTM-2016 specification for automotive Ethernet, an RS(450, 406) decoder is specified in this transmission. Due to high-speed transmission, the choice of decoder is very important, and the decoding process is the most complicated. The error location and the corresponding numeric error should be found before correction. After syndrome computation, the low-complexity Berlekamp-Massey Algorithm, Chien search Algorithm, and Forney Algorithm are used for hard decoding. In order to further improve the correction performance, the soft decoding can improve the ability of error correction at same code rate. Based on the received soft information, the reliability of each symbol is calculated, and the hard decoding is enhanced by using the Chase algorithm to achieve soft decoding. The general Chase algorithm requires multiple hard decoders to calculate multiple candidate code. In this thesis, after adding a decision making unit to Chase algorithm, only a set of hard decoders are needed to complete the soft decoding. This design is coded on Verilog HDL, and the circuit functionality is verified by Design Compiler and IC Compiler at TSMC-40nm process.
關鍵字(中) ★ 里德所羅門碼
★ 軟決定解碼
★ 錯誤更正碼
關鍵字(英) ★ Reed-Solomon Codes
★ Soft-Decision Decoding
★ Error Correction Code
論文目次 目錄
摘要 i
Abstract ii
目錄 iii
圖目錄 v
表目錄 vii
第一章 緒論 1
1.1 背景 1
1.2 研究動機 1
1.3 論文貢獻 2
1.4 論文架構 2
第二章 里德所羅門碼 3
2.1 伽羅瓦場GF(?^?) 3
2.1.1 本質多項式與伽羅瓦場的建立 3
2.1.2 伽羅瓦場的四則運算 4
2.2 里德所羅門碼編碼演算法 5
2.3 硬決定(Hard Decision)里德所羅門碼解碼 9
2.3.1 計算徵狀值 11
2.3.2 計算錯誤位置多項式 12
2.3.3 計算錯誤位置 16
2.3.4 計算錯誤值大小 16
2.4 軟決定(Soft Decision)里德所羅門碼解碼 19
2.4.1 可信度(Reliability) 22
2.4.2 徵狀值更新(Syndrome Updater) 22
第三章 里德所羅門碼硬體架構設計 24
3.1 伽羅瓦場加減法器 24
3.2 伽羅瓦場乘法器 25
3.3 伽羅瓦場除法器 27
3.4 里德所羅門碼解碼器 27
3.4.1 可信度計算電路 28
3.4.2 排序電路 29
3.4.3 徵狀值計算電路 30
3.4.4 徵狀值更新電路 33
3.4.5 Berlekamp-Massey 演算法電路 35
3.4.6 Chien Search 演算法電路 38
3.4.7 Forney 演算法電路 40
第四章 實驗模擬與結果分析 42
4.1 軟決定解碼η值模擬分析 43
4.2 輸入訊號定點數模擬分析 44
第五章 晶片實現 46
5.1 電路設計流程 46
5.2 記憶體使用 47
5.3 模擬驗證 47
5.4 晶片設計結果 48
第六章 結論與未來展望 55
參考文獻 56
參考文獻 [1] H. C. Chang, “Research on Reed-Solomon decoder-design and implementation,” Ph.D. dissertation, National Chiao Tung Univ., Hsinchu, Taiwan, 2002.
[2] H. Brunner, A. Curiger, and M. Hofstetter. On Computing Multiplicative Inverses in GF(2m). IEEE Transactions on Computers, 42(8):1010–1015, Aug 1993.
[3] Bellorado, J. Low-Complexity Soft Decoding Algorithms for Reed–Solomon Codes. Ph.D. Thesis, Harvard University, Cambridge, MA, USA, 2006.
[4] Ali, Anum. "Soft In Soft Out Reed Solomon decoding." In 2011 International Conference on Computer Networks and Information Technology (ICCNIT). IEEE, 2011.
[5] H. Y. Hsu, A. Y. Wu, and J. C. Yeo. Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems. IEEE Transactions on Circuits and Systems II: Express Briefs, 53(11):1245–1249, Nov 2006.
[6] C. H. Hsu. “A Decision-Confined Soft Reed-Solomon Decoder for Optical Communica-tion Systems,” Master’s thesis, National Chiao Tung Univ., Hsinchu, Taiwan, 2011.
[7] H. C. Chang and C. B. Shung, “New Serial Architecture for the Berlekamp-Massey Algorithm,” IEEE Trans. Commun., vol. 47, no. 4, pp. 481-483, Apr. 1999.
[8] S. W. Lee and B. V. K. V. Kumar, “Soft-Decision Decoding of Reed-Solomon Codes Using Successive Error-and-Ersure Decoding,” IEEE GLOBECOM 2008, pp. 1–5, 2008.
[9] Koetter, R.; Vardy, A. Algebraic Soft-Decision Decoding of Reed–Solomon Codes. IEEE Trans. Inf. Theory 2003, 49, 2809–2825.
[10] R. Koetter and A. Vardy, “Algebraic Soft-Decision Decoding of Reed-Solomon Codes,” IEEE Trans. Inform. Theory, vol. 49, no. 11, pp. 2809–2825, 2003.
[11] X. Zhang and J. Zhu, “Reduced-complexity multi-interpolator algebraic soft-decision Reed-Solomon decoder,” Proc. of IEEE Workshop on Signal Processing Systems, pp. 398-403, San Francisco, CA, Oct. 2010.
[12] A. Ahmed, R. Koetter, and N. Shanbhag, “VLSI Architectures for Soft-Decision Decoding of Reed-Solomon Codes,” IEEE Trans. Inform. Theory, vol. 57, no. 2, pp. 648–667, Feb. 2011.
[13] X. Zhang, “High-speed VLSI architecture for low-complexity Chase soft-decision ReedSolomon decoding,” in IEEE Info. Theory and Application Workshop. (ITA), Feb. 2009, pp. 422–430.
[14] Xue, B. “VLSI design of a Reed-Solomon decoder for gigabit automotive ethernet” Master’s thesis, Eindhoven University of Technology, 2016.
[15] Y. M. Lin. “Area-Efficient Soft BCH and RS Decoders,” Master’s thesis, National Chiao Tung Univ., Hsinchu, Taiwan, 2011.
[16] Y. C. Huang. “An Area-Efficient Chase-type (224,216) RS Decoder for IEEE 802.15.3c Applications,” Master’s thesis, National Chiao Tung Univ., Hsinchu, Taiwan, 2009.
指導教授 薛木添(Muh-Tian Shiue) 審核日期 2021-10-27
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