| 摘要(英) |
This thesis is based on the IEEE Std 802.3bpTM-2016 specification for automotive Ethernet, an RS(450, 406) decoder is specified in this transmission. Due to high-speed transmission, the choice of decoder is very important, and the decoding process is the most complicated. The error location and the corresponding numeric error should be found before correction. After syndrome computation, the low-complexity Berlekamp-Massey Algorithm, Chien search Algorithm, and Forney Algorithm are used for hard decoding. In order to further improve the correction performance, the soft decoding can improve the ability of error correction at same code rate. Based on the received soft information, the reliability of each symbol is calculated, and the hard decoding is enhanced by using the Chase algorithm to achieve soft decoding. The general Chase algorithm requires multiple hard decoders to calculate multiple candidate code. In this thesis, after adding a decision making unit to Chase algorithm, only a set of hard decoders are needed to complete the soft decoding. This design is coded on Verilog HDL, and the circuit functionality is verified by Design Compiler and IC Compiler at TSMC-40nm process. |
| 參考文獻 |
[1] H. C. Chang, “Research on Reed-Solomon decoder-design and implementation,” Ph.D. dissertation, National Chiao Tung Univ., Hsinchu, Taiwan, 2002.
[2] H. Brunner, A. Curiger, and M. Hofstetter. On Computing Multiplicative Inverses in GF(2m). IEEE Transactions on Computers, 42(8):1010–1015, Aug 1993.
[3] Bellorado, J. Low-Complexity Soft Decoding Algorithms for Reed–Solomon Codes. Ph.D. Thesis, Harvard University, Cambridge, MA, USA, 2006.
[4] Ali, Anum. "Soft In Soft Out Reed Solomon decoding." In 2011 International Conference on Computer Networks and Information Technology (ICCNIT). IEEE, 2011.
[5] H. Y. Hsu, A. Y. Wu, and J. C. Yeo. Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems. IEEE Transactions on Circuits and Systems II: Express Briefs, 53(11):1245–1249, Nov 2006.
[6] C. H. Hsu. “A Decision-Confined Soft Reed-Solomon Decoder for Optical Communica-tion Systems,” Master’s thesis, National Chiao Tung Univ., Hsinchu, Taiwan, 2011.
[7] H. C. Chang and C. B. Shung, “New Serial Architecture for the Berlekamp-Massey Algorithm,” IEEE Trans. Commun., vol. 47, no. 4, pp. 481-483, Apr. 1999.
[8] S. W. Lee and B. V. K. V. Kumar, “Soft-Decision Decoding of Reed-Solomon Codes Using Successive Error-and-Ersure Decoding,” IEEE GLOBECOM 2008, pp. 1–5, 2008.
[9] Koetter, R.; Vardy, A. Algebraic Soft-Decision Decoding of Reed–Solomon Codes. IEEE Trans. Inf. Theory 2003, 49, 2809–2825.
[10] R. Koetter and A. Vardy, “Algebraic Soft-Decision Decoding of Reed-Solomon Codes,” IEEE Trans. Inform. Theory, vol. 49, no. 11, pp. 2809–2825, 2003.
[11] X. Zhang and J. Zhu, “Reduced-complexity multi-interpolator algebraic soft-decision Reed-Solomon decoder,” Proc. of IEEE Workshop on Signal Processing Systems, pp. 398-403, San Francisco, CA, Oct. 2010.
[12] A. Ahmed, R. Koetter, and N. Shanbhag, “VLSI Architectures for Soft-Decision Decoding of Reed-Solomon Codes,” IEEE Trans. Inform. Theory, vol. 57, no. 2, pp. 648–667, Feb. 2011.
[13] X. Zhang, “High-speed VLSI architecture for low-complexity Chase soft-decision ReedSolomon decoding,” in IEEE Info. Theory and Application Workshop. (ITA), Feb. 2009, pp. 422–430.
[14] Xue, B. “VLSI design of a Reed-Solomon decoder for gigabit automotive ethernet” Master’s thesis, Eindhoven University of Technology, 2016.
[15] Y. M. Lin. “Area-Efficient Soft BCH and RS Decoders,” Master’s thesis, National Chiao Tung Univ., Hsinchu, Taiwan, 2011.
[16] Y. C. Huang. “An Area-Efficient Chase-type (224,216) RS Decoder for IEEE 802.15.3c Applications,” Master’s thesis, National Chiao Tung Univ., Hsinchu, Taiwan, 2009. |
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