S 頻段被動與主動數位式 相位偏移器晶片之設計

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：60

、訪客IP：3.133.111.199

姓名

許家瑋(Chia-Wei Hsu) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

S 頻段被動與主動數位式相位偏移器晶片之設計
(Design of S-Band Passive and Active Digital Phase Shifter Chips)

相關論文

★ 分佈式類比相位偏移器之設計與製作	★ 以可變電容與開關為基礎之可調式匹配網路應用於功率放大器效率之提升
★ 全通網路相位偏移器之設計與製作	★ 使用可調式負載及面積縮放技巧提升功率放大器之效率
★ 應用於無線個人區域網路系統之低雜訊放大器設計與實現	★ 應用於極座標發射機之高效率波包放大器與功率放大器
★ 數位家庭無線資料傳輸系統之壓控振盪器設計與實現	★ 鐵電可變電容之設計與製作
★ 用於功率放大器效率提升之鐵電基可調式匹配網路	★ 基於全通網路之類比式及數位式相位偏移器
★ 使用鐵電可變電容及PIN二極體之頻率可調天線	★ 具鐵電可變電容之積體被動元件製程及其應用於微波相位偏移器之製作
★ 使用磁耦合全通網路之寬頻四位元 CMOS相位偏移器	★ 具矽基板貫孔之鐵電可變電容的製作與量測
★ 矽基板貫孔的製作和量測	★ 使用鐵電可變電容之頻率可調微帶貼片天線

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

相位陣列常用於雷達系統中，用於調整波束的方向；在即將佈建的第五代行動通訊系統中，相位陣列也將扮演重要的角色。在相位陣列中，相位偏移器是最關鍵的電路元件之一，其功能為提供可調的相移量。在本論文中，我們提出兩種數位式相位偏移器，分別為使用磁耦合全通網路架構的被動式相移器及利用面積縮放技巧於向量疊加式架構的主動式偏移器，並以積體電路形式實現，操作於S頻段。
全通網路過去曾用於相移器設計中。具磁耦合的全通網路，若其耦合的極性為正，可用於提升相移器的相移量。在本論文中的第二章中，我們採用耦合係數為正的磁耦合全通網路架構，設計一2.45-GHz 五位元被動式相移器，目標為一級網路即可達到180°的相移量。我們使用 TSMC 0.18-μm CMOS製程來實現相移器中的可切換式電容，並搭配一積體被動元件（IPD）製程來實現耦合電感於矽載板上，最後以覆晶鍵合技術來接合CMOS晶片與IPD載板，完成此相移器。量測結果顯示，若可切換式電容按原設計方式控制，於2.45-GHz下相移量可達179.4°，然而並非全部32種狀態下的返回損耗皆可大於10 dB。若適當調整各別可切換式電容的控制狀態，最後調整為23種狀態組合，則於2 GHz下，返回損耗皆大於 10 dB，植入損耗皆小於 14.5 dB，相移量可達 147.8°。
主動式相位偏移器常採用向量疊加式架構。在本論文的第三章中，我們使用TSMC 0.18-μm CMOS 製程來實現一3.5-GHz六位元向量疊加式主動式相移器，並採用面積縮放技巧於其可變增益放大器之設計。使用面積縮放技巧的優點在於相位誤差及振幅誤差可以藉增加可變增益放大器的控制位元數來不斷減少。量測結果顯示，在3.3–3.8 GHz間，均方根相位誤差小於 1.15°，振幅誤差在±0.45 dB 以內；於全部64種狀態下，輸入返回損耗皆大於 15 dB，輸入返回損耗皆大於 7.9 dB，增益皆大於−8.81 dB。量測均方根相位誤差小於 2°的頻率範圍為2.46–4.68 GHz。
向量疊加式相移器必須有正交訊號產生網路，常用的架構有R-C多相位濾波器及正交全通濾波器。在本論文的第四章，我們提出具磁耦合的正交全通濾波器，用於縮小晶片面積。我們使用砷化鎵積體被動元件製程來實現 1.8–2.2 GHz 正交全通濾波器。量測結果顯示，在電路性能差異不大的情況下，磁耦合正交全通濾波器的晶片面積為 0.101 mm2，而傳統正交全通濾波器晶片面積為0.154 mm2，換算下來有34%的縮減。
在本論文中，我們成功實現了S頻段被動與主動數位式相位偏移器晶片，並提出磁耦合正交全通濾波器。其中，運用面積縮放技巧的向量疊加式相移器擁有具競爭力的低相位及振幅誤差。此外，我們也驗證了磁耦合正交全通濾波器可大幅減少晶片面積。

摘要(英)

Phased array is commonly used in radar systems for beam steering. In 5th generation mobile communication system that will be deployed soon, phased array also plays an important role. Phase shifter, used for providing tunable phase shift, is one of the essential circuit components in phase arrays. In this thesis, two types of phase shifters, which are passive phase shifter based on magnetically coupled all-pass networks and vector-summing active phase shifter using area-resizing technique, are proposed. The phase shifters are realized in integrated circuit form and operate in S-band.
All-pass networks have been used in phase-shifter design. Magnetically coupled all-pass network (MCAPN) with positive coupling coefficient may be used to increase the amount of phase shift. In Chapter 2 of this thesis, a 2.45-GHz 5-bit passive phase shifter is designed based on MCAPN with positive coupling coefficient. The design goal is to achieve 180° phase shift with only one stage of network. The switched capacitors in the phase shifter are implemented using TSMC 0.18-μm CMOS technology. The coupled inductors are realized on a silicon carrier substrate using an integrated passive device (IPD) process. Finally, the phase shifter is completed by assembling the CMOS chip and IPD carrier substrate with flip-chip bonding. Measurement results show that, if the switched capacitors are controlled in the originally intended way, the phase shifter exhibits 179.4° phase shift at 2.45 GHz but the return loss is however not greater than 10 dB for all 32 states. If the controlling bits for individual switched capacitors are properly modified, ending up in 23 sets of states, then at 2 GHz, the return loss is greater than 10 dB and the insertion loss is less than 14.5 dB for these 23 sets of states. The phase shift achieved is 147.8° at 2 GHz.
Vector-summing architecture is usually adopted for the design of active phase shifters. In Chapter 3 of this thesis, a 3.5-GHz 6-bit vector-summing active phase shifter is designed in TSMC 0.18-μm CMOS. In addition, area-resizing technique is adopted for the design of the variable gain amplifiers (VGAs) in the vector-summing phase shifter. The advantage of the area-resizing technique is that the phase and amplitude errors may be indefinitely reduced by increasing the number of the controlling bits of the VGAs. Measurement results show that, from 3.3 to 3.8 GHz, the rms phase error is less than 1.15° and the amplitude error is within ±0.45 dB. For all 64 states, the input return loss is greater than 15 dB, the output return loss is greater than 7.9 dB, and the gain is greater than −8.81 dB. Moreover, between 2.46 and 4.68 GHz, the rms phase error is less than 2°.
Quadrature generation network is a necessity in vector-summing phase shifter. Common quadrature generation networks include R-C poly-phase filter and quadrature all-pass filter (QAF). In Chapter 4 of this thesis, QAF with magnetic coupling is proposed for reducing the chip area. 1.8–2.2 GHz QAFs are implemented using a GaAs-based IPD process. Measurement results show that, given that the circuit performances are similar, the magnetically coupled QAF (MCQAF) occupies a chip area of 0.101 mm2 whereas conventional QAF occupies 0.154 mm2. This translates into a 34% reduction in chip area.
In this work, S-band passive and active digital phase shifter chips are successfully realized and MCQAF is proposed. Among them, the vector-summing phase shifter that adopts area-resizing technique exhibits competitively low phase and amplitude errors. Besides, it is also demonstrated that the proposed MCQAF could considerably save chip area.

關鍵字(中)

★ 相位偏移器

關鍵字(英)

論文目次

摘要. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . III
目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VII
圖目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IX
表目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XV
第一章緒論. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 研究動機. . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 文獻回顧. . . . . . . . . . . . . . . . . . . . . . . . 3
1.2.1 被動式相移器文獻回顧. . . . . . . . . . . . . . . . 3
1.2.2 主動式相移器文獻回顧. . . . . . . . . . . . . . . . 4
1.3 論文架構. . . . . . . . . . . . . . . . . . . . . . . . 5
第二章磁耦合全通網路相位偏移器. . . . . . . . . . . . . . . 7
2.1 簡介. . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 磁耦合全通網路架構之分析. . . . . . . . . . . . . . 8
2.3 可切換式電容. . . . . . . . . . . . . . . . . . . . . 15
2.4 電路模擬與實測. . . . . . . . . . . . . . . . . . . . 17
2.4.1 電路設計與模擬. . . . . . . . . . . . . . . . . . . . 17
2.4.2 量測結果與偵錯. . . . . . . . . . . . . . . . . . . . 28
2.5 結果與討論. . . . . . . . . . . . . . . . . . . . . . . 39
第三章面積縮放技巧向量疊加式相位偏移器. . . . . . . . . 41
3.1 簡介. . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.2 面積縮放技巧. . . . . . . . . . . . . . . . . . . . . 43
3.3 電路模擬與實測. . . . . . . . . . . . . . . . . . . . 44
3.3.1 電路設計與模擬. . . . . . . . . . . . . . . . . . . . 44
3.3.2 量測結果. . . . . . . . . . . . . . . . . . . . . . . . 54
3.4 電路偵錯與重新模擬. . . . . . . . . . . . . . . . . . 59
3.5 結果與討論. . . . . . . . . . . . . . . . . . . . . . . 64
第四章正交全通濾波器. . . . . . . . . . . . . . . . . . . . . . 67
4.1 簡介. . . . . . . . . . . . . . . . . . . . . . . . . . 67
4.2 正交全通濾波器設計. . . . . . . . . . . . . . . . . . 68
4.3 電路模擬與實測. . . . . . . . . . . . . . . . . . . . 71
4.3.1 電路設計與模擬. . . . . . . . . . . . . . . . . . . . 71
4.3.2 量測結果與偵錯. . . . . . . . . . . . . . . . . . . . 76
4.4 具磁耦合電路設計與實測. . . . . . . . . . . . . . . 81
4.4.1 電路設計與模擬. . . . . . . . . . . . . . . . . . . . 81
4.4.2 量測結果與偵錯. . . . . . . . . . . . . . . . . . . . 87
4.5 結果與討論. . . . . . . . . . . . . . . . . . . . . . . 92
第五章結論. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
參考文獻. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
附錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
具磁耦合正交全通濾波器分析. . . . . . . . . . . . 103

參考文獻

[1] A. O. et al, “Scenarios for 5G mobile and wireless communications: The vision
of the METIS project,” IEEE Commun. Mag., vol. 52, no. 5, pp. 26–35, May
2014.
[2] W.-C. Chen, “Design and fabrication of phase shifters based on all-pass network,”
Master dissertation, National Central University, 2011.
[3] C.-F. Wu, “A magnetically coupled all-pass phase shifter using ferroelectric
varactors and GaAs-based on-chip inductors,” Master dissertation, National
Central University, 2019.
[4] A. L. Franc, O. H. Karabey, G. Rehder, E. Pistono, R. Jakoby, and P. Ferrari,
“Compact and broadband millimeter-wave electrically tunable phase shifter
combining slow-wave effect with liquid crystal technology,” IEEE Trans. Microw.
Theory Techn., vol. 61, no. 11, pp. 3905–3915, Nov 2013.
[5] G. Velu, K. Blary, L. Burgnies, J. C. Carru, E. Delos, A. Marteau, and D. Lippens,
“A 310/3.6-dB K-band phaseshifter using paraelectric BST thin films,”
IEEE Microw. Wireless Compon. Lett., vol. 16, no. 2, pp. 87–89, Feb 2006.
[6] M. Sazegar, Y. Zheng, H. Maune, C. Damm, X. Zhou, J. Binder, and R. Jakoby,
“Low-cost phased-array antenna using compact tunable phase shifters based on
ferroelectric ceramics,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 5, pp.
1265–1273, May 2011.
[7] M. Haghzadeh, C. Armiento, and A. Akyurtlu, “All-printed flexible microwaves
varactors and phase shifters based on a tunable BST/polymer,” IEEE Trans.
Microw. Theory Techn., vol. 65, no. 6, pp. 2030–2042, Jun 2017.
[8] R. N. Hardin, E. J. Downey, and J. Munushian, “Electronically variable phase
shifter utilizing variable capacitance diodes,” Proc. IRE (Correspondence),
vol. 48, no. 5, pp. 944–945, May 1960.
[9] S. Lucyszyn and I. D. Robertson, “Decade bandwidth hybrid analogue phase
shifter using MMIC reflection terminations,” Electron. Lett., vol. 28, no. 11, pp.
1064–1065, May 1992.
[10] F. Ellinger, R. Vogt, and W. Bächtold, “Compact reflective-type phase-shifter
MMIC for C-band using a lumped-element coupler,” IEEE Trans. Microw. Theory
Techn., vol. 49, pp. 913–917, May 2001.
[11] M. Hangai, M. Hieda, N. Yunoue, Y. Sasaki, and M. Miyazaki, “S- and C-band
ultra-compact phase shifters based on all-pass network,” IEEE Trans. Microw.
Theory Techn., vol. 58, no. 1, pp. 41–47, Jan 2010.
[12] M. Meghdadi, M. Azizi, M. Kiani, A. Medi, and M. Atarodi, “A 6-bit CMOS
phase shifter for S-band,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 12,
pp. 3519–3526, Dec 2010.
[13] Q. Xiao, “A compact L-band broadband 6-bit MMIC phase shifter with low
phase error,” in Eur. Microw. Integr. Circuits Conf., pp. 410–413, Oct 2011.
[14] X. Tang and K. Mouthaan, “Design of large bandwidth phase shifters using common
mode all-pass networks,” IEEE Microw. Wireless Compon. Lett, vol. 22,
no. 2, pp. 55–57, Feb 2012.
[15] H.-Y. Li, S.-C. Chen, and J.-S. Fu, “Ferroelectric thin-film integrated capacitor
and its application in radio-frequency phase shifter design,” in Proc. IEEE
Electrical Design Advanced Packaging and Systems Symp, pp. 146–149, 2013.
[16] F. Ellinger, H. Jackel, and W. Bächtold, “Varactor-loaded transmission-line
phase shifter at C-band using lumped elements,” ” IEEE Trans. Microw. Theory
Techn., vol. 51, no. 4, pp. 1135–1140, Apr 2003.
[17] Y. Zheng and C. E. Saavedra, “Full 360 vector-sum phase-shifter for microwave
system applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 4,
pp. 752–758, Apr 2010.
[18] T.-C. Yan, W.-Z. Lin, and C.-N. Kuo, “A 3.5-GHz phase shifter of high input
power range with digitally controlled VGA,” in Proc. IEEE Int. Symp. on
Radio-Frequency Integration Technology (RFIT), pp. 29–32, Nov. 2011.
[19] Y.-Y. Huang, Y. Y. H. Jeon, W. Woo, C.-H. Lee, and J. S. Kenney, “An ultracompact,
linearly-controlled variable phase shifter designed with a novel RC
poly-phase filter,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 2, pp. 301–
310, Feb 2012.
[20] A. Asoodeh and M. Atarodi, “A full 360 vector-sum phase shifter with very
low RMS phase error over a wide bandwidth,” IEEE Trans. Microw. Theory
Techn., vol. 60, no. 6, pp. 1626–1634, Jun 2012.
[21] T.-C. Yan, W.-Z. Lin, and C.-N. Kuo, “A 0.75–2.67 GHz 5-bit vector-sum phase
shifter,” Euro. Microw. Integr. Circuits Conf., pp. 196–199, Oct 2013.
[22] E. V. Balashov and I. A. Rumyancev, “A fully integrated 6-bit vector-sum phase
shifter in 0.18 m CMOS,” Int. Siberian Conf. Control Commun., pp. 1–5, May
2015.
[23] Y. Yu, P. G. M. Baltus, A. de Graauw, E. van der Heijden, C. S. Vaucher, and
A. H. M. van Roermund, “A 60 GHz phase shifter integrated with LNA and
PA in 65 nm CMOS for phased array systems,” IEEE J. Soild-State Circuits,
vol. 45, no. 9, pp. 1697–1709, Sep 2010.
[24] D. Pepe and D. Zito, “Two mm-wave vector modulator active phase shifters
with novel IQ generator in 28 nm FDSOI CMOS,” IEEE J. Soild-State Circuits,
vol. 52, no. 2, pp. 344–356, Feb 2017.
[25] H.-Y. Li and J.-S. Fu, “Analysis of magnetically coupled all-pass network for
phase-shifter design,” IEEE Trans. Microw. Theory Techn., vol. 62, no. 9, pp.
2025–2037, Sep 2014.
[26] J.-J. Huang, “A broadband 4 bit CMOS phase shifter using magnetically coupled
all pass networks,” Master dissertation, National Central University, 2015.
[27] Y.-C. Lee, “Varactor-based and switch-based tunable matching networks for
power amplifier efficiency enhancement,” Master dissertation, National Central
University, 2011.
[28] J.-C. Wu, T.-Y. Chin, S.-F. Chang, and C.-C. Chang, “2.45-GHz CMOS
reflection-type phase-shifter MMICs with minimal loss variation over quadrants
of phase-shift range,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 10, pp.
2180–2189, Oct 2008.
[29] H. Zarei, S. Kodama, C. T. Charles, and D. J. Allstot, “Reflective-type phase
shifters for multiple-antenna transceivers,” IEEE Trans. Circuits Syst. I, Reg.
Papers, vol. 54, no. 8, pp. 1647–1656, Aug 2007.
[30] H. Zarei and D. J. Allstot, “A low-loss phase shifter in 180 nm CMOS for
multiple-antenna receivers,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig.,
vol. 1, pp. 392–393, Feb 2004.
[31] F. Ellinger, R. Vogt, and W. Bächtold, “Ultracompact reflective-type phase
shifter MMIC at C-band with 360 phase-control range for smart antenna combining,”
IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 481–486, Apr 2002.
[32] D. Kim, Y. Choi, M. Ahn, M. G. Allen, J. S. Kenney, and P. Marry, “2.4 GHz
continuously variable ferroelectric phase shifters using all-pass networks,” IEEE
Microw. Wireless Compon. Lett., vol. 13, no. 10, pp. 434–436, Oct 2003.
[33] L. Y. Chen, R. Forse, A. H. Cardona, T. C. Watson, and R. York, “Compact
analog phase shifters using thin-film (Ba,Sr)TiO3 varactors,” in IEEE MTT-S
Int. Microw. Symp. Dig., pp. 667–670, Jun 2007.
[34] Y. Yoon, J.Kim, H.Kim, K. H. An, O. Lee, C.-H.Lee, and J. S. Kenney, “A dualmode
CMOS RF power amplifier with integrated tunable matching network,”
IEEE Trans. Microw. Theory Techn., vol. 60, no. 1, pp. 77–78, Jan 2012.
[35] G. Liu, P. Haldi, T.-J. K. Liu, and A. M. Niknejad, “Fully integrated CMOS
power amplifier with efficiency enhancement at power back-off,” IEEE J. Solid-
State Circuits, vol. 43, no. 3, pp. 600–609, Mar 2008.
[36] K. H. An, D. H. Lee, O. Lee, H. Kim, J. Han, W. Kim, C.-H. Lee, H. Kim,
and J. Laskar, “A 2.4 GHz fully integrated linear CMOS power amplifier with
discrete power control,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 7,
pp. 479–481, Jul 2009.
[37] J. Kim, Y. Yoon, H. Kim, K. H. An, W. Kim, H.-W. Kim, C.-H. Lee, and
K. Kornegay, “A linear multi-mode CMOS power amplifier with discrete resizing
and concurrent power combining structure,” IEEE J. Solid-State Circuits.,
vol. 46, no. 5, pp. 1034–1048, May 2011.
[38] F. Behbahani, Y. Kishigami, J. Leete, and A. A. Abidi, “CMOS mixers and
polyphase filters for large image rejection,” IEEE J. Solid-State Circuits, vol. 36,
no. 6, pp. 873–887, Jun 2001.
[39] K.-J. Koh and G. M. Rebeiz, “0.13-m CMOS phase shifters for X-, Ku-, and
K-band phased arrays,” IEEE J. Soild-State Circuits, vol. 42, no. 11, pp. 2535–
2546, Nov 2007.
[40] S. K. et al., “An improved wideband all-pass I/Q network for millimeter-wave
phase shifters,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 11, pp. 3431–
3439, Nov 2012.
[41] J. S. Park and H. Wang, “A transformer-based poly-phase network for ultrabroadband
quadrature signal generation,” IEEE Trans. Microw. Theory Techn.,
vol. 63, no. 12, pp. 4444–4457, Dec 2015.
[42] J. S. Park and H. Wang, “A K-band 5-bit digital linear phase rotator with
folded transformer based ultra-compact quadrature generation,” in Proc. IEEE
Radio Freq. Integrated Circuits Symp. Dig, pp. 75–78, Jun 2014.
[43] K. K. et al., “An X- and Ku- band 8-element phased-array receiver in 0.18 m
SiGe BICMOS technology,” IEEE J. Solid-State Circuits, vol. 43, no. 6, pp.
1360–1371, Jun 2008.

指導教授

傅家相(Jia-Shiang Fu)

審核日期

2019-7-25

推文