博碩士論文 107521098 詳細資訊




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姓名 紀品瑜(Pin-Yu Chi)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 應用J類連續模式技術於Ka頻段砷化鎵與C頻段氮化鎵功率放大器之研製
(Implementations on Ka-band GaAs and C-band GaN Power Amplifiers Using Class-J continuous mode Techniques)
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摘要(中) 本論文利用穩懋半導體WINTM 0.15-µm GaAs與0.25-µm GaN製程設計三顆功率放大器。電路設計上選擇操作於C頻段與Ka頻段,首先模擬不同製程之電晶體特性,選擇最佳之電晶體尺寸與操作電流密度,結合J類諧波調節網路形成寬頻且高效率匹配,最後量測電路特性以驗證電路設計之結果。
第一顆使用WINTM 0.15-µm GaAs製程於Ka頻帶之J類功率放大器,電路設計採全積體化之兩級共源極電路架構,輸出端利用緊湊的基頻、二倍頻匹配網路達到J類的設計,輸入端與級間匹配則以最大功率作最大輸出匹配。量測結果為3-dB頻寬為25.5-28.6 GHz,最大傳輸增益為16.63 dB,飽和輸出功率為27.36 dBm,1-dB 增益壓縮點輸出功率為26.46 dBm,晶片面積為1.12 (1.4 × 0.8) mm2。
第二顆使用WINTM 0.15-µm GaAs製程於Ka頻帶之J類功率放大器,電路設計採全積體化之兩級共源極電路架構,輸出端利用超緊湊的基頻、二倍頻匹配網路達到高效率J類的設計,輸入端與級間匹配則以最大功率作最大輸出寬頻匹配,量測結果為3-dB頻寬為27.4-29.1 GHz,傳輸最大增益為16.84 dB,飽和輸出功率為28.15 dBm,1-dB 增益壓縮點輸出功率為27.04 dBm,晶片面積為0.988 (1.3 × 0.76) mm2。
第三顆使用WINTM 0.25-µm GaN製程於C頻帶之J類功率放大器,電路設計採全積體化之兩級共源極電路架構,輸出端利用超緊湊的基頻、二倍頻匹配網路達到高效率J類的設計,輸入端與級間匹配則作寬頻匹配,為了應用在N77頻段,其操作頻寬為3 - 4.3 GHz,傳輸最大增益為23.94 dB,飽和輸出功率為39.62 dBm,1-dB 增益壓縮點輸出功率為39.6 dBm,晶片面積為4.342 (2.6 × 1.67) mm2。
摘要(英) The thesis developed three power amplifiers that were designed in WINTM 0.15-µm GaAs, and 0.25-µm GaN for both C-band and Ka-band operations. Firstly, the transistor characteristics of different processes were simulated to choose the best transistor size and current density. The continuous class-J technique was adapted for high efficiency and broadband matching performance. Finally, these proof-of-concepts were verified by measuring various circuit performances, such as s-parameters, output power, linearity and digital modulation characteristics.
The first chip presents a Ka-band monolithic microwave integrated circuit (MMIC) power amplifier in WINTM 0.25-µm GaAs technology. The high-efficiency performance is achieved by using continuous class-J mode for output matching networks and high power matching for both input and inter-stage matching networks. The designed power amplifier achieves a 3-dB bandwidth from 25.5 to 28.6 GHz with small signal gain of 16.63 dB. Continuous wave measurements demonstrate a maximum saturated output power of 27.36 dBm and OP1dB of 26.46 dBm, respectively. The chip size is 1.12 (1.4 × 0.8) mm2.
The second chip presents a Ka-band MMIC power amplifier in WINTM 0.25-µm GaAs technology. The high-efficiency and broadband performances are achieved by using continuous Class-J mode for fundamental and second harmonic output matching networks and high power matching for both input and inter-stage matching networks. The amplifier achieves a 3-dB bandwidth from 27.4 to 29.1 GHz with small signal gain of 16.84 dB. Continuous wave measurements demonstrate a maximum saturated output power of 28.15 dBm and OP1dB of 27.04 dBm, respectively. The chip size is 0.988 (1.3 × 0.76) mm2.
The third chip presents a C-band MMIC power amplifier in WINTM 0.25-µm GaN technology. The high-efficiency and broadband performances are achieved by using continuous Class-J mode for fundamental and second harmonic output matching networks and broadband matching for both input and inter-stage matching networks. The amplifier achieves a 3-dB bandwidth from 3 to 4.3 GHz with small signal gain of 23.94 dB. Continuous wave measurements demonstrate a maximum saturated output power of 39.62 dBm and OP1dB of 39.6 dBm, respectively. The chip size is 4.342 (2.6 × 1.67) mm2.
關鍵字(中) ★ J類功率放大器
★ 連續模式技術
關鍵字(英) ★ Class J power amplifier
★ continuous mode techniques
論文目次 摘要 I
Abstract II
誌謝 IV
目錄 V
圖目錄 VII
表目錄 X
第一章 緒論 1
1-1 研究動機 1
1-2 研究成果 2
1-3 章節簡介 2
第二章 應用於Ka頻段J類功率放大器 3
2-1 研究現況 3
2-2 J類功率放大器分析 5
2-3 考慮Cds非線性效應 8
2-4 應用於 Ka 頻段之J類功率放大器 10
2-4-1 應用於 Ka 頻段之J類功率放大器設計 10
2-4-2 電路模擬與量測結果 18
2-4-3 結果比較與討論 29
2-5 應用於 Ka 頻段之超緊湊高效率J類功率放大器 34
2-5-1 應用於 Ka 頻段之超緊湊高效率J類功率放大器設計 34
2-5-2 電路模擬與量測結果 39
2-5-3 結果比較與討論 50
第三章 應用於C頻段之瓦特級J類功率放大器 59
3-1 研究現況 59
3-2 應用於 C 頻段之瓦特級J類功率放大器 61
3-2-1 應用於 C 頻段之瓦特級J類功率放大器設計 61
3-2-2 電路模擬結果 72
3-2-3 結果比較與討論 81
第四章 結論 83
4-1 結論 83
4-2 未來方向 84
附錄A A 0.18-μm製程設計之X 頻段之Current-Reuse暨三階諧波消除技術吉爾波升頻混頻器 85
A-1 前言 85
A-2 電路架構及原理 86
A-3 電路模擬與量測結果 89
A-4 結果與討論 96
參考文獻 98
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指導教授 邱煥凱 審核日期 2020-8-17
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