| 摘要(英) |
In this paper, we randomly sprinkle dots to generate synthetic wafers for testing, and
construct a boomerang model. The number of defects in the synthetic wafer is further
analyzed through the characteristic parameters obtained from the previous research. We are
hoping that by the characteristic parameters of the data compared to the real average number
of defects, see if we can accurately calculate the average number of defects. Then, by
comparing the average number of defects, the equivalent defect efficiency value for judging
the phenomenon of wafer clustering is obtained, and it is applied to synthetic and real wafers.
The Poisson model is used as the basis for this research. First get the true average defect
number λ0, and then use various characteristic equations in previous research [11][16] to
estimate the number of defects. By adjusting different parameter conditions: wafer size, fixed
defect number, defect number in a specific interval, etc., analyze the estimated defect value
and its distribution, and finally make statistics.
Next, according to the equivalent defect efficiency value(EDE) obtained from the
previous research [16], we will make some slight corrections. Using the corrected results to
analyze the clustering phenomenon of synthetic and real wafers, and observe the results of the
wafers in different EDE. Then compared with the previous study [4] B-score to get an
equation that can be used to derive the relationship between the EDE and the standard
deviation.
Finally, we apply EDE to the homemade special wafer in [13], and observe the
relationship between the two and judge EDE we obtained from the result. Then compare these
parameters with B-score to verify the correctness of the equation we derive and the
correlation between the two parameters. |
| 參考文獻 |
[1] Jwu-E Chen, Mill-Jer Wang, Yen-Shung Chang, Shaw Cherng Shyu, and Yung-Yuan Chen, “Yield Improvement by Test Error Cancellation”, in Test Symposium (ATS), pp.258-260, Nov. 1996.
[2] C. - K. Hsu, Lin, F., Cheng, K. - T. Tim, Zhang, W., Li, X., Carulli, J. M., and Butler, K. M., “Test data analytics - Exploring spatial and test-item correlations in production test data”, in Test Conference (ITC), pp.1-10, Sep. 2013.
[3] Ming-Ju Wu, Jyh-Shing Roger Jang, and Jui-Long Chen, “Wafer Map Failure Pattern Recognition and Similarity Ranking for Large-scale Datasets”, IEEE Transactions on Semiconductor Manufacturing, vol.28, no.1, pp.1-12, Feb. 2015.
[4] F. Lin, Hsu, C. - K., and Cheng, K. - T. Tim, “Learning from Production Test Data: Correlation Exploration and Feature Engineering”, in Test Symposium (ATS), pp.236-241, Nov. 2014.
[5] F. Lin, Hsu, C. - K., and Cheng, K. - T. Tim, “Feature engineering with canonical analysis for effective statistical tests screening test escapes”, in Test Conference (ITC), pp.1-10, Oct. 2014.
[6] Takeshi Nakazawa, and Deepak V. Kulkarni, “Wafer Map Defect Pattern Classification and Image Retrieval Using Convolutional Neural Network”, in IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 31, NO. 2, MAY 2018
[7] 林正田,“Wafer Map Analysis from a Random-Defect-Source Perspective”,碩士論文﹐中央大學﹐2012.
[8] 曾國銓,“A Non-uniformly Distributed Defect Map Analysis by Quantification Model” , 碩士論文﹐中華大學﹐2013
[9] 蕭寶威,“Wafer Map Analysis from Random Distributed Defects”, 碩士論文﹐中央大學﹐2016.
[10] 葉昱緯,“Application of Boomerang Chart to Real-World Mass Production Wafer Maps”, 碩士論文﹐中央大學﹐2016.
[11] 吳雅軒,“Wafer Map Partition Analysis to Enhance Systematic Error Resolution”, 碩士論文﹐中央大學﹐2018.
[12] 林敬儒,“Identification of the Classifier for the Pattern of Spatial Randomness”, 碩士論文﹐中央大學﹐2018.
[13] 林威沅 ,“Verification of B-score Randomness by Synthetic Random Wafer Maps and Application to Special Patterns”, 碩士論文﹐中央大學﹐2019.
[14] 侯睿軒 "Model Refinement for the Classifier of the Spatial Pattern Randomness",碩士論文，中央大學，2019
[15] 吳承晏 "Applications of Yield and Randomness Homogeneity Tests to Wafer Map Analysis ",碩士論文，中央大學，2020
[16] 王佑庭” Equivalent Defect Evaluation and Its Application to Real-world Wafer Maps”,碩士論文，中央大學，2020 |
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