歐姆與蕭特基 p型閘極結構之氮化鎵電晶體特性分析與新型金屬 p型閘極結構之氮化鎵電晶體

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蔡文璇(Wen-Shiuan Tsai) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

歐姆與蕭特基 p型閘極結構之氮化鎵電晶體特性分析與新型金屬 p型閘極結構之氮化鎵電晶體
(Device Characteristics of E-mode GaN HEMTs and Novel Hybrid Schottky-ohmic Gate in p-GaN/AlGaN/GaN HEMTs)

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摘要(中)

本論文針對p型氮化鎵閘極氮化鋁鎵/氮化鎵電晶體之閘極金屬電極進行研究並提出新的電晶體結構，主要分成兩個部分討論：(1)歐姆與蕭特基電極接觸之p型氮化鎵閘極之二種商用元件量測分析和比較；(2)新型閘極電極金屬組合之p型氮化鎵閘極結構之電晶體設計和模擬。
歐姆閘極元件通常稱作GIT (gate injection transistor)，比起蕭特基閘極元件，在閘極正偏壓下會有大量電洞注入通道，透過閘極漏電流、轉換特性之第二峰值和低汲極偏壓下轉換特性出現的負汲極電流等量測結果可以驗證此現象。短時間閘極應力測試分別使歐姆閘極元件與蕭特基閘極元件臨界電壓呈現負向與正向偏移。兩種元件的閘極電容也因為歐姆與蕭特基電極接觸不同，量測結果呈現不一樣的特性。而動態開關特性(硬開關量測)使用動態導通電阻來做觀察，蕭特基閘極元件呈現在大關閉電壓下有更大的導通電阻變動量，而歐姆閘極元件有較大的開關功率損耗。
所提出的新型閘極電極金屬組合p型閘極結構氮化鎵電晶體，初步藉SILVACO TCAD模擬三種結合歐姆閘極與蕭特基閘極的結構，分別為蕭特基閘極位於歐姆閘極兩側(結構A)、蕭特基閘極位於歐姆閘極左側(結構B)和蕭特基閘極位於歐姆閘極右側(結構C)。新結構的直流電性可調整介於歐姆閘極元件與蕭特基閘極元件之間，亦即汲極電流(ID)和(IG)可以調整，可降低歐姆閘極元件的閘極漏電流，可提高蕭特基閘極元件的汲極導通電流，充分使用二種電極的優缺點。針對現有歐姆閘極元件可降低閘極電流超過兩個數量級，而對於現有蕭特基閘極元件可提升汲極導通電流超過60 mA/mm。最後總和元件導通時汲極電流、第二轉導峰值和閘極漏電流的電性模擬結果，在元件閘極總長度同為2 μm的情況下，蕭特基閘極長度介於0.8 ~ 1.8 μm的結構B有最佳特性表現。

摘要(英)

This study presents the gate characteristics of p-GaN gate HEMT. Discussion has been divided into the following two parts: (1) Measurement and analysis of ohmic p-GaN gate HEMT and Schottky p-GaN gate HEMT; (2) Simulation of p-GaN gate HEMT with new gate structure.
For the analysis of ohmic p-GaN gate HEMT and Schottky p-GaN gate HEMT, several measurements are proposed. Compare to Schottky p-GaN gate HEMT, large hole injection from p-GaN occurs in ohmic p-GaN gate HEMT under positive gate bias, which can be observed in characteristics of gate leakage current, second Gm peak in the transfer curve and negative drain on-state current under low drain bias, etc. In the short-time gate-stress-induced threshold voltage instability test, the negative and positive threshold voltage shift have shown in ohmic p-GaN gate HEMT and Schottky p-GaN gate HEMT. Different equivalent models of gate stack of the two devices result in different characteristic of the gate capacitance under positive gate bias. As for dynamic switching measurement, Schottky p-GaN gate HEMT shows higher increase in dynamic on-resistance with off-state drain applied bias change from 100 V to 600 V. However, ohmic p-GaN gate HEMT turns out to be larger switching loss, which may contribute to lower switching speed.
For the simulation of p-GaN gate HEMT with new gate structure, three hybrid Schottky-ohmic gate structures are proposed for normally-off p-GaN/AlGaN/GaN HEMT. One with Schottky-gate cover on the ohmic-gate and has part of area contact to the p-GaN surface at left side and right side of ohmic-gate (structure A) and two others only has the Schottky-gate contact to the p-GaN surface at left side or right side of ohmic-gate (structure B and C). The new devices demostrate the characteristic between ohmic p-GaN gate HEMT and Schottky p-GaN gate HEMT. when compare to ohmic p-GaN gate HEMT, gate leakage current of the new devices shows about two orders of magnitude smaller. As for Schottky p-GaN gate HEMT, on-state drain current can have over 60 mA/mm improvement in the new devices. After summarize the on-state drain current, second Gm, peak and gate leakage current, better performance shows in the new device with the optimized ratio of ohmic-gate and Schottky-gate, which are Schottky-gate contact length between 0.8 to 1.8 μm for structure B.

關鍵字(中)

★ 高電子遷移率電晶體
★ p型氮化鎵

關鍵字(英)

★ HEMT
★ p-GaN

論文目次

摘要 ii
Abstract iv
致謝 vi
目錄 vii
圖目錄 ix
表目錄 xiii
第一章緒論 1
1.1前言 1
1.2 AlGaN/GaN異質結構 2
1.3增強型氮化鎵電晶體之閘極特性文獻回顧 3
1.4研究動機與目的 19
1.5論文架構 19
第二章蕭特基p型氮化鎵閘極電晶體與歐姆p型氮化鎵閘極電晶體之特性量測分析及比較 20
2.1電流-電壓特性量測分析 20
2.1.1元件基本特性量測與分析 21
2.1.2 VTH不穩定性測試 25
2.1.3低VDS之ID-VGS量測 29
2.2 閘極電容-電壓量測與分析 31
2.3 動態導通電阻量測 32
2.4 本章總結 36
第三章新型金屬p型閘極結構之氮化鎵電晶體特性分析 37
3.1 新型金屬p型閘極結構氮化鎵電晶體設計 37
3.2 模擬結果與分析 40
3.3 本章總結 50
第四章結論 51
參考文獻 53
Publication List/Acknowledgement 58

參考文獻

[1] A. Raciti, S. A. Rizzo, N. Salerno, G. Susinni, C. Buccella, C. Cecati and M. Tinari, "State of the art and emerging solid-state power devices in the perspective of more electric aircraft," AEIT International Annual Conference, Bari, 2018, pp. 1-6, doi: 10.23919/AEIT.2018.8577345.
[2] G. Longobardi, "GaN for power devices: Benefits, applications, and normally-off technologies," International Semiconductor Conference, Sinaia, 2017, pp. 11-18, doi: 10.1109/SMICND.2017.8101144.
[3] U. K. Mishra, L. Shen, T. E. Kazior and Y. Wu, "GaN-Based RF Power Devices and Amplifiers," Proc. IEEE, vol. 96, no. 2, pp. 287-305, Feb. 2008, doi: 10.1109/JPROC.2007.911060.
[4] O. Ambacher, J. Smart, J. R. Shealy, N. G. Weimann, K. Chu, M. Murphy, W. J. Schaff, L. F. Eastman, R. Dimitrov, L. Wittmer, M. Stutzmann, W. Rieger and J. Hilsenbeck, “Two-dimensional electron gases induced by spontaneous and piezoelectric polarization charges in N- and Ga-face AlGaN/GaN heterostructures,” J. Appl. Phys., vol. 85, no. 6, pp. 3222–3233, Mar. 1999, doi: 10.1063/1.371866.
[5] M. J. Scott, L. Fu, X. Zhang, J. Li, C. Yao, M. Sievers, and J. Wang, “Merits of gallium nitride based power conversion,” Semicond. Sci. Technol., 2013, 28, 074013, doi: 10.1088/0268-1242/28/7/074013
[6] W. Saito, Y. Takada, M. Kuraguchi, K. Tsuda and I. Omura, "Recessed-gate structure approach toward normally off high-Voltage AlGaN/GaN HEMT for power electronics applications," IEEE Trans. Electron Devices, vol. 53, no. 2, pp. 356-362, Feb. 2006, doi: 10.1109/TED.2005.862708.
[7] Y. Cai, Y. Zhou, K. M. Lau and K. J. Chen, "Control of Threshold Voltage of AlGaN/GaN HEMTs by Fluoride-Based Plasma Treatment: From Depletion Mode to Enhancement Mode," IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 2207-2215, Sept. 2006, doi: 10.1109/TED.2006.881054.
[8] B. Lu, E. Matioli and T. Palacios, "Tri-Gate Normally-Off GaN Power MISFET," IEEE Electron Device Lett., vol. 33, no. 3, pp. 360-362, March 2012, doi: 10.1109/LED.2011.2179971.
[9] Y. Uemoto, M. Hikita, H. Ueno, H. Matsuo, H. Ishida, M. Yanagihara, T. Ueda, T. Tanaka and D. Ueda, "Gate Injection Transistor (GIT)—A Normally-Off AlGaN/GaN Power Transistor Using Conductivity Modulation," IEEE Trans. Electron Devices, vol. 54, no. 12, pp. 3393-3399, Dec. 2007, doi: 10.1109/TED.2007.908601.
[10] M. Ishida, Y. Uemoto, T. Ueda, T. Tanaka and D. Ueda, "GaN power switching devices," IEEE Int. Power Electron. Conf., Jun. 2010, pp. 1014–1017, doi: 10.1109/IPEC.2010.5542030.
[11] S. Kaneko, M. Kuroda, M. Yanagihara, A. Ikoshi, H. Okita, T. Morita, K. Tanaka, M. Hikita, Y. Uemoto, S. Takahashi and T. Ueda, "Current-collapse-free operations up to 850 V by GaN-GIT utilizing hole injection from drain," 27th IEEE Int. Symp. Power Semiconductor Devices ICs, 2015, pp. 41-44, doi: 10.1109/ISPSD.2015.7123384.
[12] H. Okita, M. Hikita, A. Nishio, T. Sato, K. Matsunaga, H. Matsuo, M. Mannoh and Y. Uemoto, "Through recessed and regrowth gate technology for realizing process stability of GaN-GITs," 28th IEEE Int. Symp. Power Semiconductor Devices ICs, 2016, pp. 23-26, doi: 10.1109/ISPSD.2016.7520768.
[13] C. S. Suh, A. Chini, Y. Fu, C. Poblenz, J. S. Speck and U. K. Mishra, "p-GaN/AlGaN/GaN Enhancement-Mode HEMTs," 64th IEEE Device Research Conference, State College, 2006, pp. 163-164, doi: 10.1109/DRC.2006.305167.
[14] I. Hwang, J. Kim, H. S. Choi, H. Choi, J. Lee, K. Y. Kim, J.-B. Park, J. C. Lee, J. Ha, J. Oh, J. Shin and U-I. Chung, "p-GaN Gate HEMTs With Tungsten Gate Metal for High Threshold Voltage and Low Gate Current," IEEE Electron Device Lett., vol. 34, no. 2, pp. 202-204, Feb. 2013, doi: 10.1109/LED.2012.2230312.
[15] I. Hwang, J. Oh, H. S. Choi, J. Kim, H. Choi, J. Kim, S. Chong, J. Shin and U-I. Chung, "Source-Connected p-GaN Gate HEMTs for Increased Threshold Voltage," IEEE Electron Device Lett., vol. 34, no. 5, pp. 605-607, May 2013, doi: 10.1109/LED.2013.2249038.
[16] L. Efthymiou, G. Longobardi, G. Camuso, T. Chien, M. Chen, and F. Udrea, “On the physical operation and optimization of the p-GaN gate in normally-off GaN HEMT devices” Appl. Phys. Lett., 2017, 110, 123502, doi:10.1063/1.4978690
[17] A. N. Tallarico, A. N. Tallarico, S. Stoffels, P. Magnone, N. Posthuma, E. Sangiorgi, S. Decoutere and C. Fiegna, "Investigation of the p-GaN Gate Breakdown in Forward-Biased GaN-Based Power HEMTs," IEEE Electron Device Lett., vol. 38, no. 1, pp. 99-102, Jan. 2017, doi: 10.1109/LED.2016.2631640.
[18] T.-L. Wu, B. Bakeroot, H. Liang, N. Posthuma, S. You, N. Ronchi, S. Stoffels, D. Marcon and S. Decoutere, "Analysis of the Gate Capacitance–Voltage Characteristics in p-GaN/AlGaN/GaN Heterostructures," IEEE Electron Device Lett., vol. 38, no. 12, pp. 1696-1699, Dec. 2017, doi: 10.1109/LED.2017.2768099.
[19] Y. Wang, M. Hua, G. Tang, J. Lei, Z. Zheng, J. Wei and K. J Chen, "Dynamic OFF-State Current (Dynamic IOFF) in p-GaN Gate HEMTs With an Ohmic Gate Contact," IEEE Electron Device Lett., vol. 39, no. 9, pp. 1366-1369, Sept. 2018, doi: 10.1109/LED.2018.2852699.
[20] Y. Wang, J. Wei, S. Yang, J. Lei, M. Hua and K. J. Chen, "Investigation of Dynamic IOFF Under Switching Operation in Schottky-Type p-GaN Gate HEMTs," IEEE Trans. Electron Devices, vol. 66, no. 9, pp. 3789-3794, Sept. 2019, doi: 10.1109/TED.2019.2930315.
[21] H. Li, C. Yao, C. Han, J. A. Brothers, X. Zhang and J. Wang, "Evaluation of 600 V GaN based gate injection transistors for high temperature and high efficiency applications," IEEE 3rd Workshop Wide Bandgap Power Devices Appl., 2015, pp. 85-91, doi: 10.1109/WiPDA.2015.7369300.
[22] N. Nosaka, W. Okada, T. Uematsu and T. Zaitsu, "Novel GaN GIT Gate Driving Technique Using Two-Step Turn-Off Fashion," IEEE Energy Conversion Congress and Exposition (ECCE), 2020, pp. 3131-3138, doi: 10.1109/ECCE44975.2020.9236236.
[23] H. Wang, J. Wei, R. Xie, C. Liu, G. Tang and K. J. Chen, "Maximizing the Performance of 650-V p-GaN Gate HEMTs: Dynamic RON Characterization and Circuit Design Considerations," IEEE Trans. on Power Electronics, vol. 32, no. 7, pp. 5539-5549, July 2017, doi: 10.1109/TPEL.2016.2610460.
[24] T. Oeder and M. Pfost, "Gate-Stress-Induced Threshold Voltage Instabilites, a Comparison of Ohmic and Schottky p-Gate GaN HEMTs," 2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia), 2020, pp. 1-5, doi: 10.1109/WiPDAAsia49671.2020.9360288.
[25] Infineon, “IGT60R070D1 600V CoolGaN™ enhancement-mode Power Transistor,” IGT60R070D1 datasheet.
[26] GaN systems,“GS66508B Bottom-side cooled 650 V E-mode GaN transistor Datasheet,” GS66508B datasheet.
[27] A. Stockman et al., "Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors," in IEEE Transactions on Electron Devices, vol. 65, no. 12, pp. 5365-5372, Dec. 2018, doi: 10.1109/TED.2018.2877262.
[28] Agilent Technologies, “Agilent N1267A HVSMU/HCSMU fast switch dynamic on-resistance measurement in GaN FET,” Agilent Technologies, Sep. 2013.
[29] Y. Uemoto, M. Hikita, H. Ueno, H. Matsuo, H. Ishida, M. Yanagihara, T. Ueda, T. Tanaka and D. Ueda, "A Normally-off AlGaN/GaN Transistor with RonA=2.6mΩcm2 and BVds=640V Using Conductivity Modulation," Int. Electron Device Meeting (IEDM), 2006, pp. 1-4, doi: 10.1109/IEDM.2006.346930.
[30] Silvaco Inc., “Atlas User’s Manual,” device simulation software, 2016.

指導教授

辛裕明(Yue-Ming Hsin)

審核日期

2021-9-14

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