博碩士論文 109521100 詳細資訊




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姓名 高嘉宏(Chia-Hung Kao)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 應用於毫米波封裝之覆晶連結分析與設計
(Analysis and Design of Flip-Chip Interconnect for Millimeter-Wave Packaging Applications)
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摘要(中) 本論文分為四個部分,第一部分(第一章)為介紹研究毫米波封裝的背景與動機,接著介紹封裝的類型與用途,最後說明研究毫米波封裝的方法與目的。
第二部分(第二章)吾人參考許多相關文獻,其中內容大部分多為利用π字模型(π-model)建立覆晶(Flip-Chip)封裝連接處之等效電路模型,而電路中的元件值則是針對該物理尺寸利用曲線擬合(Curve fitting)的方式計算該元件值。此種常見方法仍具有侷限性,當結構參數不同時,則會出現函數選取不當,進而產生不具有物理意義的元件值。吾人將重新分析如何在毫米波(Millimeter-Wave)頻段下,建立覆晶封裝結構的T字模型(T-model)以及該如何有效萃取具有物理意義的元件值,進而與全波模擬以及實務量測比較散射參數(S-Parameters)之差異。
第三部分(第三章)為吾人利用MATLAB程式碼運算,並提出一簡易的校正方法,首先針對參考文獻所提出的公式進行說明,接著搭配實作電路的特性,利用公式化簡計算。校正方法則先提出計算流程的原理,並將訊號流程圖(Signal flow)以傳輸矩陣表示。背對背串接的結構(即全電路)中左半電路(或右半電路)具有左右兩端的饋入結構,吾人利用自行編譯的程式碼進行計算去除兩端的饋入結構(Feeding structure)對於電路的貢獻,進而得出金屬凸塊(Solder bump)與和其連結的導體的響應。
第四部分(第四章)則是將覆晶連結的封裝結構進行實作,其中實作版本依照量測頻率上限分作為10 GHz版本與40 GHz版本。首先吾人會說明製作兩種版本電路的原因,而後再提出兩種實作的結構參數分析與設計,並利用第三章的校正方法校正40 GHz版本,而10 GHz版本因實作原因未做校正,最後將理論計算(ADS)、全波模擬(HFSS)與實務量測進行校正前後的散射參數疊圖驗證,並比較理論計算、全波模擬與其之間散射參數的差異。
第五部分(第五章)將前四章所述做結論,並說明10 GHz版本實作過程中所遇困難,並構想該如何在未來做改善,40 GHz版本則因量測結果與全波模擬有一小段差異,於此章歸納問題,並構想可能解決的方法做為未來工作。
摘要(英) This paper is divided into four Chapter. Chapter 1 introduces the background and motivation of studying millimeter-wave packaging, followed by the types and applications of packaging, and finally the methods and objectives of studying millimeter-wave packaging.
In Chapter 2, we refer to many related papers, most of them use the π-model to build the equivalent circuit model of the flip-chip interconnection, and the component values in the circuit are calculated by curve fitting for the physical dimensions. This common method still has the limitation that when the structural parameters are different, the function is not selected properly, and then the component value is not physically meaningful. We re-analyze how to build the T-model of flip-chip interconnection in the millimeter-wave and how to extract the physically meaningful component values effectively, and then compare the differences of the scattering parameters with the full-wave simulation and practical measurements.
In Chapter 3, A simple calibration method is proposed and demonstrated by using MATLAB code. The formulae in the references are used, and then the calculation is simplified based on circuit characteristics. In the calibration method, signal flow is represented as a transmission matrix by using the principle of calculation flow. In a back-to-back series structure, the left half-circuit (or the right half-circuit) has a feeding structure on the left and right ends, and we can use the code proposing in MATLAB to calculate the contribution of the feeding structure to the circuit by de-embedding the feeding structure on both ends, and then derive the response of the solder bump and the conductor connected to it.
In Chapter 4, it outlines the fabrication of the flip-chip interconnection structure, and the fabricated version is divided into 10 GHz version and 40 GHz version according to the upper limit of the measured frequency. Firstly, the reasoning for making the two versions of the circuit was explained, and then we present the analysis and design of the structure parameters for the two implementations, and use the calibration method in Chapter 3 to calibrate the 40 GHz version, while the 10 GHz version is not calibrated due to its practical implementation. Finally, the scattering parameters of the theoretical calculation (ADS), the full-wave simulation (HFSS), and the practical measurements are verified by overlaying them with each other.
In Chapter 5, concludes the previous four chapters and describes the difficulties encountered during the implementation of the 10 GHz version and considers how to improve it in the future, while the 40 GHz version has a small discrepancy between the measurement results and the full-wave simulation, and this chapter summarizes the problems and considers possible solutions for future work.
關鍵字(中) ★ π字模型
★ 覆晶
★ 曲線擬合
★ 毫米波
★ T字模型
★ 校正
★ 金屬凸塊
關鍵字(英) ★ π-model
★ Flip-chip
★ Curve fitting
★ Millimeter-wave
★ T-model
★ Calibration
★ Solder bump
論文目次 目錄
摘要 i
Abstract iii
致謝 v
目錄 vi
圖目錄 viii
表目錄 xii
第一章 緒論 1
1.1 研究背景與動機 1
1.2 封裝簡介 1
1.2.1 封裝類型 2
1.2.2 封裝功能與用途 4
1.3 研究方法與目的 4
1.3.1 文獻回顧 4
1.3.2 研究方法 9
1.3.3 研究目的 9
1.4 論文架構 10
第二章 等效電路模型 12
2.1 理論分析 12
2.2 建立π字等校電路模型 15
2.3 建立T字等效電路模型 17
2.4 比較類似文獻差異性 28
第三章 校正方法 30
3.1 TLL校正方法 30
3.2萃取金屬凸塊貢獻的電路效應 35
第四章 計算、模擬與實務量測 39
4.1 PCB製程製作10 GHz 封裝電路 41
4.2 10 GHz封裝電路結構參數設計與分析 41
4.3 10 GHz封裝電路計算、模擬與實務量測驗證 48
4.4 WIPD製程製作40 GHz 封裝電路 56
4.5 40 GHz封裝電路結構參數設計與分析 56
4.6 40 GHz封裝電路計算、模擬與實務量測驗證 66
第五章 結論與未來工作 74
參考文獻 77
附件一 80
附件二 80
附件三 80
參考文獻 參考文獻
[1] Sturdivant. Rick, Microwave and millimeter-wave electronic packaging, Artech, House Microwave Lirary, USA, 2013.
[2] Ho-Ming Tong, Yi-Shao Lai, C.P. Wong, Advanced Flip Chip Packaging, SpringerLink, New York, 2013.
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[5] Kaixuan Song, Jinchun Gao, George T. Flowers, Ziren Wang, Qingya Li, and Wei Yi, “Impact of the Ball Grid Array Connection Failures on Signal Integrity,” IEEE Holm Conference on Electrical Contacts, Conference paper, pp. 79-84, 2020.
[6] Yanbo Xu, Xiaoli Yang, Yan Li, Panpan Zuo, Hongxing Zheng, Erping Li, “Investigation of electrical discontinuity in flip-chip package,” IEEE Electrical Design of Advanced Packaging and Systems Symposium, Conference paper, pp. 79-81, 2017.
[7] D. Staiculescu, A. Sutono, J. Laskar, “Wideband Scalable Electrical Model for Microwave/Millimeter Wave Flip Chip Interconnects,” IEEE Transactions on Advanced Packaging, Vol 24, No. 3, pp. 254-259, 2001.
[8] R.J. Pratap, D. Staiculescu, S. Pinel, J. Laskar, G.S. May, “Modeling and Sensitivity Analysis of Circuit Parameters for Flip-Chip Interconnects Using Neural Networks,” IEEE Transactions on Advanced Packaging, Vol 28, No. 1, pp. 71-78, 2005.

[9] H.H.M. Ghouz, E.-B. El-Sharawy, “An accurate equivalent circuit model of flip chip interconnects,” IEEE MTT-S International Microwave Symposium Digest, Vol 3, pp. 1827-1830, 1996.
[10] M. Szymanowski, S. Safavi-Naeini, “Characterization of a flip-chip interconnect at frequencies up to 30 GHz,” Canadian Conference on Electrical and Computer Engineering. Conference Proceedings. Navigating to a New Era, Vol 2, pp. 784-787, 2000.
[11] E.B. Liao, A.A.O. Tay, S.S. Ang, H.H. Feng, R. Nagarajan, V. Kripesh, “Numerical analysis on compliance and electrical behavior of multi-copper-column flip-chip interconnects for wafer-level packaging,” IEEE Transactions on Advanced Packaging, Vol 29, No. 2, pp. 343-353, 2006.
[12] D. Staiculescu, A. Pham, J. Laskar, S. Consolazio, S. Moghe, “Analysis and Performance of BGA Interconnects for RF Packaging,” IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers, Conference paper, pp. 131-134, 1998.
[13] Arlinghaus, Sandra, Paractical Handbook of Curve Fitting, CRC Press, USA, 2020.
[14] Hongwei Liang, J. Laskar, M. Hyslop, “A broad band Through-Line-Line de-embedding technique for BGA package measurements,” IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging, Conference paper, pp. 125-128, 2001.
[15] David M. Pozar, Microwave Engineering, John Wiley & Sons, Inc., USA, 2011.
指導教授 歐陽良昱(Liang-Yu Ou Yang) 審核日期 2022-9-26
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