參考文獻 |
REFERENCES
[1] A. E. Schmitz, R. H. Walden; L. E. Larson; S. E. Rosenbaum; R. A. Metzger and J.R. Behnke, “A deep-submicrometer microwave/digital CMOS/SOS technology”, IEEE Electron Device Letters, Vol. 12, Jan. 1991, pp. 16–17.
[2] T. Yamaguchi and T. H. Yuzuriha, “Process integration and device performance of a submicrometer BiCMOS with 16-GHz ft double poly-bipolar devices”, IEEE Trans. on Electron Devices, Vol. 36, May 1989, pp. 890-896.
[3] M. Saito, M. Ono, R. Fujimoto, H. Tanimoto, N. Ito, T. Yoshitomi, T. Ohguro, H. S. Momose and H. Iwai, “0.15 mm RF CMOS technology compatible with logic CMOS for low-voltage operation”, IEEE Trans. on Electron Devices, Vol. 45, March 1998, pp. 737–742.
[4] J. Moers, D. Klaes, A. Tonnesmann, L. Vescan, S. Wickenhauser, M. Marso, P. Kordos and H. Luth, “19 GHz vertical Si p-channel MOSFET”, Electronics Letters, Vol. 35, Feb. 1999, pp. 239–240.
[5] H. Iwai, “CMOS technology for RF application”, in Proc. 22nd Int. Conference Microelectronics, Vol. 1, 1999, pp. 27–34.
[6] M. Kittler, F. Schwierz and D. Schipanski, “Scaling of vertical and lateral MOSFETs in the deep submicrometer range”, in Proc. Int. Caracas Conference on Devices, Circuits and Systems, 2000, pp. D58/1-D58/6.
[7] H. S. Momose, T. Ohguro, K. Kojima, S. Nakamura and Y. Toyoshima, “110 GHz cutoff frequency of ultra-thin gate oxide p-MOSFET on [110] surface-oriented si substrate”, in Technical Digest of VLSI Technology, 2002, pp. 156–157.
[8] R. H. Yan, K. F. Lee, D. Y. Jeon, Y. O. Kim, B. G. Park, M. R. Pinto, C. S. Rafferty, D. M. Tennant, E. H. Westerwick, G. M. Chin, M. D. Morris, K. Early, P. Mulgrew, W. M. Mansfield, R. K. Watts, A. M. Voshchenkov, J. Bokor, R. G. Swartz and A. Ourmazd, “89-GHz fT room-temperature silicon MOSFETs”, IEEE Electron Device Letters, Vol. 13, May 1992, pp. 256–258.
[9] R. H. Yan, K. F. Lee, D. Y. Jeon, Y. O. Kim, B. G. Park, M. R. Pinto, C. S. Rafferty, D. M. Tennant, E. H. Westerwick, G. M. Chin, M. D. Morris, K. Early, P. Mulgrew, W. M. Mansfield, R. K. Watts, A. M. Voshchenkov, J. Bokor, R. G. Swartz and A. Ourmazd, “High performance 0.1- mm room temperature Si MOSFETs”, in Technical Digest of VLSI Technology, 1992, pp. 86–87.
[10] Bluetooth specification version 1.0A, radio specification, pp18-31.
[11] Wireless LAN medium access control (MAC) and Physical layer (PHY) specifications: high speed physical layer in the 2.4 GHz band, IEEE Std. 802.11b, Part 11, Sep. 1997.
[12] BSIM3v3 Manual, Department of Electrical Engineering and Computer Science, University of California, CA, 1996.
[13] W. Liu, R. Gharpurey, M. C. Chang, U. Erdogan, R. Aggarwal and J. P. Mattia, “RF MOSFET modeling accounting for distributed substrate and channel resistances with emphasis on the BSIM3v3 SPICE model”, in Technical Digest of Electron Devices Meeting, 1997, pp. 309–312.
[14] J. J. Ou; X. Jin; I. Ma, C. Hu and P. R. Gray, “CMOS RF modeling for GHz communication IC’’s”, in Technical Digest of VLSI Technology, 1998, pp. 94–95.
[15] C. H. Kim, C. S. Kim, H. K. Yu, and K. S. Nam, “Unique extraction of substrate parameters of common-source MOSFETs”, IEEE Microwave and Guided Wave Letters, Vol. 9, March 1999, pp. 108–110.
[16] S. Lee and H. K. Yu, “A new extraction method for BSIM3v3 model parameters of RF silicon MOSFETs”, in Proc. of Int. Microelectronic Test Structures Conference, 1999, pp. 95–98.
[17] C. Enz and Y. Cheng, “MOS transistor modeling for RF IC design”, IEEE Journal of Solid-State Circuits, Vol. 35, Feb. 2000, pp 186–201.
[18] S. Lee and H. K. Yu, “A semianalytical parameter extraction of a SPICE BSIM3v3 for RF MOSFET’’s using S-parameters”, IEEE Trans. on Microwave Theory and Techniques, Vol. 48, March 2000, pp. 412–416.
[19] Y. Cheng and M. Matloubian, “On the high-frequency characteristics of substrate resistance in RF MOSFETs”, IEEE Electron Device Letters, Vol. 21, Dec. 2000, pp. 604–606.
[20] G. S. Gildentblat, VLSI Electronics: Microstructure Science, Vol.18, 1989, pp. 11.
[21] A. G. Sabnis and J. T. Clemens, “Characterization of Electron Velocity in the Inverted <100> Si Surface”, Tech. Digest Int. Electron Device Meet, 1979, pp. 18-21.
[22] M. S. Liang, J. Y. Choi, P. K. Ko and C. Hu, “Inversion-layer capacitance and mobility of thin gate-oxide MOSFET’s”, IEEE Trans. Electron Devices, Vol. 33, 1986, pp. 409.
[23] F. Fang and X. Fowler, “Hot-electron effects and saturation velocity in silicon inversion layer”, Journal Appl. Phys., 1969, pp. 1825.
[24] E. A. Talkhan, I. R. Manour and A. I. Barboor, “Inverstigation of the effect of driftfield-dependent mobility on MOSFET characteristics”, IEEE Trans. On Electron Devices, Vol. 19, 1972, pp. 899-916.
[25] BSIM3 version2.0 user’s manual, Department of Electrical Engineering and Computer Science, University of California, CA, march 1994.
[26] J. A. Greenfield and R. W. Dutton, “Nonplanar VLSI device analysis using the solution of Poisson’s equation”, IEEE Trans. Electron Devices, Vol. 27, 1980, pp. 1520.
[27] G. W. Taylor, “Subthershold conduction in MOSFET’s” IEEE Trans. Electron Devices, Vol. 25, 1978, pp. 337.
[28] M. C. Jeng, “Design and modeling of deep-submicrometer MOSFETs”, Ph. D. dissertation, university of California.
[29] K. Y. Toh, P. K. Ko and R. G. Meyer, “An engineering model for short-channel MOS devices”, IEEE Journal of Solid-State Circuits, Vol. 23, Aug. 1988, pp. 950-958.
[30] K. K. Hung et al, “A physics-based MOSFET noise model for circuit simulators”, IEEE Trans. Electron Devices, Vol. 37, May 1990, pp. 1323-1333.
[31] S. Lee, C. S. Kim and H. K. Yu “A small-signal RF model and its parameter extraction for substrate effects in RF MOSFETs”, IEEE Transactions on Electron Devices, Vol. 48, July 2001, pp. 1374–1379.
[32] T. C. Ng, T. N. Swe, K. S. Yeo, K. W. Chew, J. G. Ma and M. A. Do, “Small signal model and efficient parameter extraction technique for deep submicron MOSFETs for RF applications” in Proc. of IEE Circuits, Devices and, Vol. 148, Feb 2001, pp. 35–39.
[33] S. Lee and H. K. Yu, “Accurate high-frequency equivalent circuit model of silicon MOSFETs”, Electronics Letters, Vol. 35, Aug. 1999, pp. 1406 –1407.
[34] J. P. Raskin, G. Dambrine, R. Gillon, “Direct extraction of the series equivalent circuit parameters for the small-signal model of SOI MOSFETs”, IEEE Microwave and Guided Wave Letters, Vol. 7, Dec. 1997, pp. 408–410.
[35] S. Lee, H. K. Yu, C. S. Kim, J. G. Koo and K. S. Nam, “A novel approach to extracting small-signal model parameters of silicon MOSFET’’s”, IEEE Microwave and Guided Wave Letters, Vol. 7, March 1997, pp. 75–77.
[36] D. Lovelace, J. Costa and N. Camilleri, “Extracting small-signal model parameters of silicon MOSFET transistors”, IEEE MTT-S Digest, Vol. 2, 1994, pp. 865–868.
[37] J. N. Burghartz, K. A. Jenkins and M. Soyuer, “Multilevel-spiral inductors using VLSI interconnect technology”, IEEE Electron Device Letters, Vol. 17, Sept. 1996, pp. 428-430.
[38] M. Park, S. Lee, H. K. Yu, J. G. Koo and K. S. Nam, “High Q CMOS-compatible microwave inductors using double-metal interconnection silicon technology”, IEEE Microwave and Guided Wave Letters, Vol. 7, Feb. 1997, pp. 45-47.
[39] P. Q. Chen and Y. J. Chan, “Improved microwave performance on low-resistivity Si substrates by Si+ ion implantation”, IEEE Trans. Microwave Theory Tech., Vol. 48, Sept. 2000, pp. 1582–1585.
[40] S. Hara, T. Tokumitsu, T. Tanaka and M. Aikawa, “Broad band monolithic microwave active inductor and its application to miniaturise wide band amplifiers”, IEEE Trans. Microwave Theory Tech., Vol. 36, Dec. 1988, pp.1920-1924.
[41] S. G. El Khoury, “New approach to the design of active floating inductors in MMIC technology”, IEEE Trans. Microwave Theory Tech., Vol. 44, April 1996, pp. 505-512.
[42] A. Pascht, J. Fischer and M. Beeroth, “A CMOS low noise amplifier at 2.4 GHz with active inductor load”, Silicon Monolithic Integrated Circuits in RF Systems, 2001, pp. 1-5.
[43] A. Thanachayanont and A. Payne, “ VHF CMOS integrated active inductor”, Electronics Letters, Vol. 32, May 1996, pp. 999-1000.
[44] G. Mascarenhas, J. Caldinhas Vaz and J. Costa Freire, “CMOS active inductors for L band”, Asia-Pacific Microwave Conference, 2000, pp. 157-160.
[45] J. N. Yang, Y. C. Cheng, T. Y. Hsu, T. R. Hsu and C. Y. Lee, “A 1.75 GHz inductor-less CMOS low noise amplifier with high-Q active inductor load”, Midwest Symposium on Circuits And Systems, Vol. 2, 2001, pp. 816-819.
[46] R. Goyal, High frequency analog integrated circuit design, John Wiley, New York, 1995.
[47] I. E. Ho and R. L. Van Tuyl, “Inductorless monolithic microwave amplifiers with directly cascaded cells”, in Tech. Digest of IEEE MTT-S symposium, Vol. 1, May 1990, pp 515-518.
[48] U. Arz, D. F. Williams, D. K. Walker and H. Grabinski, “Accurate electrical measurement of coupled lines on lossy silicon”, IEEE Conf. on Electrical Performance of Electronic Packaging, 2000, pp. 181–184.
[49] G. Carchon and B. Nauwelaers, “Accurate transmission line characterisation on high and low-resistivity substrates”, in Proc. of IEE Microwaves, Antennas and Propagation, Vol. 148, Oct. 2001, pp. 285–290.
[50] T. M. Winkel, “An accurate and complete frequency dependent transmission line characterization using S-parameter measurements”, Electrical Performance of Electronic Packaging, 1999, pp. 133–136.
[51] M. Sung, W. Ryu, H. Kim, J. Kim and J. Kim, “An efficient crosstalk parameter extraction method for high-speed interconnection lines”, IEEE Transactions on Advanced Packaging, Vol. 23, May 2000, pp. 148–155.
[52] J. Zheng; V. K. Tripathi and A. Weisshaar, “Characterization and modeling of multiple coupled on-chip interconnects on silicon substrate”, IEEE Trans. on Microwave Theory and Techniques, Vol. 49, Oct. 2001, pp. 1733–1739.
[53] S. Zaage and E. Groteluschen, “Characterization of the broadband transmission behavior of interconnections on silicon substrates”, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol. 16, Nov. 1993, pp. 686–691.
[54] D. E. Bockelman and W. R. Eisenstadt, “Direct measurement of crosstalk between integrated differential circuits”, IEEE Trans. on Microwave Theory and Techniques, Vol. 48, Aug. 2000, pp. 1410–1413.
[55] W. Shi and J. Fang, “Evaluation of closed-form crosstalk models of coupled transmission lines”, IEEE Transactions on Advanced Packaging, Vol. 22, May 1999, pp. 174–181.
[56] A. C. Reyes, S. M. El-Ghazaly, S. Dorn, M. Dydyk, D. K. Schroder, “Silicon as a microwave substrate”, in Digest of IEEE MTT-S Symposium, Vol.3, 1994, pp. 1759–1762.
[57] G. D. Vendelin, A. M. Pavio and U.L. Rohade, Microwave circuit design using linear and nonlinear techniques, John Wiley, New York, 1990.
[58] T. H. Lee, The design of CMOS radio frequency integrated circuits, Cambridge, 1998.
[59] B. Razavi, RF microelectronics, Prentice Hall Inc, New York, 1998.
[60] M. Soyuer, K. A. Jenkins, J. N. Burghartz and M. D. Hulvey, “A 3 V 4 GHz nMOS voltage-controlled oscillator with integrated resonator”, in Tech. Digest of Int. Solid-State Circuits Conf., 1996, pp. 394–395.
[61] S. W. Yoon, E. C. Park, C. H. Lee, S. Sim, S. G. Lee, E. Yoon, J. Laskar and S. Hong, “Cross-coupled differential oscillator MMICs with low phase-noise performance”, IEEE Microwave and Wireless Components Letters, Vol. 11, Dec. 2001, pp. 495–497.
[62] F. Herzel, H. Erzgraber and P. Weger, “Integrated CMOS wideband oscillator for RF applications”, Electronics Letters, Vol. 37, March 2001, pp. 330–331.
[63] E. Cijvat, “A 0.35 mm CMOS DCS front-end with fully integrated VCO”, in Tech. Digest of IEEE International Conference on Electronics, Circuits and Systems, Vol.3, 2001, pp. 1595–1598.
[64] P. Andreani and H. Sjoland, “A 1.8 GHz CMOS VCO with reduced phase noise”, in Tech. Digest of VLSI Circuits, 2001, pp. 121–122.
[65] R. Bunch and S. Raman, “A 0.35 mm CMOS 2.5 GHz complementary -GM VCO using PMOS inversion mode varactors”, in Digest of IEEE RFIC Symposium, 2001, pp. 49–52.
[66] A. Dec and K. Suyama, “A 1.9-GHz CMOS VCO with micromachined electromechanically tunable capacitors”, IEEE Journal of Solid-State Circuits, Vol. 35, Aug. 2000, pp. 1231 –1237.
[67] H. L. Kraus, C. W. Bostian and F. Hraab, Solid state radio engineering, John Wiley, New York, 1980.
[68] P. R. Gray and R. G. Meyer, Analysis and design of analog integrated circuits, 3rd ed., John Wiley, New York, 1993.
[69] A. Giry, J. M. Fourniert and M. Pons, “A 1.9 GHz low voltage CMOS power amplifier for medium power RF applications”, in Digest of RFIC Symposium, 2000, pp. 121-124.
[70] E. Chen, D. Heo, M. Hamai, J. Laskar and D. Bien, “0.24-um CMOS technology for Bluetooth power applications”, in Tech. Digest of RAWCON 2000, 2000, pp. 163–166.
[71] D. Heo, A. Sutono, E. Chen, E. Gebara, S. Yoo, Y. Suh, J. Laskar, E. Dalton and E. M. Tentzeris, “A high efficiency 0.25 mm CMOS PA with LTCC multi-layer high-Q integrated passives for 2.4 GHz ISM band”, in Digest of IEEE MTT-S, Vol. 2, 2001, pp. 915-918.
[72] Y. C. Chen, Y. K. Yoon, J. Laskar and M. Allen, “A 2.4 GHz integrated CMOS power amplifier with micromachined inductors”, in Digest of IEEE MTT-S, Vol. 1, 2001, pp. 523-526.
[73] C. Fallesen and P. A. Asbeck, “1 W CMOS power amplifier for GSM-1800 with 55% PAE”, in Digest of IEEE MTT-S, Vol. 2, 2001, pp. 911-914.
[74] C. W. Kuo, C. C. Hsiao, C. C. Ho and Y. J. Chan, “Scaleable large-signal model of 0.18 mm CMOS process for rf power predictions”, will be published in Solid State Electronics.
[75] C. C. Ho, C. W. Kuo, C. C. Hsiao and Y. J. Chan, “A 2.4 GHz low phase noise VCO fabricated by 0.18 mm pMOS technologies”, submitted to Electronics Letters |