博碩士論文 88321007 詳細資訊




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姓名 賴義凱( Yi-Kai Lai)  查詢紙本館藏   畢業系所 化學工程與材料工程學系
論文名稱 低介電常數材料於電子束微影製程上的應用
(Direct Nano pattern Definition for Low-k Dielectric Layer by using Electron Beam Exposure)
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摘要(中) 隨著半導體技術的進步,金屬導線層的數目增加及導線間的距離不斷縮小,使得元件的尺寸也不斷地縮小,在線寬小於0.25 mm以下,電子訊號在金屬連線間傳送時,金屬連線的電阻-電容延遲時間 (RC delay time),變成半導體元件速度受限的主要原因,為了降低訊號傳遞時間的延遲,現今已發展以金屬銅 (電阻率為 2.7 mW-cm) 成為導線的連線系統,進而降低金屬導線的電阻值。另一方面則是利用低介電常數 (low-k) 材料來降低電容,傳統上以化學氣相沈積法,長出來的金屬內層介電材料,如TEOS的介電常數值大約為3.9~4.1之間,
關鍵字(中) ★ 電子束微影 關鍵字(英) ★ e-beam
論文目次 中文摘要 --------------------------------------------------------------------------i
英文摘要 ------------------------------------------------------------------------ iv
誌謝 ------------------------------------------------------------------------------ vi
目錄 ----------------------------------------------------------------------------- vii
表目錄 --------------------------------------------------------------------------- ix
圖目錄 ----------------------------------------------------------------------------x
第一章緒論
1.1簡介 ---------------------------------------------------------------1
1.2研究動機 ---------------------------------------------------------3
1.3論文組織 ---------------------------------------------------------4
第二章研究背景
2.1 低介電常數材料 ----------------------------------------------- 6
2.2 電子束微影 -----------------------------------------------------11
第三章實驗
3.1實驗製程描述 ---------------------------------------------------15
3.2實驗流程 ---------------------------------------------------------15
3.3實驗儀器 ---------------------------------------------------------16
第四章結果與討論
4.1 HSQ於低介電常數材料方面的應用 --------------------------- 18
4.2 HSQ與電子束微影製程方面的應用 ----------------------------29
第五章結論 -------------------------------------------------------------------36
第六章建議與未來研究方向 ----------------------------------------------38
參考文獻 ------------------------------------------------------------------------39
簡歷 ------------------------------------------------------------------------------43
表目錄
第一章
表1-1超大型積體電路內連線中,可能使用的低介電常數材料
表1-2 SIA Roadmap所預測之臨界層微影需求
第二章
表2-1低介電常數材料的基本要求
表2-2低介電常數材料蝕刻技術之相關文獻資料
表2-3低介電常數材料之分類
表2-4未來深次微米世代所需之介電層之介電常數表
表2-5各類電子束阻劑之製程條件
第四章
表4-1 HSQ的蝕刻條件及蝕刻速率
參考文獻 參考文獻
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指導教授 周正堂(Cheng-tung Chou) 審核日期 2001-7-9
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