應用於橢圓曲線密碼系統之低複雜性有限場乘法器設計

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莊志強(Zh-Qiang Zhuang ) 查詢紙本館藏

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電機工程研究所

論文名稱

應用於橢圓曲線密碼系統之低複雜性有限場乘法器設計

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摘要(中)

最近，由於在網際網路和電子商務快速的成長使得網路安全變成一個重要的課題，現今有非常多的工作，如購物，匯寄，電話，電子銀行，電子商務和金融交易等，都是在網際網路中送訊息。因此，在資訊的秘密性和可信賴性就特別重要。而為了保障重要資料不被竊取、破壞或任意更改，一套安全的密碼系統是非常重要的。
在這篇論文，我們專注在討論橢圓曲線密碼學(ECC)的發展改良其乘法器演算法和架構，我們主要的工作是集中在實現有限場中適用於橢圓曲線密碼學所須要用的低複雜度和高速之實現乘法運算。
我們根據改良式乘法器演算法來設計出新的第二型乘法器(Type-II multiplier)。在和Massey-Omura設計的第二型乘法器比較中，它有降低硬體中的複雜性和提高乘法器運算速度的優點。如在硬體上，新的第二型乘法器可省下25%的XOR閘的數目。另外，值得一提是在有效實現橢圓曲線密碼系統考量下，我們可利用它和第一型乘法器(Type-I multiplier)組合成新的合成第二型乘法器(Composite Type-II multiplier)。將使橢圓曲線密碼系統之乘法位元數大小(bit-size)有更好的選擇性和效能。而所得到的效能無論在硬體上的複雜性或時間的因素下，幾乎可以與第一型乘法器一樣好。最後應用所提出來的乘法器來完成在橢圓曲線密碼學中整個算術核心電路。

關鍵字(中)

★ 乘法器
★ 密碼
★ 有限場
★ 橢圓曲線

關鍵字(英)

論文目次

Contents
Contents II
List of Figures V
List of Tables VIII
CHAPTER 1INTRODUCTION1
1.1OVERVIEW OF CRYPTOGRAPHY1
1.2OVERVIEW OF ECC CRYPTOGRAPHY2
1.3MOTIVATION AND GOAL5
1.4CONTRIBUTION OF THE THESIS7
1.5THESIS ORGANIZATION8
CHAPTER 2ELLIPTIC CURVE CRYPTOSYSTEMS10
2.1HISTORY OF ELLIPTIC CURVES10
2.2MATHEMATIC BACKGROUND ON ELLIPTIC CURVES12
2.2.1THE GROUP LAW14
2.2.2ELLIPTIC CURVE ADDITION15
2.2.3ELLIPTIC CURVES OVER GF(2M)19
2.2.4POINT MULTIPLICATION ON ELLIPTIC CURVES21
2.2.5GROUP OPERATION WITH PROJECTIVE COORDINATES22
2.3SUMMARY OF ENCRYPTION/DECRYPTION IN ECC25
CHAPTER 3FINITE FIELD ARITHMETIC26
3.1CHOOSING A FIELD27
3.2REPRESENTATION OF FINITE FIELD ELEMENTS28
3.3COMPUTER ARITHMETIC IN FINITE FIELDS30
3.3.1FINITE FIELD ADDITION (FFA)30
3.3.2SQUARING IN GF(2M)32
3.3.3FINITE FIELD MULTIPLICATION (FFM)33
CHAPTER 4DESIGN OF LOW-COMPLEXITY COMPOSITE FIELDS GF((2N)M) MULTIPLIERS38
4.1PROPOSED NORMAL BASIS TYPE-II MULTIPLIER39
4.1.1IMPROVED MULTIPLICATION ALGORITHM41
4.1.2MULTIPLICATION EXAMPLE43
4.1.3COMPARISON OF MULTIPLICATION ALGORITHMS45
4.2DESIGN OF EFFICIENT NORMAL BASIS MULTIPLIER IN COMPOSITE FIELDS48
4.2.1REVIEW OF TYPE-I ONB MULTIPLIER48
4.2.2PROPOSED TYPE-II COMPOSITE FIELDS MULTIPLIER49
4.2.3COMPARISON OF OTHER MULTIPLIERS53
CHAPTER 5THE DESIGN OF ECC PROCESSOR AND SIMULATION57
5.1ARCHITECTURAL DESIGN OF ECC PROCESSOR58
5.1.1DESIGN OF POINT MULTIPLICATION UNIT58
5.1.2DESIGN OF CONTROL UNIT61
5.1.3ECC PROCESSOR DESIGN63
5.2SIMULATION RESULT67
5.2.1VERIFICATION OF OUR ARCHITECTURE67
5.2.2OTHER TESTING CASES70
CHAPTER 6CONCLUSION73

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指導教授

周世傑(Shyh-Jye Jou)

審核日期

2001-6-28

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