博碩士論文 88521084 詳細資訊


姓名 王偉州(Wei-Juo Wang )  查詢紙本館藏   畢業系所 電機工程研究所
論文名稱 高準確度及低成本之電壓量測技術
(High Precision and Low Cost Voltage Metrology)
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摘要(中) 近年來由於混合信號量測的需求遽增,加上單晶片系統 (System on chip)技術的快速發展,使得晶片容量越來越大,於是就需要快速且多針腳的測試機台來滿足日益嚴苛的測試規格要求。因此,如何能準確且快速的量測信號,儼然已成了一項複雜且困難的事。
在這個論文中,我們提出一個方法來準確的量測電壓。此一技術將可使用於PE IC 中的比較電路,以較為簡單的方法來量測。除此之外,我們會用機率與統計的數學觀點分析此方法的可行性,並推導在雜訊嚴重影響的環境下,如何得到較為準確的量測資料。除了有理論的推導證明之外,我們也會利用硬體的實作與實測以驗證此方法的可行性。
摘要(英) In recent years, the demand of mixed signal testing and fast development of system on chip technology are high due to the size of the chip grows larger and larger. However, faster and more complex test equipments are needed to meet the much demanding test specifications. Thus, test the chip precisely and efficiently becomes a difficult and more complicated task.
In this thesis, we propose a new methodology to measure voltage precisely. The method is able to utilize the comparators in Pin Electronic ICs to exercise the measurement task. The proposed technique simplifies the DAC or LCD Driver IC measurement significantly. Here, we use the probability and statistic methods to analyze the proposed methodology. Experimental results using a demo circuit and a vendor PE card have verify and confirm the feasibility of the proposed methodology.
關鍵字(中) ★ 前端驅動電路
★  數位類比轉換器測試
★  比較器
★  準確度
★  電壓量測
關鍵字(英) ★ comparator
★  DAC test
★  Pin Electronic circuit
★  pricise
★  voltage measurment
論文目次 Chapter 1 Introduction4
1.1Motivation4
1.2Thesis Organization3
Chapter 2 Voltage Measurement Survey and Application Overview4
2.1Introduction4
2.1PMU5
2.2DAC Fault Model and Its Testing6
2.3DAC testing methods10
2.4PE card13
2.5LCD driver14
2.6IEEE 1149.4 internal test19
Chapter 3 System Architecture and Test Methodology21
3.1Introduction21
3.2System Block Diagram22
3.3Probability Derivation23
3.4Confidence Level and Sampling Points27
3.5Boundary Problem30
3.6Obtain Voltage Level32
3.7Summary35
Chapter 4 Simulation Results and Hardware Implementation36
4.1Introduction36
4.2Software simulation and verification36
4.3Hardware implementation and verification40
4.4Compare and analyze the data51
Chapter 5 Conclusion58
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[17]Chua-Chin Wang, Chi-Feng Wu, Sheng-Hua Chen; Chia-Hsiung Kao “In-sawing-lane multi-level BIST for known good dies of LCD drivers” Electronics Letters, Volume: 35 Issue: 18 , 2 Sept. 1999 Page(s): 1543 —1544
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[19]“IEEE standard for a mixed-signal test bus” , IEEE Std 1149.4-1999 , 28 March 2000
指導教授 蘇朝琴(Chauchin Su) 審核日期 2001-6-29
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