高效能矽鍺互補型電晶體之研製

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姓名

廖偉明(Wei-Ming Liao) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

高效能矽鍺互補型電晶體之研製
(Design and Fabrication of high performance SiGe Complementary MOS Transistor)

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摘要(中)

本論文中，我們從設計到製作，研究深次微米Si/SiGe異質結構互補型電晶體元件在高頻與低功率消耗電路上的應用。在矽鍺應用於元件結構的設計上，我們利用二維解析軟體MEDICI 做以下幾個研究方向的結構模擬：首先，將矽鍺應用於MOS通道上，在relaxed Si1-yGey 材料上成長一strained Si1-xGex 層來當作p型電洞通道與一strained Si 層來當作n型電子通道，利用其高載子遷移率可以達到高速的要求；其次，分析矽鍺材料使用於源極與汲極之Si1-zGez S/D MOS結構，藉由異質接面能帶偏移而得以改善元件短通道效應降低功率消耗；最後發展一整合的互補型金氧半電晶體結構，使同時具有高速且低功率消耗的優點。我們除了模擬分析所設計結構的電性外，亦將探討模擬時各種機制對電性分析的影響。
我們實際製作矽鍺通道結構的p型矽/矽鍺異質結構電晶體並比較其通道鍺含量的影響，利用UHVCVD沈積三種濃度的矽鍺（鍺摻雜15％、30％、grading）當作電洞通道，並為了降低製程熱預算，避免矽鍺層應力變化，採用低壓化學氣相沉積法沉積TEOS閘極氧化層。最後利用電流-電壓等各式量測方法，探討元件之電性特性。

摘要(英)

The traits of valence band offset and enhanced carrier mobility in SiGe/Si material system have attracted a lot of attention for high-speed device applications. In this study, a two-dimensional bandgap engineering technique was performed to design a high performance 0.1 um SiGe CMOSFET. A SiGe/Si heterostructure is proposed; in which strained SiGe layers are not only designed for p-channel but also included in source/drain to form heterojunction. And strained Si layer on SiGe layer is designed for nMOS. Simulation results showed that enhanced current-drive capability and reduced short channel effects are achievable within the proposed structure, which indicates that Si1-xGex/Si CMOSFET is a great benefit for high-speed and low-power CMOS circuit applications. And our experiment measurement result also shows the SiGe channel pMOS have better drive current and low substrate swing.

關鍵字(中)

★ 矽鍺
★ 互補型金氧半電晶體
★ 高效能

關鍵字(英)

★ SiGe
★ CMOS
★ high performance

論文目次

摘要………………………………………………………………....Ⅰ
致謝…………………………………………………………………Ⅱ
圖目錄……………………………………………………………....Ⅲ
表目錄……………………………………………………………... Ⅷ
序章論文結構介紹………………………………………………Ⅸ
第一章介紹………………………………………………………..1
1-1研究背景與動機…………………………………………..1
1-2矽鍺材料簡介……………………………………………..2
1-3 CMOS短通道效應簡介……………………………….…4
第二章元件模擬分析之機制選擇………………………………12
2-1前言…………………………………….………………...12
2-2 MODEL選擇與討論…………………………………….12
2-2-1 Band-to-band tunneling model……………....12
2-2-2 Heterojunction tunneling & thermionic emission model……………………………………….13
2-2-3 Hydrodynamic model………..……………....13
2-2-4 Mobility 相關機制………..……………..….15
2-3元件材料參數設定…………………………………….....15
第三章矽鍺通道金氧半電晶體…………………………………21
3-1前言…………………………………….………………...21
3-2結構設計…………………………………………………21
3-3模擬結果與分析…………………………………………22
3-3-1能帶與電洞濃度分怖……………………….22
3-3-2 I-V特性分析與效能比較…………………..24
3-4矽鍺通道可能伴隨之缺點………………………………27
第四章矽鍺源汲極金氧半電晶體……………………………....37
4-1前言…………………………………….………………...37
4-2結構設計………………………………………………....37
4-3模擬結果與分析…………………………………………38
4-4副作用分析……………………………………………....39
第五章金氧半電晶體……………………………………………52
5-1前言…………………………………….………………...52
5-2 n-MOS結構設計與整體最佳化………………………...52
5-3結構模擬分析……………………………………………54
5-3-1能帶與I-V特性分析……………………….54
5-3-2次臨界特性與元件速度……………………56
5-3-3總結……………..…………………………..57
5-4實作考量………………………………………………...58
5-5結論……………………………………………….……..59
第六章矽鍺金氧半電晶體製程………………………………...69
6-1前言…………………………………….………………..69
6-2製程步驟………………………………………………...69
6-3 I-V量測電性量測……………………………………....71
6-4總結……………………………………………………...76
第七章結論與未來展望………………………………………...89
參考文獻資料…………………………………………………….90

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指導教授

李佩雯(Pei-Wen Li)

審核日期

2002-7-12

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