博碩士論文 91226011 詳細資訊




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姓名 張勝雄(Sheng-Hsiung Chang)  查詢紙本館藏   畢業系所 光電科學與工程學系
論文名稱 以光電化學氧化法製作n型砷化镓MOS元件及其特性研究
(Gate Oxide Layer of n+-GaAs MOS DeviceUsing Photoelectrochemical Oxidation Method)
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摘要(中) 中文摘要
在此論文,我們試著使用光電化學氧化法﹙PEC oxidation method﹚將undoped-Al0.3Ga0.7As氧化。以鹽酸及氨水作為PEC method的電解液,進而以PEC method成長氧化層,此氧化層被稱為PEC氧化層。然後使用高溫爐對PEC氧化層進行熱處理,以提升PEC氧化層的絕緣特性。
首先,利用PEC method的測試來決定氧化undoped-Al0.3Ga0.7As的條件。使用適當的氧化條件成長PEC氧化層,以作為金氧半﹙MOS﹚元件的氧化層。我們製作四組不同氧化層條件的MOS電容,利用此實驗來研究PEC氧化層的材料特性。在MOS電容的電流–電壓量測,得知PEC氧化層的負偏漰潰電場為5.78MV/cm。在MOS電容的電容–電壓量測,並經由計算,得知PEC氧化層與n+型砷化鎵﹙n+-GaAs﹚的界面態位密度約2.55~3.21×1011cm-2eV-1。
最後,以光電化學氧化法生成的PEC氧化層製作n+型空乏式砷化鎵金氧半場效電晶體﹙MOSFET﹚。
摘要(英) Abstract
In this thesis, we try to oxidize undoped-Al0.3Ga0.7As and n+-GaAs using the photoelectrochemical oxidation method﹙PEC oxidation method﹚. Hydrochloric acid﹙HCl﹚ and ammonia water﹙NH4OH﹚ were used in PEC method as the electrolyte. Produced oxide by using PEC oxidation method was called PEC oxide. PEC oxides were annealed to improve the insulating properties of PEC oxide.
First, we determined the PEC oxidation conditions for undoped- Al0.3Ga0.7As. Then a suitable condition of PEC oxidation method was determined to directly grow an oxide layer, which was used in oxide layer of MOS Device. We fabricated MOS capacitors with various conditions of oxide layer to investigate insulating properties of PEC oxide film and interface state of semiconductor/PEC oxide interface. In IG-VG curve of MOS capacitors, the electric breakdown field is to come to 5.78MV/cm. In C-V curve of MOS capacitors, the interface state density of GaAs/PEC oxide interface were determined by calculation. The interface state density of GaAs/PEC oxide interface is about 2.55~3.21×1011/cm2eV.
Finally, the fabrication of the n+-channel depletion mode GaAs MOSFET with the PEC oxidation method has been demonstrated.
關鍵字(中) ★ 電子元件
★ 砷化镓金氧半元件
關鍵字(英) ★ electronics device
★ n-type GaAs MOS Device
論文目次 Contents
Abstract
List of Tables
List of Figures
Chapter 1 Introduction………………………….……………………1
1-1Background and Motive……………………………………1
1-2Organization………………………………………………..2
Chapter 2 Al0.3Ga0.7As Oxide And GaAs Oxide Produced Using Photoelectrochemical﹙PEC﹚Oxidation Method……….4
2-1Introduction…………………………………………….…..4
2-2Experimental procedure and results………………………..5
2-2-1The principles of the photoelectrochemical oxidation method……………………………………………………5
2-2-2Undoped-Al0.3Ga0.7As oxide films were produced by using the PEC oxidation method……………………6
2-3The effects of furnace annealing on the properties of PEC oxide film………...……………………………………….…9
2-3-1The variety of thickness of PEC oxide films measurement………………………………………...9
2-3-2Measurement of PEC oxide films by using XRD…..10
Chapter 3 Ohmic contacts…………………………………………..12
3-1 Overview and definitions………………………………...12
3-1-1 Definitions…………………………………………..12
3-2 Fabricate Ohmic contact on semiconductor using alloy method…………………………………………………..13
3-3 Fabricate Ohmic contact on semiconductor using non-alloy method………………………………………………….14
3-4 Test of Ohmic contact on n+-GaAs using TLM………….14
3-4-1 Fabrication of TLM pattern…………………………14
3-4-2 Conditions of alloy for n+=3×1018cm-3 of GaAs…….16
3-4-2-1 Thermal stability test…………………………...16
3-4-3 Conditions of alloy for tri-layer semiconductors…....17
3-4-3-1 Thermal stability test…………………………...17
Chapter 4 The Fabrication of N-type GaAs MOS Capacitor And Analysis of Characteristic………………………………..19
4-1The fabrication of n+-type GaAs MOS Capacitor…...…....19
4-1-1C-V characteristic of n+-type MOS capacitor……......19
4-1-2The effect of interface state for MOS device………...20
4-2The present situation of study of GaAs MOS device……..21
4-3 The fabrication of GaAs MOS capacitors and analysis of characteristic…………………………………………….22
4-3-1The fabrication of n+-GaAs MOS capacitors…….......23
4-4 The measurement of gate current verse gate voltage (Ig-Vg ) and the measurement of capacitance verse voltage(C-V)…………………………………………….25
4-4-1The measurement of Ig-Vg…………………………...25
4-4-2The measurement of C-V………………….…………27
4-4-3The calculations of some parameters relative to n+-GaAs…………………………………………..…..27
4-4-4The calculation of interface density ( ) for PEC oxide-semiconductor interface………...…….……….29
4-4-5The calculation the of dielectric constant for PEC oxide films……………...…………………..……………….32
Chapter 5 The Fabrication of N+-Channel Depletion mode GaAs MOSFET And Analysis of Characteristic………………33
5-1The fabrication of n+-channel depletion mode GaAs MOSFET…………………………………………………..33
5-1-1 The fabricated of n+-GaAs MOSFET…………..…...33
5-2Measurement of n+-channel depletion mode GaAs MOSFET…………………………………………………..36
5-2-1 IDS-VDS measurement of n+-channel depletion mode GaAs MOSFET………………………………………36
Chapter 6 Conclusion...…………...…………………………………...38
References………………………………………………………………39
參考文獻 Reference
Chapter 1
[1.1] R. Williams, “Modern GaAs Processing Method”, ch.1 Boston London, Artech House, 1990.
[1.2] M. G. Kang, S. H. Sa, H. H. PARK, k. s. Suh, and K. H. Oh, “The characterization of etched GaAs surface With HCl or H3PO4 solutions, “Thin Solid Films, Vol. 308, p.634, 1997.
[1.3] L. Majumdar and P. Chattopadhyay, “Effect of interface states on the DC characteristics of short-channeal metal-semiconductor field-effect transistor,” Applied Surface Science, Vol. 119, p.369, 1997.
[1.4] R. Singh and C. M. Snowden, “A charge-control HEMT model incorporating deep-level effect, “Solid-State Electronic, Vol. 43, p473, 1999.
[1.5] S. Takamiya, M. Harayama, T. Sugimura, T. Tsuzuku, T. Taya, K. Iiyama and S. Hashimoto, “Reverse currents of schottky gates of Ⅲ-V MESFET/HEMTs-field-emmission and tunnel currents”, Solid-State Electronics, Vol. 42, p.447, 1998.
[1.6] Ching-Ting Lee, Hsin-Ying Lee, and Hong-Wei Chen, “GaN MOS Device Using SiO2-Ga2O3 Insulator Grown by Photoelectrochemical Oxidation”, IEEE Electronic Device Letters, Vol. 24, NO.2, 2003.
[1.7] C. Youtsey, I. Adesida and G. Bulman, “Broad-area phoelectrochemical etching of GaN”, IEEE Electronic Letters, Vol. 33, NO.3, 1997.
[1.8] Elizabeth J. Twyford, Carrie A. Carter, Paul A. Kohl, and Nan Marie Jokerst, “The influence of aluminum concentration on photoelectrochemical etching of first order grating in GaAs/AlGaAs”, Appl. Phys. Lett. 67(9), 1995.
[1.9] R. Khare, D. B. Young, G. L. Snider, and E. L. Hu, “Effect of band structure on etch-stop layers in the photoelectrochemical etching of GaAs/AlGaAs semiconductor structures”, Appl. Phys. Lett. 62(15), 1993.
Chapter 2
[2.1] C. T. Lee, H. W. Chen, and H. Y. Lee, “Metal-oxide-semiconductor devices using Ga2O3 dielectrics on n-GaN”, Appl. Phys. Lett. 82, 4304, 2003.
[2.2] H. O. Finkiea, Semiconductor Electrodes, Elsevier Science, The Netherlands, 1988.
[2.3] T. H. Oh, D. L. Huffaker, L. A. Graham, H. Deng and D. G. Deppe, “steam oxidation of GaAs”, Electronic Lett., Vol. 32, pp.2024-2026, 1996.
[2.4] H. J. Yoon, M. H. Choi and I. S. Park, “The study of native oxide on chemically etched GaAs(100) surfaces”, J. Electrochem. Soc., Vol. 139, pp.3229-3234, 1992.
[2.5] W. K. Choi, K. K. Han, and C. K. Choo, “Conduction mechanisms and interface property of silicon oxide films sputtered under different oxygen concentrations”, Journal of Applied Physics, Vol. 83, NO.9, 1998.
[2.6] L. H. Peng, C. W. Chang, J. K. Ho, C. N. Huang, and C. Y. Chen, Appl. Phys. Lett. , Vol. 27, p939, 1998.
[2.7] E. F. Yu, J. Shen, M. Walther, T. C. Lee and R. Zhang, “Planar GaAs MOSFET using wet thermally oxidized AlGaAs As gate insulator”, Electronics Letters, Vol.36 , No.4, 2000.
[2.8] Jau-Yi Wu, Hwei-Heng Wang, Yeong-Her Wang, Member, IEEE, and Mau-Phon Houng, “GaAs MOSFET’s Fabrication With a Selective Liquid Phase Oxidized Gate”, IEEE Transactions on Electron Devices, Vol. 48, NO. 4, 2001.
Chapter 3
[3.1] Hung-Cheng Lin, Sidat Senanayake, Keh-Yung Cheng, Fellow, “Optimization of AuGe-Ni-Au Ohmic Contacts for GaAs MOSFET”, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 4, APRIL 3002.
[3.2] J. M. Woodall, J. L. Freeouf, G. D. Pettit, T. Jackson and P. Kirchner, J. Vac. Sci. Technol., 19, 626(1981).
[3.3] N. A. Papanicolaou, Member, IEEE, S. H. Jones, Member, IEEE. J. R. Jones, Student Member IEEE, and W. T. Anderson, Member IEEE, “ All-Refractory GaAs FET Using Amorphous TiWSiX Source/Drain Metallization and Graded-InXGa1-XAs Layers”, IEEE ELECTRON DEVICE LETTERS, VOL. 15, NO. 1, January 1994.
[3.4] David B. Slater, Jr., Paul M. Enquist, James A. Hutchby, Arthur S. Morris and Robert J. Trew, “Low Emitter Resistance GaAs Based HBT’s Without InGaAs Caps”, IEEE ELECTRON DEVICE LETTERS, VOL. 15, NO. 5, MAY 1994.
[3.5] S. Townsend, M. Missous, J. P. R. Stephens, M. Carr and N Priestely, “ Low Resistance Ohmic Contacts to Millimetre-Wave Graded Gunn Diode Oscillators”, IEEE, 1997.
Chapter 4
[4.1] Schroder, Dieter K., “Semiconductor material and device characterization”, ch2, 1998.
[4.2] Y. C. Wang, M. Hong, J. M. Kuo, J. P. Mannaerts, H. S. Tsai, J. Kwo, J. J. Krajewski, Y. K. Chen and A. Y. Cho, “Ga2O3(Gd2O3)/GaAs power MOSFETs.
[4.3] Y. S. Lee, Y. H. Lee, J. J. Lee, H. K. Lee, and J. H. Lee, “Al2O3 Formation by wet Oxidation of AlAs for GaAs MOS Device”, EDMS’94.
[4.4] A. Paccagnella, A. Callegari, J. Batey, and D. Lacey, “Properties and thermal stability of SiO2/GaAs interface with different surface trements”, Appl. Phys. Lett. 57(3), 1990.
[4.5] J. L. Freeouf, D. A. Buchanan, S. L. Wright, T. N. Jackson, and B. Robinson, “Accumulation capacitance for GaAs-SiO2 interfaces with Si interlayers”, Appl. Phys. Leet. 57(3), 1990.
[4.6] T. Y. Chou and M. S. Lin, “Interface properties of plasma-enchanced chemical vapor deposited SiOxNy/n-GaAs metal –insulator-semiconductor system”, J. Appl. Phys. 59(11), 1986.
[4.7] Nandita Basu and K. N. Bhat, “High-pressure thermal oxidation of n-GaAs in an atmosphere of oxygen and water vapor”, J. Appl. Phys. 63(11), 1988.
[4.8] Yoshitaka Nakano, Tesu Kachi, and Takshi Jimbo, “Electrical properties of thermally oxidized p-GaN metal-oxide-semiconductor”, Appl. Phys. Lett., Vol. 82, NO. 15, 2003.
[4.9] H. C. Casey, Jr., G. G. Foundation and R. G. Alley, B. P. Keller and Steven P. DenBarrs, Appl. Phys. Lett., Vol.68, p.1850, 1990.
[4.10] Schroder, Dieter K., “Semiconductor material and device characterization”, ch6, 1998.
[4.11] N. S. Saks, “Comparison of interface trap densities measured by the Jenq and charge pumping techniques”, J. Appl. Phys. 74(5), 1993.
指導教授 李清庭、許進恭
(Ching-Ting Lee、Jinn-Kong Sheu)
審核日期 2004-7-11
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