博碩士論文 91521024 詳細資訊




以作者查詢圖書館館藏 以作者查詢臺灣博碩士 以作者查詢全國書目 勘誤回報 、線上人數:7 、訪客IP:3.237.94.109
姓名 林承鴻(Cheng-Hung Lin)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 適用於第三代行動通訊之最大事後機率演算法發展及渦輪碼解碼器超大型積體電路設計
(Development of MAP Algorithm and VLSI Design of Turbo Decoding for 3GPP)
相關論文
★ 即時的SIFT特徵點擷取之低記憶體硬體設計★ 即時的人臉偵測與人臉辨識之門禁系統
★ 具即時自動跟隨功能之自走車★ 應用於多導程心電訊號之無損壓縮演算法與實現
★ 離線自定義語音語者喚醒詞系統與嵌入式開發實現★ 晶圓圖缺陷分類與嵌入式系統實現
★ 補償無乘法數位濾波器有限精準度之演算法設計技巧★ 可規劃式維特比解碼器之設計與實現
★ 以擴展基本角度CORDIC為基礎之低成本向量旋轉器矽智產設計★ JPEG2000靜態影像編碼系統之分析與架構設計
★ 適用於通訊系統之低功率渦輪碼解碼器★ 應用於多媒體通訊之平台式設計
★ 適用MPEG 編碼器之數位浮水印系統設計與實現★ 適用於視訊錯誤隱藏之演算法開發及其資料重複使用考量
★ 一個低功率的MPEG Layer III 解碼器架構設計★ 具有高品質反量化演算的AAC解碼器 之平台式設計
檔案 [Endnote RIS 格式]    [Bibtex 格式]    [相關文章]   [文章引用]   [完整記錄]   [館藏目錄]   [檢視]  [下載]
  1. 本電子論文使用權限為同意立即開放。
  2. 已達開放權限電子全文僅授權使用者為學術研究之目的,進行個人非營利性質之檢索、閱讀、列印。
  3. 請遵守中華民國著作權法之相關規定,切勿任意重製、散佈、改作、轉貼、播送,以免觸法。

摘要(中) 渦輪碼已經是近年來通道編碼理論的一項重大突破。而在渦輪解碼裡軟式輸入軟式輸出解碼演算法中,以最大事後機率演算法最強而有力。然而,最大事後機率演算法解碼器在硬體實現上需要大量的記憶體,因此,本論文提出一種創新的最大事後機率解碼器架構,根據渦輪碼時間對應計算排成圖的分析,後向反覆運算可以直接地被轉換與前向反覆運算同時同向處理,它並可以有效地減少記憶體單元與面積。從比較結果中,更可看出它比起以往的研究更有效地減少到一半的記憶體存儲量。除此之外,提出的架構不像以往的研究,它簡化了記憶資料存取的動作,而不需要其他額外的位址產生器。
另外,渦輪碼中最大事後機率解碼演算法有一個訊息上的要求,這訊息上的要求是通道訊號雜訊比。若解碼端與實際通道訊號雜訊比發生不一致,渦輪解碼的錯誤更正能力便會被減低。因此在本論文中,一種結合了過去研究中所發表出來早終結技術的低複雜度通道估計演算法被提出來,早終結技術是用來減少渦輪碼中遞迴數的技術。其中,兩種早終結技術:硬式決定和軟式決定條件被模擬在通道訊號雜訊比不一致的情況之下。藉由模擬的結果通道估計演算法被提出來,其擁有了減少渦輪碼遞迴數和容易實現的兩個優點。在2分貝的實際訊號雜訊比條件下,與分析在最大遞迴數20相比,結果顯示渦輪解碼只用3個遞迴數便可被早終結技術終止;根據我們的模擬結果,在位元錯誤率為10-5的情況下,幾個框架解碼後,提出的方法就可以估計可靠的通道訊號雜訊比以提煉更正效能,與完全已知真實訊號雜訊比相比,只有0.1分貝的編碼增益失真。
在UMC .18um 1p6m CMOS 製程中,一顆根據3GPP標準以超大型積體電路設計之渦輪解碼器被實現在核心面積為3.7 x 3.7平方公釐的原型晶片內,以驗證所提出渦輪解碼器的架構,其最大操作頻率可達到149 MHz。在3GPP標準且最大遞迴數為6的情況下,提出的渦輪解碼器可以得到12 Mb/s 解碼率當頻率操作在149 MHz時。
摘要(英) In coding theory, turbo codes have been the breakthrough in recent years. Among these, the maximum a posteriori (MAP) probability algorithm is a powerful soft-input soft-output (SISO) algorithm for turbo decoding. However, MAP decoders of the turbo decoding consume large memories in hardware implementation. This thesis presents a new architecture for memory reduction in log-MAP (logarithm-MAP) algorithm. Based on the scheduling analysis, the backward recursion can be reversed in order to be directly operated on with forward recursion. The comparison result shows it can effectively reduce the memory size up to half size of the previous works. In addition, we also simplify the memory data access without an extra address generator.
Moreover, one requirement of iterative MAP decoding of turbo codes is the knowledge of the channel SNR. The correction ability of turbo decoding is degraded by mismatch of channel SNR. In this thesis, a low complexity channel estimation algorithm based on early termination techniques used to reduce the number of iterations is proposed. Both of the hard and soft decisions for early termination techniques are simulated with SNR mismatch. Our algorithm takes the advantages of reducing the iterations and easy implementation on channel estimation. Only 3 iterations can be achieved compared with the analyzed 20 iterations at 2-dB true SNR. Based on our simulation results, the proposed method can practically estimate the reliable channel SNR to refine the correction performance after several frames, and get 0.1-dB coding gain loses compared to true channel SNR at BER = 10-5.
A prototyping chip is implemented to verify the proposed architecture in 3.7×3.7mm2 die area, and the clock frequency is 149MHz in UMC 0.18um 1p6m CMOS process. For 3GPP standard, the proposed decoder can obtain 12Mb/s decoding rate when operating at 149 MHz with 6 iterations.
關鍵字(中) ★ 第三代行動通訊
★ 最大事後機率演算法
★ 渦輪碼
★ 超大型積體電路
關鍵字(英) ★ VLSI
★ 3GPP
★ Turbo Codes
★ MAP
論文目次 Abstract………………………………………………………………………………. i
Content……………………………………………………………………………….. ii
List of Figures……………………………………………………………………….. iv
List of Tables………………………………………………………………………… vi
Chapter 1 Introduction………………………………………………………….. 1
1.1 Motivation…………………………………………………………….. 1
1.2 Implementation Overview…………………………………………….. 3
1.3 Thesis Organization…………………………………………………… 5
Chapter 2 Fundamentals of Turbo Codes……………………………………… 6
2.1 Turbo Encoder………………………………………………………… 6
2.2 Turbo Decoder………………………………………………………… 9
2.3 Log-MAP Algorithm………………………………………………… 16
Chapter 3 Memory-Reduced Log-MAP Subdecoders……………………….. 19
3.1 Classical Architecture………………………………………………... 20
3.2 Recomputed Architectures…………………………………………... 21
3.2.1 Recomputed-1 Architecture…………………………………... 21
3.2.2 Recomputed-2 Architecture…………………………………... 23
3.3 Proposed Architecture……………………………………………….. 24
3.4 Analysis Results……………………………………………………... 27
3.5 Advanced Approach…………………………………………………. 31
Chapter 4 Proposed Channel Estimation Algorithm with Early Termination Techniques………………………………………………………… 33
4.1 Early Termination Techniques……………………………………….. 34
4.2 SNR Sensitivity……………………………………………………… 35
4.3 Proposed Algorithm and Architecture Design……………………….. 38
Chapter 5 VLSI Design of The Proposed Turbo Decodes for 3GPP Standards…………………………………………………………. 44
5.1 Turbo Codes in 3GPP Standard……………………………………… 45
5.1.1 Turbo Coding…………………………………………………. 45
5.1.2 Trellis Termination……………………………………………. 45
5.1.3 Internal Interleaving…………………………………………... 46
5.2 Architecture Design………………………………………………….. 48
5.2.1 Overall Architecture…………………………………………... 48
5.2.2 Log-MAP Subdecoder…………………………………………49
5.2.3 Linked State Machine………………………………………… 51
5.2.4 Rescaling……………………………………………………… 52
5.2.5 Channel Estimation…………………………………………… 53
5.2.6 Technical Specification……………………………………….. 53
5.3 IC Design Flow……………………………………………………… 57
5.4 Implementation Results……………………………………………… 57
5.4.1 MATLAB Simulation Results………………………………… 58
5.4.2 Chip Layout…………………………………………………... 60
5.5 Comparisons…………………………………………………………. 61
Chapter 6 Conclusions…………………………………………………………. 64
Reference……………………………………………………………………………. 66
參考文獻 [1] C. Berrou, A. Glavieux, and P. Thitimajshima, “Near Shannon limit error-correcting coding and decoding: Turbo Codes,” in Proc. IEEE Int. Conf. Communications, 1993, pp. 1064-1070.
[2] J. Hagennauer and L. Papke, “Decoding ‘turbo’-codes with the soft output Viterbi algorithm (SOVA),” in Proc. IEEE Int. Symp. Information Theory, 1994, p.164.
[3] P. Robertson, E. Villebrun, P. Hoeher, “A comparison of optimal and sub-optimal MAP decoding algorithms operating in the log domain,” in Proc. IEEE Int. Conf. Communications, 1995, pp. 1009-1013.
[4] B. Sklar, “A primer on turbo codes concepts,” IEEE Communications Mag., pp. 94-102, Dec. 1997.
[5] A. J. Viterbi, “An intuitive justification and simplified implementation of the MAP decoder for convolutional codes,” IEEE J. Selected Area in Communications, vol. 16, pp. 260-264, Feb. 1998.
[6] E. Boutillon, W. J. Gross, and P. G. Gulak, “VLSI architectures for the MAP algorithm,” IEEE Trans. Communications, vol. 51, pp. 175-185, Feb. 2003.
[7] T. A. Summers and S. G. Wilson, “SNR mismatch and online estimation in turbo decoding,” IEEE Trans. Communications, vol. 46, pp. 421 –423, April 1998.
[8] “Technical specification group radio access network; multiplexing and channel coding (FDD),” 3rd Generation Partnership Project, 3GPP TS25.212 v5.1.0, 2002.
[9] “Physical layer standard for cdma2000 spread spectrum systems,” 3rd Generation Partnership Project2, 3GPP2 C.S0002-C, v1.0, 2002.
[10] M. A. Bickerstaff, D. Garrett, T. Prokop, C. Thomas, B. Widdup, Gongyu Zhou, L. M. Davis, G. Woodward, G. Nicol, and Ran-Hong Yan, “A unified turbo/viterbi channel decoder for 3GPP mobile wireless in 0.18-/spl mu/m CMOS,” IEEE J. Solid-State Circuits, vol. 37, pp. 1555-1564, Nov 2002.
[11] S. Agarwala, T. Anderson, A. Hill, M. D. Ales, R. Damodaran, P. Wiley, S. Mullinnix, J. Leach, A. Lell, M. Gill, A. Rajagopal, A. Chachad, M. Agarwala, J. Apostol, M. Krishnan, Duc Bui, Quang An, N. S. Nagaraj, T. Wolf, T. T. Elappuparackal, “A 600-MHz VLIW DSP,” IEEE J. Solid-State Circuits, vol. 37, pp.1532-1544, Nov. 2002.
[12] S. Benedetto and G. Montorsi, “Unveiling turbo-codes: some results on parallel concatenated coding schemes,” IEEE Trans. Information Theory, vol. 42, pp. 408-428, Mar. 1996.
[13] D. Cress, W. Ebel, “ Turbo code implementation issues for low latency, low power applications,” in Proc. Virginia Tech’s Eighth Symp. Wireless Personal Communications, 1998, pp.191-200.
[14] S. Halter, M. Oberg, P. M. Chau, P. H. Siegel, “Reconfigurable signal processor for channel coding and decoding in low power SNR wireless communications,” in Proc. IEEE Workshop on Signal Processing System, 1998, pp. 260-274.
[15] S. Hong, J. Yi, W.E. Stark, “VLSI design and implementation of low complexity adaptive turbo-code encoder and decoder for wireless mobile communication applications,” in Proc. IEEE Workshop on Signal Processing System, 1998, pp. 233-242.
[16] C. Berrou, P. Combells, P. Penard, B. Talibart, “An IC for turbo-codes encoding and decoding,” in Proc. IEEE Int. Solid-State Circuit Conf., 1995, pp. 90-91.
[17] D, Garrett, M. Stan, “Low power Architecture of the soft output Viterbi Algorithm,” in Proc. Int. Symp. Low Power Electronics and Design, 1998, pp. 262-167.
[18] L. Lin, C.Y. Tsui, R. S. Cheng, “Low power soft output Viterbi decoder scheme for turbo code decoding,” in Proc. IEEE Int. Symp. Circuit and Systems, 1997, pp. 1369-1372.
[19] E. Luthi, E. Casseau, “High rate soft output Viterbi decoder,” in Proc. European Design and Test Conf., 1996, pp. 130-132.
[20] J. Hagennauer, E. Ofeer, and L. Papke, “Iterative decoding of binary block and convolutional code,” in Proc. IEEE Int. Symp. Information Theory, 1996, pp. 429-445.
[21] J. P. Woodard, and L. Hanzo, “Comparative study of turbo decoding techniques: an overview,” IEEE Trans. Vehicular Technology, vol. 49, pp. 2208 –2233, Nov. 2000.
[22] L. R. Bahl, J. Cocke, F. Jelinek, and J. Raviv, “Optimal decoding of linear codes for minimizing symbol error rate,” IEEE Trans. Information Theory, vol. IT-20, pp. 284-287, Mar. 1974.
[23] J. A. Erfanian and S. Pasupathy, “Low-complexity parallel-structure symbol-by-symbol detection for ISI channels,” in Proc. IEEE Pacific Rim Conf. Communications, Computers and Signal Processing, 1989, pp.350-353.
[24] C. schurgers, F. Chatthoor, and M. Engels, “Memory optimization of MAP turbo decoder algorithms,” IEEE Trans. VLSI Systems, vol. 9, pp. 305-312, Apr. 2001.
[25] H. Dawid, and H. Meyr, “Real-time algorithms and VLSI architectures for soft output MAP convolutional decoding,” in Proc. IEEE Int. Symp. Personal, Indoor and Mobile Radio Communications, 1995, pp.193-197.
[26] S. S. Piterson and S. A. Barbulescu, “A simplification of modified Bahl decoding algorithm for systematic convolutional codes,” in Proc. Int. Symp. Information Theory and Its Applications, 1994, pp.1073-1077.
[27] H. Dawid, G. Gehnen, and H. Meyr, “MAP channel decoding: Algorithm and VLSI architecture,” in Proc. IEEE Workshop on VLSI Signal Processing, 1994, pp.141-143.
[28] A. Raghupathy, and K. J. R. Liu, “A transformation for computational latency reduction in turbo-MAP decoding,“ in Proc. IEEE Int. Symp. Circuit and Systems, 1999, pp. 402 –405.
[29] R. Y. Shao, S. Lin, and M.P. C. Fossorier, “Two simple stopping criteria for turbo decoding,” IEEE Trans. Communications, vol. 47, pp. 1117–1120, Aug. 1999.
[30] A. Matache , et-al, “Stopping Rules for Turbo decoders,” JP: TMO Progress Report, 42-142, Aug. 15, 2000.
[31] K. R. Narayanan and G. L. stuber, “A Novel ARQ technique using the turbo coding principle,” IEEE Trans. Communications letters, vol. 1, pp. 49–51, Mar. 1997.
[32] F. Gilbert, A. Worm, and N. Wehn, “Low-power implementation of a turbo-decoder on programmable architectures,” in Proc. Asia and South Pacific Design Automation Conf., 2001, pp. 400–403.
[33] Myoung-Cheol Shin, In-Cheol Park, “A programmable turbo decoder for multiple 3G wireless standards,” in Proc. IEEE Int. Solid-State Circuit Conf., 2003, pp. 1-10.
[34] M. Bickerstaff, L. Davis, C. Thomas, D. Garrett, C. Nicol, “A 24 Mb/s Radix-4 LogMAP Turbo Decoder for 3GPP-HSDPA Mobile Wireless,” in Proc. IEEE Int. Solid-State Circuit Conf., 2003, pp. 1-10.
[35] Kai Huang, Fan-Min Li, Pei-Ling Shen, and An-Yeu Wu, “VLSI design of dual-mode Viterbi/Turbo decoder for 3GPP,” in Proc. IEEE Int. Symp. Circuit and Systems, 2004, pp. 773 –776.
指導教授 蔡宗漢(Tsung-Han Tsai) 審核日期 2004-7-12
推文 facebook   plurk   twitter   funp   google   live   udn   HD   myshare   reddit   netvibes   friend   youpush   delicious   baidu   
網路書籤 Google bookmarks   del.icio.us   hemidemi   myshare   

若有論文相關問題,請聯絡國立中央大學圖書館推廣服務組 TEL:(03)422-7151轉57407,或E-mail聯絡  - 隱私權政策聲明