地面數位電視廣播基頻接收器之載波同步設計

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姓名

魏庭楨(Ting-Zhen Wei) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

地面數位電視廣播基頻接收器之載波同步設計
(Design of Carrier Recovery for DVB-T Baseband Receiver)

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摘要(中)

地面數位電視廣播（DVB-T），為台灣地區所使用的數位電視廣播規格。其所採用的通訊技術為正交分頻多工（OFDM），正交分頻多工是一種多載波的調變方式，將資料分散到各個不同的頻率且互相正交的次載波。在本論文裡，針對地面數位電視廣播系統，專注於同步與通道等化器的演算法，並使用Matlab與C語言建立系統模擬平台。此平台包含數位降頻器，載波同步，時序同步與頻域等化器。最後，提出縮減記憶體之整數倍頻率誤差估計之架構，此架構可以減少記憶體使用量達90%，減少存取次數達94%和減少估計時間達37%。

摘要(英)

Digital Video Broadcasting for Terrestrial (DVB-T) is the digital TV broadcasting standard in Taiwan. The adopted communication technical is Orthogonal Frequency Division Multiplexing (OFDM). OFDM is a kind of multi-carrier modulation and divides the data into several differential and orthogonal sub-carriers. In this thesis, we focus on synchronization and channel estimation of DVB-T and build a simulation platform using Matlab and C language. This platform contains digital down conversion, carrier frequency synchronization, timing synchronization and frequency domain channel estimation. Finally, we propose a memory reduction architecture for integer carrier frequency offset estimation. This architecture reduces the usage of memory by 90 %, the memory access number is reduced by 94% and the estimation time is reduced by 37%.

關鍵字(中)

★ 同步
★ 等化器
★ 數位電視

關鍵字(英)

★ equalizer
★ synchronization
★ dvb-t

論文目次

Chapter 1 Introduction 1
1.1 Overview of Digital TV Broadcasting 1
1.2 Motivation 2
1.3 Thesis Organization 3
Chapter 2 OFDM and DVB-T Technology 4
2.1 Concept of OFDM 4
2.1.1 Mathematical Descriptions of OFDM 4
2.1.2 Guard Interval and Cyclic Extension 5
2.2 DVB Technology 6
2.2.1 Specification of DVB-T 7
2.2.2 Channel Coding and Interleaving 9
2.2.3 Pilot Signal 10
Chapter 3 DVB-T Baseband Receiver 16
3.1 Overview of DVB-T Baseband Receiver 16
3.2 Symbol Boundary Detection 17
3.2.1 The Effect of Symbol Timing Offset 17
3.2.2 Symbol Boundary Detection 20
3.3 Carrier Frequency Synchronization 22
3.3.1 Effect of Carrier Frequency Offset 22
3.3.2 Integer Carrier Frequency Estimation 23
3.3.3 Derotator and NCO 24
3.4 Joined Remainder CFO and SCO Estimation 26
3.4.1 Sampling Clock Offset Estimation 27
3.4.2 Interpolation 29
3.4.3 Three Stages Carrier Synchronization 34
3.5 Frequency Domain Equalizer 35
3.5.1 Channel Model 35
3.5.2 Scattered Pilot Mode Detection 38
3.5.3 Channel Estimation 40
3.6 Demapper 43
3.7 Demodulation Flow and System Performance 45
Chapter 4 Architecture and Hardware Design 48
4.1 COordinate Rotational DIgital Computer 48
4.1.1 Foundation of CORDIC 48
4.1.2 Implementation Results of CORDIC 51
4.2 A Reduction Algorithm for ICFO Estimation 53
4.3 Architecture of Jointed ICFO, RCFO and SCO Estimation 57
4.3.1 Implementation Results 59
Chapter 5 Conclusion and Future Work 61
Reference 62

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指導教授

薛木添、周世傑
(Muh-Tian Shieu、Shyh-Jye Jou)

審核日期

2005-7-17

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