||The European standard for terrestrial digital video broadcasting (DVB-T) adopted the orthogonal frequency-division multiplexing (OFDM) technique. Fast Fourier Transform is a key point to implement a DVB-T inner receiver. Therefore, the signal processing immediately is very important. Many similar Fourier transform algorithms are proposed after the first proposed by Cooley-Tukey in 1965. Radix-22 algorithm is one of them.|
In this thesis, we implement a FFT processor which based on Single-Path Delay Feedback (SDF) of pipeline-based architecture. To decrease the hardware complexity, we use the Coordinate Rotation Digital Computer (CORDIC) in place of complex multiplexer. It needs a lot of memory in the architecture, so we implement it by Block Memory in FPGA to achieve the goal that saving hardware resources. At last, we implement the 2048/8192 points of FFT circuit on Xilinx Virtex-II Pro XC2vP30-FF1152 FPGA to verify the architecture that we proposed.
|| ETSI EN 300 744, Digital Video Broadcasting (DVB)；Framing structure, channel coding and modulation for digital terrestrial television, European Standard.|
 Ray Andraka, “A survey of CORDIC algorithms for FPGA based computers.”
 Shousheng He and Mats Torkelson, “A New Approach to Pipeline FFT processor.”
 Yih-Ming Chen, Digital Audio/Video Broadcasting Standard Techniques and Applications, Fall Workshop on Information Theory and Communications, Taiwan, 2005.
 Sang Yoon Park, Nam Ik Cho, Sang Uk Lee, Kichul Kim, Jisung Oh, “DESIGN OF 2K/4K/8K-POINT FFT PROCESSOR BASED ON CORDIC ALGORITHM IN OFDM RECEIVER.”
 Despain, A.M., “Fourier Transform Computations Using CORDIC Iterations.”
 Despain, A.M., “Very fast Fourier transform algorithms hardware for implementation.”
 XILINX, Product Specification DS234, “Single-Port Block Memory.”
 Yu-Wei Lin, Hsung-Yu Liu, and Chen-Yi Lee, “A Dynamic Scaling FFT Processor for DVB-T Applications.”
 Jung-Hee Suk, Dae-Won Kim, Taek-Won Kwon, Suk-Kun Hyung and Jun-Rim Choi, “A 8192 Complex Point FFT/IFFT for COFDM Modulation Scheme in DVB-T System.”
 Shousheng He and Mats Torkelson, “Design and Implementation of a 1024-point Pipeline FFT Processor.”