應用於數位視頻廣播系統中具有自動增益控制之接受端濾波器設計

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：9

、訪客IP：18.227.24.209

姓名

何昇陽(Sheng-Yang Ho) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用於數位視頻廣播系統中具有自動增益控制之接受端濾波器設計
(A Continuous-Time Receive Filter Design with Automatic Gain Control for DVB-T/H Receiver)

相關論文

★ 應用於2.5G/5GBASE-T乙太網路傳收機之高成本效益迴音消除器	★ 應用於IEEE 802.3bp車用乙太網路之硬決定與軟決定里德所羅門解碼器架構與電路設計
★ 適用於 10GBASE-T 及 IEEE 802.3bz 之高速低密度同位元檢查碼解碼器設計與實現	★ 基於蛙跳演算法及穩定性準則之高成本效益迴音消除器設計
★ 運用改良型混合蛙跳演算法設計之近端串音干擾消除器	★ 運用改良粒子群最佳化演算法之近端串擾消除器電路設計
★ 應用於多兆元網速乙太網路接收機類比迴音消除器之最小均方演算法電路設計	★ 應用於數位視頻廣播系統之頻率合成器及3.1Ghz寬頻壓控震盪器
★ 地面數位電視廣播基頻接收器之載波同步設計	★ 適用於通訊系統之參數化數位訊號處理器核心
★ 以正交分頻多工系統之同步的高效能內插法技術	★ 正交分頻多工通訊中之盲目頻域等化器
★ 兆元位元率之平行化可適性決策回饋等化器設計與實作	★ 應用於數位視頻廣播系統中之自動增益放大器及接受端濾波器設計
★ OFDM Symbol Boundary Detection and Carrier Synchronization in DVB-T Baseband Receiver Design	★ 適用於億元位元率混合光纖與銅線之電信乙太接取網路技術系統之盲目等化器和時序同步電路設計

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

本論文描述一個應用在歐規陸地/手持式數位視頻廣播系統(DVB-T/H)中的類比前端電路(AFE)，主要以基頻接收端通訊系統應用為目標，其內部使用一個經由數位控制的自動增益濾波器來促進接收機的系統整合性與電路積體化程度。為了改良系統，在接收端的訊號路徑上有一個可程式化增益連續時間濾波器，它使用寬頻且低功率的全差動運算放大器，來構成一個頻寬為4MHz的六階Chebyshev低通濾波器，其動態增益範圍有53dB，並且由一階的數位控制迴路來自動調整其增益量使其輸出可達200 。在輸入振幅為200 的情況時，經由雙端輸入所模擬出的總諧波失真(THD)小於 -60dB。而此電路在操作電壓為1.8V時，其功率損耗為14.3毫瓦，已經由佈局後(post-layout)的模擬所驗證，並使用台灣積體電路公司(TSMC)所提供的0.18μm 1P6M CMOS製程來製造。

摘要(英)

This paper describes a digitally controlled automatic gain control (AGC) for the analog front-end (AFE), in which it can be used to support the digital video broadcasting in DZIF (double conversion with zero second IF) architecture. In order for system improvement, the receiving path contains a programmable-gain filter (PGF) with the self-tuning gain circuit. This proposed continuous-time filter is a 4MHz sixth-order Chebyshev low-pass Active-RC filter is also described in detail. In addition, an wideband and low power fully-differential operation amplifier (OPA) used for building the filter. The dynamic range of the PGF, which is controlled by a digital loop to form a first order system, is 53dB. The third-harmonic distortion is less than –60dB for differential input signal up to 200 . This chip has already been fabricated in a TSMC 0.18μm standard CMOS technology while the supply voltage is 1.8V and its power consumption is 14.3 .

關鍵字(中)

★ 數位視頻廣播系統
★ 自動增益控制
★ 可程式化增益濾波器

關鍵字(英)

★ DVB-T/H
★ Automatic Gain Control
★ Programmable Gain Filter

論文目次

摘要 ..................................................................................................................I
Abstract ............................................................................................................... II
誌謝 ............................................................................................................... III
目錄 ...............................................................................................................IV
圖目錄 ..............................................................................................................VII
表目錄 ................................................................................................................ X
第一章緒論....................................................................................................... 1
1.1 數位視頻廣播發展現況...................................................................... 1
1.1.1 陸地數位視頻廣播................................................................... 2
1.1.2 手持式數位視頻廣播............................................................... 6
1.2 研究動機.............................................................................................. 9
1.3 論文架構............................................................................................ 10
第二章系統架構與設計................................................................................. 11
2.1 接收機架構........................................................................................ 11
2.1.1 低中頻接收機架構................................................................. 12
2.1.2 零中頻接收機架構................................................................. 15
2.1.3 雙次轉頻第二零中頻架構..................................................... 20
2.1.4 雙次轉頻第二零中頻架構之變革......................................... 21
2.2 接收機規格........................................................................................ 22
2.3 訊號振幅的控制策略........................................................................ 24
2.3.1 限幅放大器............................................................................. 24
2.3.2 自動增益控制......................................................................... 25
2.4 數位回授自動增益控制.................................................................... 28
2.4.1 增益控制放大器..................................................................... 29
2.4.2 一階近似迴路分析................................................................. 31
2.5 模擬結果............................................................................................ 32
第三章濾波器的分析與設計......................................................................... 35
3.1 連續時間濾波器理論........................................................................ 35
3.2 濾波器頻率響應特性介紹................................................................ 37
3.2.1 Butterworth 頻率響應............................................................. 37
3.2.2 Chebyshev I 頻率響應............................................................ 39
3.2.3 Chebyshev II 頻率響應........................................................... 40
3.2.4 Elliptic 頻率響應..................................................................... 41
3.2.5 濾波器頻率響應的比較......................................................... 42
3.3 濾波器架構的分析與比較................................................................ 44
3.3.1 Sallen-Key 濾波器................................................................. 45
3.3.2 Leap-frog 濾波器................................................................... 47
3.3.3 Tow-Thomas 濾波器.............................................................. 50
3.4 綜合討論............................................................................................ 53
3.5 模擬結果............................................................................................ 54
第四章可程式化增益濾波器之設計............................................................. 59
4.1 設計考量............................................................................................ 59
4.1.1 動態範圍................................................................................. 60
4.1.2 線性度..................................................................................... 61
4.1.3 閃爍雜訊................................................................................. 62
4.1.4 頻率補償技術......................................................................... 64
4.2 可程式化增益濾波器之電路實現.................................................... 66
4.2.1 重複使用電流的全差動運算放大器..................................... 67
4.2.2 共模回授電路......................................................................... 70
4.2.3 可變輸入電阻......................................................................... 72
4.2.4 輸出緩衝器............................................................................. 73
4.3 晶片佈局與模擬結果........................................................................ 74
4.3.1 佈局考量................................................................................. 74
4.3.2 模擬結果................................................................................. 76
4.4 綜合討論............................................................................................ 81
第五章結論與未來展望................................................................................. 83
5.1 結論.................................................................................................... 83
5.2 未來展望............................................................................................ 84
參考文獻............................................................................................................. 85
附錄A 晶片腳位分配..................................................................................... 88
A.1 打線圖................................................................................................ 88
A.2 晶片腳位說明.................................................................................... 89

參考文獻

[1] European Telecommunications Standards Inst. (ETSI), ETSI 300 744 (1997): Digital Broadcasting Systems for Television, Sound and Data Services; Framing Structure, Channel Coding and Modulation for Digital Terrestrial Television, 1997.
[2] European Telecommunications Standards Inst. (ETSI), ETSI TR 101 190: Digital Video Broadcasting (DVB); Implementation guidelines for DVB terrestrial services; Transmission aspects, 2004.
[3] Chih-Yuan Chou, Development of DVB-T RF Tuners, Master Thesis, National Sun Yat-sen University, 2004.
[4] European Telecommunications Standards Inst. (ETSI), ETSI EN 302 304 V1.1.1 (2004-11): Digital Video Broadcasting (DVB); Transmission System for handheld Terminals (DVB-H), 2004.
[5] Chih-Yang Kao, Ching-Yung Chen, “On Handheld DTV: An Introduction to DVB-H Technology”, CCL TECHNICAL JOURNAL, pp. 5-17, Dec. 2004.
[6] Kai-Jen Cheng, Study and Implementation of DVB-H Receiver RF Module Using Dual-Conversion Architecture with Zero Second IF, Master Thesis, National Sun Yat-sen University, 2005.
[7] Jan Crols and Michiel S. J. Steyaert, “Low-IF Topologies for High-Performance Analog Front Ends of Fully Integrated Receivers,” IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Vol. 45, pp. 269-282, March 1998.
[8] Behzad Razavi, RF Microelectronics. Prentice-Hall, 1997.
[9] Won Namgoong and Teresa H. Meng, “Direct-Conversion RF Receiver Design,” IEEE Transactions on Communications, Vol. 49, pp. 518-529, March 2001.
[10] K. P. Pun, J. E. Franca, C. Azeredo-Leme, C. F. Chan, and C. S. Choy, “Correction of frequency-dependent I/Q mismatches in quadrature receivers,” Electronics Letters, Vol. 37, pp. 1415-1417, Nov. 2001.
[11] Jia-Chun Huang, Automatic Gain Control and Continuous-Time Receive Filter in DVB-T/H Receiver Design, Master Thesis, National Central University, 2005.
[12] M. Valkama, M. Renfors, V. Koivunen, “Advanced methods for I/Q imbalance compensation in communication receivers,” IEEE Transactions on Signal Process, Vol. 49, pp. 2335-2344, Oct. 2001
[13] Hsing-Hung Chen, Po-Chiun Huang, Chao-Kai Wen and Jiunn-Tsair Chen, “Adaptive Compensation of Even-Order Distortion in Direct Conversion Receivers,” IEEE Transactions on Vehicular Technology, Vol. 1, pp. 271-274, Oct. 2003.
[14] Mark Dawkins, Alison Payne Burdett, Nick Cowley, “A Single-Chip Tuner for DVB-T,” IEEE Journal of Solid-State Circuits, Vol. 38, pp. 1307-1317, Aug. 2003.
[15] Mark Dawkins, Alison Payne Burdett, Nick Cowley, “Single-Chip Tuner design for digital terrestrial television,” Proc. IEEE International Symposium on Circuits and Systems, Vol. 1, pp. 125-128, May. 2001.
[16] H. Darabi and A. Abidi, “A 4.5mW 900-MHz CMOS receiver for wireless paging,” IEEE Journal of Solid-State Circuits, Vol. 35, pp. 1085-1096, Aug. 2000.
[17] Patrick Antoin, Philippe Bauser, Hugues Beaulation, Martin Buchholz, Declan Carey, Thierry Cassagnes, T.K. Chan, Stephane Colomines, Fionn Hurley, David T. Jobling, Niall Kearney, Aidan C. Murphy, James Rock, Didier Salle, and Cao-Thong Tu, “A Direct-Conversion Receiver for DVB-H,” IEEE Journal of Solid-State Circuits, Vol. 40, pp. 2536-2546, Dec. 2005.
[18] Hao-Shun Chang, Automatic Gain Control for VDSL Receiver Analog Front End, Master Thesis, National Taiwan University, 2000.
[19] Muh-Tian Shiue, Kuang-Hu Huang, Cheng-Chang Lu, Chorng-Kuang Wang, Winston I. Way, “A VLSI Design of Dual-Loop Automatic Gain Control for Dual-Mode QAM/VSB CATV Modem,” Proc. IEEE International Symposium on Circuits and Systems, vol. 6, pp. 490-493, 31 May.-3 June. 1998.
[20] Chorng-kuang Wang and Po-Chiun Huang, “An Automatic Gain Control Architecture for SONET OC-3 VLSI,” IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 44, pp. 779-783, Sept. 1997.
[21] C. Richard Johnson, William A. Sethares, Telecommunications Breakdown:Concepts of Communication Transmitted via Software-Defined Radio. Pearson Prentice Hall, 2003.
[22] Phillip E. Allen, Douglas R. Holberg, CMOS Analog Circuit Design. Oxford University Press, New York, 2002.
[23] Sanghyun Cha, Huikwan Yang, Seungyun Lee, Sangheon Lee, Jinup Lim and Joongho Choi, “A 1.2V Wide-Band Active-RC Filter for Wireless Communication Receivers,” Proc. IEEE Region 10 Annual International Conference (TENCON 2006), pp. 1-4, Nov. 2006.
[24] Chien-Hsiang Huang, RF Specification Test and Related Mixed-Signal IC Design in Bluetooth, Master Thesis, National Sun Yat-sen University, 2002.
[25] Texas Instruments, “Analysis of the Sallen-Key Architecture,” July 1999 - Revised September 2002.
[26] M. E. Van Valkenburg, Analog Filter Design. Oxford University Press, New York, 1982.
[27] Chih-Chang Lee, Gin-Kou Ma, “A 1.8V 250MHz CMOS Programmable Gain Filter for Ultra-wideband Transmitter System,” IEEE International Conference on Electron Devices and Solid-State Circuits, pp. 229-232, Dec. 2005.
[28] David A. Johns and Ken Martin, Analog Integrated Circuit Design. John Wiley and Sons Inc., 1997.
[29] Behzad Razavi, Design of Analog CMOS Integrated Circuits. Mc Graw Hill, 2001.
[30] Rolf Schaumann, Mac E. Van Valkenburg, Design of Analog Filters. Oxford University Press, 2001.
[31] Jin-Hong Hwang, Mi-Young Lee, Chan-Young Jeong, and Changsik Yoo, “Active-RC channel selection filter tunable from 6kHz to 18MHz for software-defined radio,” IEEE International Symposium on Circuits and Systems, vol. 5, pp. 4803-4806, May. 2005.
[32] Bharath Kumar Thandri and Jos? Silva-Mart?nez, “A Robust Feedforward Compensation Scheme for Multistage Operational Transconductance Amplifiers With No Miller Capacitors,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 237-243, Feb. 2003.
[33] Jin-Hong Hwang and Changsik Yoo, “A Low-Power Wide-Bandwidth Fully Differential Operational Amplifier with Current Re-using Feedforward Frequency Compensation,” Proc. IEEE AP-ASIC, pp. 32-35, Aug. 2004.
[34] Mo M. Zhang, Paul J. Hurst, “Effect of Nonlinearity in the CMFB Circuit that Uses the Differential-Difference Amplifier,” IEEE International Symposium on Circuits and Systems, pp. 1390-1393, May. 2006.
[35] Zhi-Qiang Gao, Ming-Yan Yu, Feng-Chang Lai, Yi-Zheng Ye, “A High Q Gm-C Filter for Multi-band Wireless Applications,” Proc. of the 8th International Conference on Solid-State and Integrated-Circuit Technology, pp. 1733-1735, 2006.
[36] Cheng-Chung Hsu, Jieh-Tsorng Wu, “A Highly Linear 125-MHz CMOS Switched -Resistor Programmable-Gain Amplifier,” IEEE Journal of Solid State Circuits, vol. 38, pp. 1663-1670, Oct. 2003.

指導教授

薛木添(Muh-Tian Shiue)

審核日期

2007-10-15

推文