整合Band解法器與LILU解法器於三維半導體元件之模擬

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姓名

黃煒龍(Wei-Lung Huang) 查詢紙本館藏

畢業系所

電機工程學系在職專班

論文名稱

整合Band解法器與LILU解法器於三維半導體元件之模擬
(Integration of Band Solver and LILU Solver for 3-D Semiconductor Device Simulation)

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摘要(中)

本論文主要是整合Band解法器與LILU解法器以開發一套三維半導體元件模擬器，使達到更精確與快速的模擬效果。模擬方式為等效電路法(Equivalent Circuit Method)，其將帕松方程式與電子電洞連續方程式轉換成等效電路模型，以電路模型的行為來模擬半導體元件的行為特性。此法亦方便應用於混階電路的模擬。為了驗證所開發之元件模擬器是否正確，我們模擬了二極體與電晶體並確認其模擬結果。且為瞭解那一解法器模擬三維半導體元件較有效率，我們亦比較了兩種解法器的模擬速度。

摘要(英)

This thesis is on the study for integrating the band solver and LILU solver to develop a set of three-dimensional semiconductor device simulator, so that we can get more accurate and rapid results of the simulation. The manner of simulation is the equivalent circuit method. It transforms Poisson’s equations and the electron and hole continuity equations to the equivalent circuit model, and uses the behavior of equivalent circuit model to simulate the behavior of the semiconductor component. This method is also applied to facilitate the simulation of mixed level circuits. In order to verify the development of the device simulator is correct, we simulated diodes and transistors and confirmed its simulation results. And for understanding which solver is more efficient to simulate three-dimensional semiconductor device, we also compared the simulation speed of these two solvers.

關鍵字(中)

★ 階層化不完全LU解法器
★ 三維半導體元件模擬
★ 帶狀式矩陣解法器

關鍵字(英)

★ Band Matrix Solver
★ LILU Solver
★ 3-D Semiconductor Simulation

論文目次

Contents
1. Introduction
2. Development of 3-D Device Simulation
2.1 Sparse Matrix Solver Development
2.1.1 Band Matrix Solver
2.1.2 Bandwidth Discussion in 3-D Device Simulation
2.1.3 Levelized Incomplete LU Solver
2.2 3-D Device Equivalent Circuit Model
3. Integration of the Band Matrix and LILU Solvers
3.1 Integration of Band and LILU Solvers
3.1.1 Small-resistance Coupling Method in Band Matrix Solver
3.1.2 Connection-Table Construction of LILU Solver
3.2 3-D PN Diode Simulation and Comparison
3.3 3-D BJT Simulation and Comparison
4. Applications in 3-D Device Simulation
4.1 Effect of Contact Size in 3-D Device Simulation
4.2 3-D BJT Simulation in Reverse Active Mode
4.2.1 Current Gain for Different Geometry
4.3 Truncation Parameter in 3-D Simulation
5. Conclusion

參考文獻

Reference
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[2] Y. T. Tsai, C. Y. Lee, and M. K. Tsai, “Levelized Incomplete LU Method and Its Application to Semiconductor Device Simulation,” Solid-state Electronics, Vol. 44, pp. 1069-1075, 2000.
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Application to Large-scale Circuit Simulation,” IEEE Trans. Computer-Aided Design, Vol. 14, no. 6, pp. 720-727, 1995.
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[7] P. C. H. Chan and C. T. Sah, “Exact Equivalent Circuit Model for Steady-state Characterization of Semiconductor Device with Multiple-energy-level Recombination Centers, ” IEEE Trans. Electron Device, Vol. ED-26, no. 6, pp. 924-936, 1979.
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[12] J. F. Dai, “Development of 2-D and 3-D Numerical Device Simulator Including an Improved L-ILU Solver and the Circuit Representation of PDM,” Ph.D. dissertation, National Central University, Taiwan.
[13] C. C. Chang, S. J. Li, and Y. T. Tsai, “Two-dimensional Mixed-level Device and Circuit Simulation Using a Simple Band Matrix Solver,” in EDMS 2005, Kaohsiung, Taiwan, 2005.
[14] C. C. Chang, “Improvement of 2-D and 3-D Semiconductor Device Simulation Using Equivalent-circuit Model,” Ph.D. dissertation, National Central University, Taiwan.
[15] A. Sadovnikov and D.J. Roulston, “Quasi-Three-Dimensional Modeling of Bipolar Transistor Characteristics,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, Vol. 12, no. 11, 1993.

指導教授

蔡曜聰(Yao-Tsung Tsai)

審核日期

2008-6-30

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