博碩士論文 945401002 詳細資訊




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姓名 林東明(Dong-Ming Lin)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 增強型與空乏型砷化鋁鎵/砷化銦鎵假晶格高電子遷移率電晶體: 元件特性、模型與電路應用
(Enhancement- and Depletion-Mode AlGaAs/InGaAs pHEMTs: Device Characteristics, Modeling, and Circuit Applications )
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摘要(中) 本論文主要探討增強型與空乏型砷化鋁鎵/砷化銦鎵假晶格高電子遷移率電晶體,由基本的單閘極元件到雙閘極元件特性,小訊號模型到對稱性非線性模型,最後是功率放大器電路與寬頻分佈式放大器設計應用。
單閘極增強型與空乏型高電子遷移率電晶體同時被製造在 6 吋砷化鎵基板,增強型高電子遷移率電晶體其截止頻率與最大振盪頻率分別為 35 GHz 與 78 GHz。相對地,空乏型高電子遷移率電晶體其截止頻率與最大振盪頻率則分別為 32 GHz 與 72 GHz。此論文發展出高精準度高電子遷移率電晶體小訊號模型,其精準度可從 50 MHz 到 40.05 GHz。此小訊號模型同時可以適用增強型與空乏型高電子遷移率電晶體,此外對不同偏壓所萃取的參數也詳細討論。
此外也進一步發展一個具有對稱性非線性模型,此模型可以精準模擬出微波開關器電路與放大器等電路。此模型之集極與源極具有互換性,其描述元件特性解析方程式是連續可微分,並可以精準描述出元件的次臨界電壓、臨界電壓、線性區、到飽和區。此元件模型加強描述高電子遷移率電晶體閘極電流與元件非線性電容特性,讓此元件模型有更精準非線性預測能力。利用此元件模型設計一個串聯式單埠單通微波開關器電路,從微波開關器功率與其諧波特性量測結果與此元件模型模擬比較,可以精準預測出微波開關器交互調變特性與功率諧波特性。為了讓此元件模型可以精準預測放大器電路,此元件模型額外增加兩個子電路,一為熱網路描述元件熱效應,另一個為動態電阻與電容組成子電路描述元件高頻散色效應。功率負載拉移系統可以用來評估此元件模型是否可以精準預測放大器非線功率性特性,此大訊號元件模型可以描述增強型與空乏型高電子遷移率電晶體非線性特性。
此論文並提出雙閘極增強型/增強型與增強型/空乏型高電子遷移率電晶體,比單閘極增強型元件擁有更高崩潰電壓。由於總電場被分配在兩個元件空乏區,其崩潰電壓可從原本單閘極元件的13 V 提高到雙閘極增強型/空乏型元件的 19 V 與雙閘極增強型/增強型元件的 17 V。此外雙閘極元件也有較高最大振盪頻率,原因於雙閘極元件具有較低輸出導納,其雙閘極增強型/增強型元件與增強型/空乏型元件的最大振盪頻率分別為 123 GHz 與 100 GHz。此外雙閘極增強型/空乏型元件也有相當好輸出功率特性,其輸出功率在 2.4 GHz為808 mW/mm,比單閘極增強型元件輸出功率636 mW有非常明顯提升。我們也利用雙閘極增強型/增強型與增強型/空乏型元件實際實現一個兩級具有高增益與高輸出功率特性功率放大器,此放大器在中心頻率為 2.4 GHz時,其輸出最大功率為 24 dBm 與 40 dB 增益特性。
此論文最後發展雙閘極增強型/空乏型元件電路模型,並實際將元件與模型實現在一寬頻分佈式放大器。其雙閘極增強型/空乏型元件主要由兩個分別獨立單閘極增強型與空乏型元件大訊號模型和外部寄生元件所組成,此元件模型可以精準模擬出元件直流與射頻特性,並利用此模型設計一分佈式放大器。使用雙閘極增強型/空乏型元件所設計出分佈式放大器,完全是正偏壓且僅需要簡單偏壓網路即可。由於雙閘極極增強型/空乏型元件其空乏型元件閘極可以直接接地,其提供一好的寬頻接地效果,再利用一損耗補償電路使分佈式放大器有更寬頻特性。測量結果其頻寬可達25 GHz 與7 dB放大增益,且此分佈式放大器僅需 34 mW直流功率損耗。
摘要(英) This dissertation focuses on the development of enhancement- and depletion-mode AlGaAs/InGaAs pHEMTs including single- and dual-gate devices, small-signal and symmetry nonlinear models, and power amplifier and distributed amplifier applications.
In this dissertation, the single-gate E- and D-mode pHEMTs were fabricated on 6 inch GaAs wafer. The fT and fmax are 35 GHz and 78 GHz for single-gate E-mode pHEMT and 32 GHz and 72 GHz for single-gate D-mode pHEMT. The small-signal model has been developed from 0.05 to 40.05 GHz to characterize high frequency response. The parameters in the small-signal model under different biases were measured and extracted to develop and analyze the nonlinear model. The developed small-signal model can be applied for single-gate E- and D-mode pHEMTs under any biases.
Furthermore, a symmetrical nonlinear pHEMT model was developed for switch and amplifier circuits. The model is interchangeable between drain and source and can be incorporated directly in commercial software. The equations in this model are continuous and differentiable to any orders under entire bias range; and sub-threshold voltage, gate leakage current, and nonlinear capacitance characteristics are included for completeness. The model is used to design a single-pole-single-threw series switch circuit. The two-tone intermodulation distortion and nonlinear harmonic characteristics are measured and validated with model at both on- and off-state for the switch circuit. Finally, in order to take account of thermal and frequency dispersion effect in a conventional power amplifier, this symmetry model includes thermal sub-circuit and R-C network. The model for the power amplifier circuit was evaluated by load-pull system. The measured data shows good agreement with simulated data for switch and amplifier circuits. This new developed model validates for both single-gate E- and D-mode pHEMTs.
The characteristics of dual-gate E/E- and E/D- pHEMTs are presented and compared to single-gate E-mode pHEMT. The dual-gate devices present a higher breakdown voltage because electric field in the dual-gate device is distributed between two depletion regions. The off-state breakdown voltage is improved from 13 V to 19 V by using dual-gate E/D-mode technology. Comparatively, dual-gate E/E-mode device demonstrates an off-state breakdown voltage of 17 V. Moreover, the dual-gate devices demonstrates a higher maximum oscillation frequency, fmax due to low output conductance, go. The fmax of dual-gate E/E-mode and E/D-mode pHEMTs are 123 and 100 GHz, respectively. The output power at 2.4 GHz is significantly increased from 636 to 808 mW/mm for a single-gate E-mode pHEMT and a dual-gate E/D-mode pHEMT, respectively. We also designed a 2.4 GHz high gain and high power density two-stage power amplifier using dual-gate E/E and E/D-mode transistors. A linear gain of 40 dB and maximum output power of 24 dBm were obtained.
Finally, a dual-gate E/D-mode pHEMTs model is developed and used to design a distributed amplifier. The dual-gate E/D-mode pHEMTs model consists of a single-gate E- and a D-mode pHEMT and parasitic components. In this design, the distributed amplifier using dual-gate E/D-mode pHEMT only requires a positive bias and simple bias network. The gate-II of dual-gate E/D-mode pHEMT can be directly connected to ground and provides a good and wide bandwidth AC ground. Additionally, by using loss compensated network the bandwidth of distributed amplifier can be enhanced. The bandwidth and minimum power gain are 25 GHz and 7 dB with power dissipation of only 34 mW.
關鍵字(中) ★ 空乏型
★ 元件模型
★ 增強型
★ 對稱性
★ 分佈式放大器
★ 雙閘極元件
★ 高電子遷移率電晶體
★ 微波開關器
關鍵字(英) ★ switch
★ dual-gate
★ enhancement- and depletion-mode
★ device modeling
★ pHEMT
★ symmetrical
★ distributed amplifier
論文目次 Table of contents
Table Captions XII
Chapter 1 1
Introduction 1
1-1 Overview 1
1-2 The 0.5 ?m AlGaAs/InGaAs E/D-mode pHEMTs 4
1-3 Thesis orgainzation 5
Chapter 2 8
Single-gate E- and D-mode pHEMT small-signal model 8
2-1 Introduction 8
2-2 Device characteristics of single-gate E- and D-mode pHEMTs 9
2-3 Extraction of extrinsic and intrinsic components using S-parameters 11
2-3.1 Extraction of parasitic capacitors 12
2-3.2 Extraction of parasitic resistors and inductors 14
2-3.3 Extraction of intrinsic elements 17
2-4 Extracted components under different bias conditions 23
2-5 Conclusions 28
Chapter 3 29
Symmetrical Nonlinear model of single-gate E- and D-mode pHEMTs 29
3-1 Introduction 29
3-1.1 Physics based model 29
3-1.2 Measurement based model 30
3-2 pHEMT operations for switch circuits 33
3-3 Symmetrical nonlinear pHEMT models for switch circuits 35
3-3.1 Drain current model 35
3-3.2 Schottky diode model 38
3-3.3 Nonlinear capacitor model 39
3-4 Switch measurement results 40
3-4.1 Model parameters extractions 40
3-4.2 Switch model verification 40
3-5 Large-signal model for amplifier applications 44
3-5.1 Electro-thermal model 45
3-5.2 Frequency dispersion model 47
3-5.3 Other nonlinear elements 47
3-5.4 Model validation of the single-gate E- and D-mode pHEMTs 48
3-6 Conclusions 55
Chapter 4 56
Improvement of AlGaAs/InGaAs pHEMTs by using dual-gate E/D-mode technology 56
4-1 Introduction 56
4-2 Dual-gate pHEMT device cross-section and fabrication 57
4-3 DC, RF and power characteristics of dual-gate E/D-mode pHEMTs 59
4-3.1 Dual-gate pHEMT DC characteristics 61
4-3.2 Dual-gate pHEMT RF performance 65
4-3.3 Dual-gate pHEMT power performance 67
4-4 2.4 GHz Dual-gate E/D-Mode pHEMT microwave circuits 69
4-5 Noise characteristics of dual-gate E/D-mode pHEMTs for noise applications 71
4-6 Conclusions 78
Chapter 5 79
A novel dual-gate E/D-mode distributed amplifier 79
5-1 Introduction 79
5-2 Dual-gate E/D-mode pHEMTs model 80
5-3 Distributed amplifier design 84
5-3.1 Dual-gate E/D-mode pHEMTs for distributed amplifier 84
5-3.2 Loss compensating network 85
5-3.3 Broadband distributed amplifier 87
5-4 Measurement result 90
5-5 Conclusions 93
Chapter 6 95
Conclusions and future work 95
6-1 Conclusions 95
6-2 Future works 97
參考文獻 [1] R. Dingle, H. L. Stromer, A. C. Gossard, and W. Wiemann, “ Electron mobility in modulation doped semiconductor supperlattices, “ Applied physics lett. Vol. 33, pp. 665, Oct. 1978.
[2] M. Golio, RF and microwave semiconductor device handbook, CRC press Washington DC.
[3] A. K. Mrunal, M. A. Shirasgaonkar, and R. Patrikar, “Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL),” IEEE Asia pacific conference on circuit and systems, Digest, pp. 1488-1491, Dec. 2006.
[4] Y. J. Chan and D. Pavlidis, “ High performance E/D-mode InAlAs/InGaAs HIGFET technology and integrated logic functions,” International indium phosphide and related materials conference, Digest, pp. 499-502, April 1992.
[5] K. R. Nary and S. I. Long, “GaAs two-phase dynamic FET logic: a low-power logic family for VLSI,” IEEE J. solid-state circuits, Vol. 27, No. 19, pp. 1364-1371, Oct. 1992.
[6] P. K. T. Mok and C. A. T. Salama, “A novel high-voltage high-speed MESFET using a standard GaAs digital IC process,” IEEE trans. Electron Devices, Vol. 41, No. 2 pp. 246-250, Feb. 1994.
[7] C. Mohamed, A. Khy, and B. Huyart,” A 1–20-GHz Broadband MMIC Demodulator for Low IF Receivers in Multistandard Applications,” IEEE trans. Microwave Theory tech., Vol. 57, No. 10, pp. 2318-2328, Oct. 2009.
[8] H.Y. Chang C. K. Lin, and Y. C. Wang, “A 30–130 GHz Ultra Broadband Direct-Conversion BPSK Modulator Using a 0.5-μm E/D-PHEMT Process,” IEEE microwave and wireless components lett., Vol. 17, No. 11, pp. 805-807, Nov. 2007.
[9] K. Kohama, M. Nakamura, K. Onodera, S. Wada, S. Tamari, and Y. Mizunuma, “ An antenna switch MMIC for GSM/UMTS handsets using E/D-mode JpHEMT technology,” IEEE radio frequency integrated circuit symposium, Digest, pp. 509-512, June, 2005.
[10] V. Corso, E. M. Bastida, V. Patiri, and C. A. Finardi, “Design and producibility optimization of single-bias d.c. coupled 10 Gbit/s MMIC transimpedance amplifiers using a GaAs enhancement/depletion PHEMT technology,” IEEE microwave and optoelectronics conference, Digest, Vol. 1, pp. 261-263, Aug. 1999.
[11] C. M. Snowden and R. R. Pantoja, “Quasi-two-dimensional MESFET simulations for CAD,” IEEE trans. Electron Devices, Vol. 36, No. 9, pp. 1564-1574, Sept. 1989.
[12] W. R. Curtice, “A MESFET Model for Use in the Design of GaAs Integrated Circuits,” IEEE trans. Microwave Theory Tech., Vol. 28, No. 5, pp. 448-456, May 1980.
[13] W. Curtice and M. Ettenberg, “A nonlinear GaAsFET model for use in the design of output circuits for power amplifiers,” IEEE Trans. Microwave Theory Tech., Vol. MTT-33, pp. 1383-1394, Dec. 1985.
[14] H. K. Gummel and H. C. Poon, “An integrated charge control model for bipolar transistors,” Bell Syst. Tech. J., Vol. 49, pp. 827-952, May 1970.
[15] D. E. Root, M. Pirola, S. Fan, W. J. Anklam, and A. Cognata, "Measurement-based large-signal diode modeling system for circuit and device design," IEEE Trans. Microwave Theory Tech., vol. 41, No. 12, pp. 2211-2217, Dec. 1993.
[16] Q. J. Zhang, Neural networks for RF and microwave design, Boston MA: Artech House, 2000.
[17] H. Statz, P. Newman, I. Smith, R. Pucel, and H. Haus, “GaAs FET device and circuit simulation in SPICE,” IEEE trans. Electron Devices, Vol. 34, No.2, pp. 160-169, Feb. 1987.
[18] I. Angelov, H. Zirath, and N. Rorsman, “A new empirical nonlinear model for HEMT and MESFET devices,” IEEE trans. Microwave Theory Tech., Vol. 40, No. 12, pp. 2258-2266, Dec. 1992.
[19] A. E. Paker and D. J. Skellern, “ A realistic large-signal model MESFET model for spice,” IEEE trans. Microwave Theory Tech., Vol. 45, No. 9, pp. 1563-1571, Sep. 1997.
[20] V. I. Cojocaru and T. J. Brazil, “A scalable general-purpose model for microwave FETs including DC/AC dispersions effects,” IEEE trans. Microwave Theory Tech., Vol. 45, No. 12, pp. 2248-2255, Dec. 1997.
[21] J. Kim and Y. Kwon, “ Intermodulation analysis of dual-gate FET mixers,” IEEE trans. Microwave theory tech., Vol. 50. No. 6, pp. 1544-1555, June 2002.
[22] I. Kallfass, H. Massler, A. Leuther, A. Tessmann, and M. Schlechtweg, “A 210 GHz Dual-Gate FET Mixer MMIC with 2 dB conversion gain, high LO-to-RF isolation, and low LO-Drive requirements,” IEEE microwave and wireless components lett., Vol. 18. No. 8, pp. 557-559, Aug. 2008.
[23] Z Gu, D. Johnson, S. Belletete, and D. Fryklund,” Low insertion loss and high linearity PHEMT SPDT and SP3T switch ICs for WLAN 802.11 a/b/g applications,” IEEE radio frequency integrated circuits symposium, Digest. pp. 505-508, June 2004.
[24] Y. Chen and Z. Chen, “A dual-gate FET subharmonic injection-locked self-oscillating active integrated antenna for RF transmission,” IEEE microwave and wireless components lett. Vol. 13, No. 6, pp. 199-201, June 2003.
[25] B. Kim, H. Q. Tserng, and P. Saunier, “ GaAs dual-gate FET for operation up to k-band,” IEEE trans. Microwave Theory Tech., Vol. 32, No. 3, pp. 256–261, Mar, 1984.
[26] I. Ohbu, T. Tanimoto, S. Tanaka, H. Matsumoto, A. Terano, M. Kudo, T. Nakamura, “ High-efficiency dual-gate InGaAs pseudomorphic HEMTs for high-power amplifiers using single-voltage supply,” International electron devices meeting, Digest, pp. 189-192, Dec. 1995.
[27] J. Ibrahim, B. Syrett, and J. Bennett, “A new analytical small-signal model of dual-gate GaAs MESFET,” IEEE international microwave symposium, Digest, Vol. 2, pp. 1277-1289, May 2001.
[28] W. K. Deng and T. H. Chu, “Elements extraction of GaAs dual-gate MESFET small-signal equivalent circuit,” IEEE trans. Microwave Theory Tech. Vol. 46, No. 12, pp. 2383-2390, Dec. 1998.
[29] S. Bashirzadeh, A. Nabavi, and M. Fardis, “GaAs DGMESFET modeling using SGMESFET models,” IEEE international radio frequency integration technology: integrated circuit for wideband communication and wireless sensor network workshop, proceedings, pp. 202-206, Dec. 2005.
[30] M. Abdeen and M. C. E. Yagoub, “Nonlinear and Isothermal Neural-Based Modeling of the Dual Gate MESFET,” Electrical and computer engineering conference, pp. 103-106, April 2007.
[31] W. S. Percival, “ Thermionic value circuits,” British Patent 460562, Jan. 1937.
[32] H. W. Horton, J. H. Jasberg, and J. D. Noe, “Distributed Amplifiers: Practical Considerations and Experimental Results,” Proceeding of the IRE, Vol. 38, No. 7, pp. 748-753, July 1950.
[33] J. B. Beyer, S. N. Prasad, R. C. Becker, J. E. Nordman, and G. K. Hohoenwarter, “MESFET distributed amplifier design guidelines,” IEEE trans. Microwave Theory Tech., Vol. 32, No. 3, pp. 268-275, March 1984.
[34] R. Larue, S. Bandy, and G. Zdasiuk, “A High Gain, Monolithic Distributed Amplifier Using Cascode Active Elements,” IEEE international microwave symposium, Digest, Vol. 86, No. 1, pp. 821-824, June 1986.
[35] S. Deibele, J. B. Beyer, “Attenuation compensation in distributed amplifier design,” IEEE trans. On microwave theory tech. Vol. 37, No. 9, pp. 1425-1433, Sept. 1989.
[36] W. Kennan, T. Andrade, and C. C. Huang, “A 2—18-GHz monolithic distributed amplifier using dual-gate GaAs FET's,” IEEE trans. Electron Devices, Vol. 31, No. 12, pp. 1926-1930, Dec. 1984.
[37] PD50-01 0.5 ?m InGaAs pHEMT Enhancement/Depletion-mode device (E/D-mode) layout design manual, Win Semiconductor, Taiwan.
[38] A. D. Patterson, V. F. Fusco, J. J. McKeown, and J. A. C. Stewart, “ A systematic optimization strategy for microwave device modeling,” IEEE trans. Microwave Theory Tech., Vol. 41, No. 3, pp. 395-405, March 1993.
[39] C. Dambrine, A. Cappy, F. Heliodore, and E. Playez, “ A new method for determining the FET small-signal equivalent circuit,” IEEE trans. Microwave Theory Tech., Vol. 36, No.7, pp. 1151-1159, July 1988.
[40] L. T. Wurtz, “ GaAs FET and HEMT small-signal parameters extraction for measurement S-parameters,” IEEE trans. Instrumentation and Measurement, Vol. 43, No. 4, pp. 655-658, Aug. 1994.
[41] N. Rorsman, M. Garcia, C. Karlsson, and H. Zirath, “ Accurate small-signal modeling of HFET’s for millimeter-wave applications,” IEEE trans. Microwave Theory Tech., Vol. 44, No. 3, pp. 432-437, March, 1996.
[42] K. Lee, M. S. Shur, A. J. Valois, G. Y. Robinson, X. C. Zhu, and A. V. Derziel, “A new technique for characterization of “End” resistance in modulation-dope FET’s,” IEEE trans. Electron Devices., Vol. 31, No. 10, pp. 1934-1398, Oct. 1984.
[43] B. L. Ooi and J. Y. Ma, “ An improved but reliable model for MESFET parasitic capacitance extraction,” in Proc. Int. IEEE Radio Frequency Integrated Circuits Symposium, pp. 567-580, June 2003.
[44] L. Yang. and S. I. Long, “ New method to measure the source and drain resistance of the GaAs MESFET,” IEEE Electron Device Lett., Vol. 7, No. 2, pp. 75-77, Feb. 1986.
[45] J. M. Golio, Microwave MESFETs and HEMTs, Artech House, 1991.
[46] Advanced Design System User Manual, Agilent Technologies, Palo Alto, CA, USA.
[47] A. Materka and T. Kacprzak, “Computer Calculation of Large-Signal GaAs FET Amplifier Characteristics,” IEEE Trans. Microwave Theory Tech., Vol. 33, pp. 129-135, Feb. 1985.
[48] http://www-device.eecs.berkeley.edu/~bsim3/bsim_ent.html
[49] M. Nakayama, K. Horiguchi, K. Yamamoto, Y. Yoshii, S. Sugiyama, N. Suematsu, and T. Takagi, “A 1.9 GHz single-chip RF front-end GaAs MMIC with low-distortion cascode FET mixer for personal handy-phone system terminals,” in IEEE RF IC Symp. Dig., pp. 205-205, June 1998.
[50] T. Ranta, J. Ella, and H. Pohjonen, “Antenna switch linearity requirements for GSM/WCDMA mobile phone front-ends,” in European Wireless Technology Conf. Dig., pp. 23-26, Oct. 2005.
[51] R. S. Virk and S. A. Maas, “Modeling MESFET’s for intermodulation analysis of resistive FET mixers,” in IEEE MTT-S Int. Microwave Symp. Dig., pp. 1247-1250, 1995.
[52] S. Peng, P. J. McCleer, and G. I. Haddad, “Intermodulation analysis of FET resistive mixers using Volterra series,” in IEEE MTT-S Int. Microwave Symp. Dig., pp. 1377-1380, 1996.
[53] K. Yhland, N. Rorsman, M. Garcia, and H. F. Merkel, “A symmetrical nonlinear HFET/MESFET model suitable for intermodulation analysis of amplifiers and resistive mixers,” IEEE Trans. Microwave Theory Tech., Vol. 48, pp. 15-22, Jan. 2000.
[54] J. Wood and D. E. Root, “A symmetric and thermally-de-embedded nonlinear FET model for wireless and microwave applications,” in IEEE MTT-S Int. Microwave Symp. Dig., pp. 35-38, June 2002.
[55] J. Xu, D. Gunyan, M. Iwamoto, J. M. Horn, A. Cognata, and D. E. Root, “Drain-source symmetric artificial neural network-based FET model with robust extrapolation beyond training data,” in IEEE MTT-S Int. Microwave Symp. Dig., pp. 2011-2014, June 2007.
[56] A. Ehoud, L. P. Dunleavy, S. C. Lazar, and R. E. Branson, “Extraction techniques for FET switch modeling,” IEEE Trans. Microwave Theory Tech., Vol. 43, pp. 1863-1868, Aug. 1995.
[57] H. Mizutani, N. Funabashi, M. Kuzuhara, and Y. Takayama, “Compact DC-60-GHz HJFET MMIC switches using ohmic electrode-sharing technology,” IEEE Trans. Microwave Theory Tech., Vol. 46, pp. 1597-1603, Nov. 1998.
[58] R. H. Caverly, “On-state distortion in high electron mobility transistor microwave and RF switch control circuit,” IEEE Trans. Microwave Theory Tech., Vol. 48, pp. 98-103, Jan. 2003.
[59] R. H. Caverly, “Distortion in off-state Arsenide MESFET switches,” IEEE Trans. Microwave Theory Tech., Vol. 41, pp. 1323-1328, Aug. 1993.
[60] R. S. Virk, and S. A. Maas, “Modeling MESFET’s for Intermodulation Analysis in RF Switches,” IEEE Microwave Guided Wave Letters, Vol. 4, pp. 376-378, Nov. 1994.
[61] J. A. Garcia, M. L. De la Fuente, J. C. Pedro, A. Mediavilla, A. Tazon, and J. L. Garcia, “Intermodulation distortion reduction with drain bias in parallel MESFET switch,” IEE Electronics Letters, Vol. 35, pp.907-909, May 1999.
[62] M. A. Holm and D. M. Brookbanks, “Advanced meander gate p-HEMT model for accurate harmonic modeling of switch MMIC designs,” in European Gallium Arsenide and Other Semiconductor Application Symp. Dig., pp. 317-320, Oct. 2005.
[63] C. J. Wei, A. Klimashov, Y. Zhu, E. Lawrence, and G. Tkachenko, “Large-signal pHEMT switch model, which accurately predicts harmonics and two-tone inter-modulation distortion,” in IEEE MTT-S Int. Microwave Symp. Dig., pp. 1155-1158, June 2005.
[64] N. Scheinberg, and A. Pinkhasov, “A computer simulation model for simulating distortion in FET resistors,” IEEE Trans. Computer-Aided Design of Integrated Circuits and System, Vol. 19, pp. 981-989, Sept. 2000.
[65] P. Bendix, P. Pakers, P. Wagh, L. Lemaitre, W. Grabinski, and C. C. McAndrew, “RF distortion analysis with compact MOSFET models,” in IEEE Custom Integrated Circuits Conf. Dig., pp. 9-12, Oct. 2004.
[66] M. Wren and T. J. Brazil, “Enhanced prediction of pHEMT nonlinear distortion using a novel charge conservative model,” in IEEE MTT-S Int. Microwave Symp. Dig., Vol. 1, pp. 31-34, June 2004.
[67] I. Angelov, N. Rorsman, J. Stenarson, M. Carcia, and H. Zirath, “An empirical table-based FET model,” IEEE Trans. Microwave Theory Tech., Vol. 47, pp. 2350-2357, Dec. 1999.
[68] IC-CAP User Manual, Agilent Technologies, Palo Alto, CA, USA.
[69] S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd Edition, New York: Wiley-Interscience, 2007.
[70] W. R. Curtice, J. A. Pla, D. Bridges, T. Liang, and E. E. Shumate, “A new dynamic electro-thermal nonlinear model for silicon RF LDMOS FETs,” IEEE microwave symposium, Digest, Vol. 2, pp. 419-422, June 1999.
[71] Agilent B1500A semiconductor device analyzer: easy high power pulse I-V measurement using the Agilent B1500A’s HV-SPGU module, Agilent Technologies, Palo Alto, CA, USA.
[72] High frequency transistor primer part III thermal properties, Agilent Technologies, Palo Alto, CA, USA.
[73] Operating manual automated tuner system pc based application software, MuaryTM microwave USA.
[74] S. Asai, F. Murai, H. Kodera, “ GaAs dual-gate Schottky-barrier FET's for microwave frequencies,” IEEE trans. Electron Devices, Vol. 22, No. 22, pp. 897-904, Oct. 1975.
[75] W. S. Lour, M. K. Tsai, K. C. Chen, Y. W. Wu, S. W. Tan, and Y. J. Yang, “High -linearity and variable-voltage swing dual-gate In0.5Ga0.5P/In0.2Ga0.8As pseudomorphic high electron mobility transistors,” Optoelectronic and microelectronic materials and devices conference digest, pp. 226-229, Dec. 2000.
[76] E. Class, M. Shields,and A. Reyes ,” High performance single supply power amplifiers for GSM and DCS applications using true enhancement mode FET technology,” IEEE MTT-s Int. Microwave Symp. Dig, vol. 1, pp.557-560, Jun, 2002.
[77] W. Abey, T. Moriuchi, R. Hajji, Y. Nonaka, E. Matani, W. Kennan, and H.
Dong ,” A single supply high performance PA MMIC for GSM handsets using
quasi-enhancement mode PHEMT,” IEEE MTT-s Int. Microwave Symp. Dig, vol. 2, pp. 923-926, Jun., 2001.
[78] T. Tanimoto, I. Ohbu, S. Tanaka, A. Kawai, M. Kudo, A. Terano, T. Nakamura,"
“Single-voltage-supply highly efficient E/D dual-gate pseudomorphic double- hetero HEMT’s with platinum buried gates ” IEEE Trans. Electron Devices, vol. 45, pp. 1176-1182 June 1998
[79] N. Harada, S. Kuroda, T. Katakami, K. Hikosaka, T. Mimura, and M. Abe,” Pt-base gate enhancement-mode InAlAs/InGaAs HEMT’s for large-scale integration,” Indium Phospide and Related Materials, 3rd International Conference, pp. 377-380, April 1991.
[80] I Adesida, A Mahajan, and G Cueva,” Enhancement-mode InP-based HEMT devices and applications,” Indium Phosphide and Related Materials, International Conference, pp. 493-496, May 1998.
[81] P. K. T Mok, and C. A. T. Salama, “A novel high-voltage high-speed MESFET using a standard GaAs digital IC process”, IEEE Trans. Electron Devices., vol. 41, pp. 246–250, Feb. 1982.
[82] R. Thompson, V. Kaper, T. Prunty, and J. R. Shealy, “Improvement of high speed
blocking voltage by means of metal field plate for GaAs Schottky power rectifiers”, Power Semiconductor Devices and ICs, Proceedings of the 3rd International Symposium on, pp. 159-163, Apr. 1991.
[83] A. Inoue, S. Goto, T. Kunii, T. Ishikawa, Y. Matsuda, “A high efficiency, high voltage, balanced cascode FET,” IEEE MTT-S Int. Microwave Symp. Dig., pp. 669-672, June 2005.
[84] T. Furutsuka, M. Ogawa, and N. Kawamura,” GaAs dual-gate MESFET's,” IEEE Trans. Electron Devices, vol. 25, pp. 580-586, Jun. 1978.
[85] L. Lee, W. Long, S. Strahle, D. Geiger, B. Henle, H. Kunzel, E. Mittermeier, U. Erben, U. Spitzberg and E. Kohn,” Dual-gate HFET with closely spaced electrodes on InP,” Proceedings of IEEE Cornell Conference., pp. 522-531, 1995.
[86] P. J. Tasker and B. Hughes,” Importance of source and drain resistance to the maximum fT of millimeter-wave MODFETs,” IEEE Electron. Device Lett., Vol. 10, pp.291-293, July 1989.
[87] H. Rohdin, Chung-Yi Su, N. Moll, A. Wakita, A Nagy, V. Robbins, and M. Kauffman,” Semi-analytical analysis for optimization of 0.1-μm InGaAs-channel MODFETs with emphasis on on-state breakdown and reliability,” Indium Phosphide and Related Materials, International Conference, pp. 357-360, May 1997
[88] Sandeep R. Bahl and Jesus A. del Alamo,” A new drain-current injection technique for the measurement of off-state breakdown voltage in FET’s,” IEEE Electron Device Lett., Vol. 40, pp. 1558-1560, Aug. 1993.
[89] Y. H. Chow and T. Chong, “ A high performance 2.4 GHz linear power amplifier in enhancement-mode GaAs pHEMTs technology,” 34th Microwave Conference European, Vol. 1, pp. 5-8, 2004.
[90] C. K. Chu, H. K. Huang, C. C. Wang, Y. H. Wang, C. C. Hsu, W. Wu,, C. L. Wu, and C. S. Chang, “A 3.3 V self-biased 2.4-2.5GHz high linearity PHEMT MMIC power amplifier,” Proceedings of international Solid-state Circuits Conference, pp.667-670, 2003.
[91] M. Park, A. Hokyun, D. M. Kang, J. Honggu, J. Mun, H. Kim, and K. I. Cho,” Single supply, high linearity, high efficient PHEMT power devices and amplifier for 2 GHz & 5 GHz WLAN applications,” 33th Microwave Conference European, vol. 1, pp.371-374, 2003.
[92] T. Quach, and J. Staudinger, “A high efficiency commercial GaAs MESFET power amplifier for PCM/CIA applications at 2.45 GHz,” Proceedings of Gallium Arsenide Integrated Circuit Symposium, pp. 179-182, 1994.
[93] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS low noise amplifier,” IEEE J. Solid-State Circuits, Vol. 32, pp. 745-759, May 1997.
[94] F. Chao, C. L. Law, H. James, “A 3.1–10.6 GHz Ultra-Wideband Low Noise Amplifier With 13-dB Gain, 3.4-dB Noise Figure, and Consumes Only 12.9 mW of DC Power,” IEEE Microwave and Wireless Components Lett., Vol. 17, pp. 295-297, Apr. 2007.
[95] M. A. Masud, H. Zirath, and M. Kelly, ”A 45-dB variable-gain low-noise MMIC amplifier,” IEEE trans. Microwave Theory Tech., Vol. 54, pp. 2848-2855, June 2006.
[96] W. R. Deal, M. Biedenbender, P. H. Liu, J. Uyeda, M. Siddiqui, and R. Lai, ” Design and Analysis of Broadband Dual-Gate Balanced Low-Noise Amplifiers,” IEEE J. Solid-State Circuits, Vol. 42, pp. 2107 – 2175, Oct. 2007.
[97] F. J. Tegude, W. Daumann, R. Reuter, W. Brockerhoff,” InAlAs/InGaAs/InP Dual-gate-HFET’s: New aspects And Properties,” Indium Phosphide and Related Materials, 1997, International Conference on, pp. 181-184, May 1997.
[98] H. Morkner, M. Vice, M. Karakucuk, W. Abey, N. Lan, J. Kessler, and R. Ruebusch, “A Single Chip 802.11abgn Enhancement Mode PHEMT MMIC with dual LNAs, Switches, and Distortion Compensation Power Amplifiers,” IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp. 365 – 368, June 2007.
[99] M. Nakatsugawa, Y. Yamaguchi, M. Muraguchi, An L-band ultra-low-power-consumption monolithic low-noise amplifier,” IEEE trans. Microwave Theory Tech., Vol. 43, pp. 1745-1750, July, 1995.
[100] C. Tsironis and R. Meierer, “ Microwave wide-band model for GaAs dual-gate MESFET’s,” IEEE trans. Microwave Theory Tech., Vol. 30, pp. 243-251, Mar., 1982.
[101] H. Fukui,” Optimal noise figure of microwave GaAs MESFET's,” IEEE Trans. Electron Devices, Vol. 26, pp. 1032-1037, Jul. 1979.
[102] Y. S. Wang and Lu L. H., “ 5.7 GHz low-power variable gain LNA in 0.18 ?m CMOS,” Electron Lett., Vol. 41, pp. 66-68, Jan. 2005.
[103] I. Song, J. Jeon, H-S. Jhon, J. Kim, B. G. Park, J. D. Lee, and H. Shin, “A Simple Figure of Merit of RF MOSFET for Low-Noise Amplifier Design, “ IEEE Electron Lett., Vol. 29, pp. 1380 – 1382, Dec. 2008.
[104] S. Asgaran, M. J. Deen, and C. H. Chen, “A 4-mW monolithic CMOS LNA at 5.7GHz with the gate resistance used for input matching,” IEEE Microwave and Wireless Components Lett., Vol. 16, pp. 188-198, April 2006.
[105] D. Langrez, E. Delos, and G. Salmer, “ Modelling of 0.15μm Dual Gate PM-HEMTs by using Experimental Extraction,” European Microwave Conference Digest, pp. 355-360, Oct. 1994.
[106] K. Moez, and M. Elmasry, “A 10dB 44GHz Loss-Compensated CMOS Distributed Amplifier,“ IEEE international Solid-State circuits Conference digest, pp. 548-621, Feb. 2007.
[107] D. M. Pozar, “ Microwave engineering,” John Wiley & Sons
[108] R. E. Leoni III, S. J. Lichwala, J. G. Hunt, C. S. Whelan, P. F. Marsh, W. E. Hoke, and T. E. Kazior, “ A dc-45 GHz metamorphic HEMTs traveling wave amplifier, “ IEEE GaAs IC Symposium Digest, pp. 133-136, 2001.
[109] K. Won and K. Youngwoo, “ Improving noise analysis of distributed preamplifier with cascode FET cells,” IEEE trans on Microwave Theory Tech., Vol 53, No. 1 pp. 361-371, Jan. 2005.
[110] W. J. Thompson, “ A broadband low noise dual-gate FET distributed amplifier, “ IEEE Microwave and Millimeter Wave Monolithic circuits Symposium Digest, pp. 11-13, June 1989.
[111] C. Yuen, Y. C. Pao, and N. G. Bechtel, “ 5-60 GHz high-gain distributed amplifier utilizing InP cascode HEMT’s, “ IEEE J. Solid State Circuits, Vol. 27, No. 10, pp. 1434-1438, Oct. 1992.
[112] E. Sovero, D. Deakin, W. J. Ho, G. D. Robinson, C. W. Farley, J. A. Higgins, M. F. Chang, “ Monolithic indium phosphide-based HEMT multioctave distributed amplifier,” IEEE MMT-S international Microwave Symposium Digest, pp. 1085-1087, May. 1990.
[113] J. D. Jin and S. S. H. Hsu, “ A miniaturized 70-GHz Broadband Amplifier in 0.13-?m CMOS Technology,” IEEE trans. Microwave Theory Tech. Vol. 56, No. 12, pp. 3086-3092, Dec. 2008.
指導教授 辛裕明、黃建彰、詹益仁
(Yue-Ming Hsin、Chien-Chang Huang、Yi-Jen Chan)
審核日期 2009-11-17
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