用於數位D類放大器的高效能三角積分調變器設計

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陳威佐(Wei-Tso Chen) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

用於數位D類放大器的高效能三角積分調變器設計
(Design of High-Performance Sigma-Delta Modulators for Class-D Digital Amplifiers)

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摘要(中)

本論文提出一種應用於數位D類放大器的高效能三角積方調變器電路。D類放大器較傳統AB類的音頻放大器具有更高效能的優勢，而數位化的D類放大器可以簡化音頻轉換器電路，節省電路面積與功耗。然而傳統D類放大器使用脈衝寬度訊號來實現，除了諧波失真嚴重外，較小的訊號動態範圍造成效能不佳。本論文的D類放大器設計使用三角積分調變技術產生脈衝訊號，用以改善上述缺點。藉由分析兩種不同回授架構的三角積分調變器電路並研究兩者對D類放大器的好壞，本論文提出一個新三角積分調變器電路架構，使之較傳統電路有更廣的動態範圍和更低的諧波失真。經硬體實現驗證顯示，本論文所提的新架構，電路複雜度與傳統架構相仿，而諧波失真較之傳統架構降低了大約10%左右；其調變指數可達100%，大幅改善傳統架構最大輸入振幅受限的缺點。本論文所提的新架構能有效提升電路效能與品質。

摘要(英)

A high performance sigma-delta modulator for class-D audio amplifiers is proposed in this thesis. Class-D topology is superior to class-AB one for its higher efficiency. In addition, realizing class-D amplifier by all digital can greatly reduce audio data converter circuits, saving hardware and power consumption. However, the traditional class-D amplifier based on pulse-width modulation suffers from larger harmonic distortions and poor performance caused by limited dynamic range. This research uses sigma-delta modulation techniques to mitigate such drawback. By analyzing two different types of sigma-delta modulator topologies, a new architecture is proposed. The experimental results show that, compared to the conventional class-D sigma-delta modulators, the proposed architecture can improve total harmonic distortions about 10% and can operate with a modulation index of 100% maximum input range, with same hardware complexity.

關鍵字(中)

★ 三角積分調變器
★ 數位Ｄ類放大器

關鍵字(英)

★ Sigma-Delta Modulators
★ Class-D Digital Amplifiers

論文目次

摘要i
英文摘要ii
致謝iii
目錄iv
圖目錄vii
表目錄x
第一章介紹 1
1-1 簡介 1
1-2 動機 2
1-3 論文組織 3
第二章 D類放大器 4
2-1 音頻放大器 4
2-2 D類放大器 6
2-3 訊號調變方式 8
2-3-1 類比脈衝調變 8
2-3-2 數位脈衝調變 10
2-4 PCM轉PDM訊號 11
第三章低階調變器 13
3-1 類比數位轉換器種類 13
3-2 類比數位轉換器原理 16
3-2-1 量化誤差 17
3-3 類比數位轉換器效能評估 19
3-3-1 解析度 19
3-3-2 總諧波失真 20
3-3-3 奈奎斯特頻率ADC 21
3-3-4 超取樣頻率 21
3-3-5 超取樣ADC 22
3-3-6 量化階數 23
3-3-7 高頻增益 24
3-3-8 動態範圍 26
3-4 調變器 27
3-4-1 調變器的由來 27
3-4-2 調變器 28
3-4-3 低階調變器 29
3-4-4 誤差回授的調變方式 32
第四章高階設計 34
4-1 高階架構 34
4-1-1 單迴路式架構 35
4-1-2 高階誤差回授架構 38
4-2 兩種不同架構的比較 39
4-2-1 穩定度& 動態範圍 39
4-2-2 PCM訊號的SNR分析 43
4-2-3 PWM訊號的SNR分析 44
4-2-4 量化階數分析 46
4-2-5 高頻增益造成的影響 46
4-3 新架構 50
4-3-1 穩定度 52
4-3-2 輸出訊號的SNR分析 53
4-3-3 三種不同架構的比較 56
第五章電路實現 61
5-1 設計規格 61
5-2 電路架構 61
第六章結論 72
參考文獻 73

參考文獻

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指導教授

蘇純賢、蔡佩芸
(Chun-Hsien Su、Pei-Yun Tsai)

審核日期

2008-10-21

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