博碩士論文 955201026 詳細資訊


姓名 許豐麟(Feng-lin Shiu)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 醫療植入通訊服務頻帶射頻前端接收電路之研製
(The Implementation of RF Front-End Receiving Circuits for Medical Implant Communication Service Band)
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摘要(中) 本論文係以TSMC 0.18 μm CMOS製程,研製應用於醫療植入通訊系統射頻接收機前端電路,主要設計電路包含轉導提升機制的低雜訊放大器,與低功率消耗低雜訊放大器,轉導級輸入匹配的混頻器,與一個利用本地振盪源作為轉導放大的低功率消耗混頻器,以及一低雜訊放大器結合混頻器組成的接收機電路,與變壓器回授振盪器。
第一部分為兩個低雜訊放大器之研製。轉導提升放大器,在電晶體閘極與源極間加入一反相增益,利用電容交錯耦合電路設計來達到轉導提升的效果,量測得到11.84 dB的增益,輸入與輸出返回損耗都小於-10 dB,雜訊指數為4.11 dB,輸入1 dB壓縮點為-26 dBm,核心電路功率消耗為1.74 mW。另一為低功率消耗低雜訊放大器,結合並聯回授放大器和共閘極放大器,並使用電晶體疊接方式重複利用電流來達到省電效果,由量測結果得到10.37 dB的增益,輸入與輸出返回損耗都小於-10 dB,雜訊指數為4.77 dB,輸入1 dB壓縮點為-25 dBm,核心電路功率消耗為0.51 mW。
第二部分為混頻器之研製。轉導級輸入匹配混頻器,利用調整電晶體大小與負載電阻達到阻抗匹配。量測得到轉換增益為5.57 dB,輸入1 dB壓縮點為-11.5 dBm,三階交互調變交叉點為3 dBm,本地振盪源至中頻與射頻隔離度皆大於49 dB,射頻至中頻隔離度大於39 dB,核心電路功率消耗為2.88 mW。低功率消耗混頻器利用本地振盪源作轉導放大,並重複利用電流節省功率消耗,量測得到轉換增益為10.2 dB,輸入1 dB壓縮點為-13 dBm,三階交互調變交叉點為-2.5 dBm,本地振盪至中頻與射頻隔離度皆大於48 dB,射頻至中頻隔離度大於47 dB,核心電路功率消耗為0.98 mW。接收機電路,利用低功率消耗低雜訊放大器,結合混頻器組成一接收機電路,量測得到轉換增益為19.74 dB,此時輸入返回損耗為-7.9 dB而輸出返回損耗為-24.5 dB,雜訊指數為7.02 dB,輸入1 dB壓縮點為-24 dBm,三階交互調變交叉點為-13 dBm,本地振盪至中頻與射頻隔離度皆大於72 dB,射頻至中頻隔離度大於28 dB,核心電路功率消耗為1.65 mW。
第三部分為壓控振盪器之研製。利用變壓器耦合達到低電壓操作。由量測結果可知,在離主頻1 MHz之相位雜訊為-137.37 dBc/Hz,輸出功率在沒有扣除接線損耗為-5.66 ~ -4.76 dBm,核心電路功率消耗為1.23 mW,而優化指標為-188.33 dBc/Hz。
摘要(英) This paper investigates RF receiver front-end circuits for Medical Implant Communication Service (MICS). A 0.18 μm TSMC CMOS technology was adopted to implement the following circuits, gm-boosting low noise amplifier, low power consumption low noise amplifier, input impedance match mixer, low power consumption mixer, receiver circuit (LNA + Mixer), and voltage controlled oscillator.
The first section is the design of two low noise amplifiers; An inverse gain between transistor’s gate and source was used to amplify the transconductance gm. Thus, this gm-boosting technique was used in LNA by adding cross couple capacitors. The measured gain is 11.84 dB with input and output return losses lower than 10 dB. The obtained noise figure and P1dB are 4.11 dB and -26dBm, respectively. The power dissipation of the circuit core is only 1.74 mW. In another LNA, the current reuse technique was applied for low power consumption. The shunt-feedback amplifier (SFB) and common-gate amplifier (CG) were combined to obtain a high gm. The measured gain is 10.37 dB with input and output return losses lower than 10 dB. The obtained noise figure and P1dB are 4.77 dB and -25 dBm, respectively. The power dissipation of the circuit core is only 0.51 mW.
The second section describes the design of two mixers and a receiver. The size of transistors and resistors are optimized for the input impedance match without using huge area inductor. The measured conversion gain is 5.57 dB at 403.5 MHz. And the obtained P1dB and IIP3 are -11.5 dBm, and 3 dBm, respectively. The achieved isolations of LO_RF, LO_IF are better than -30 dB, and the RF_IF isolation is lower than -39 dB. The power dissipation of the circuit core is 2.88 mW. In another mixer, the local power is amplified to obtain the higher conversion gain. The current reuse technique was used to lower the power consumption. The measured conversion gain is 10.2 dB at 403.5 MHz. The obtained P1dB and IIP3 are -11.5 dBm, and 3 dBm, respectively. The achieved isolations of LO_RF, LO_IF are lower than -48 dB, and the RF_IF isolation is lower than -47 dB. The power dissipation of the circuit core is only 0.98 mW. Finally, LNA and mixer were combined to be a receiver. The measured conversion gain is 19.74 dB at 403.5 MHz. The noise figure is 7.02 dB with the input/output return losses of 7.9 dB and 24.5 dB. The obtained P1dB and IIP3 are -24 dBm, and -13 dBm, respectively. The achieved LO_RF, LO_IF isolations are lower than -72 dB, and the isolation RF_IF is lower than -28 dB. The power dissipation of the circuit core is only 1.65 mW.
The third section describes the design of a voltage controlled oscillator. The transformer feedback was adopted to achieve low supply voltage. From the measurement the oscillation frequency of the designed VCO is 393.5 MHz with a phase noise of -137.37 dBc/Hz at 1 MHz offset. The output power of VCO with cable loss is -5.66 ~ -4.76 dBm. The power consumption of VCO is 1.23 mW with an excellent Figure-of-Merit (FOM) of -188.33 dBc/Hz.
關鍵字(中) ★ 低功耗
★ 振盪器
★ 混頻器
★ 低雜訊放大器
關鍵字(英) ★ Mixer
★ LNA
★ low power consumption
★ VCO
論文目次 中文摘要 ............................................................................................................... I
英文摘要 ............................................................................................................. III
致謝 ...................................................................................................................... V
目錄 ................................................................................................................... VII
圖目錄 ................................................................................................................ IX
表目錄 .............................................................................................................. XIII
第一章 緒論 ..................................................................................... 1
1-1 研究動機 ................................................................................................ 1
1-2 研究成果 ................................................................................................ 2
1-3 章節簡述 ................................................................................................ 2
第二章 低雜訊放大器 ...................................................................... 3
2-1 低雜訊放大器簡介 ................................................................................. 3
2-2 低雜訊放大器之重要參數與MOS 電晶體雜訊 .................................... 3
2-2-1 低雜訊放大器之重要參數 ........................................................... 3
2-2-2 MOS 電晶體雜訊 ......................................................................... 6
2-3 轉導提升低雜訊放大器 .......................................................................... 8
2-3-1 轉導提升低雜訊放大器架構 ....................................................... 8
2-3-2 轉導提升低雜訊放大器模擬與量測結果 .................................. 11
2-3-3 轉導提升低雜訊放大器結果討論 ............................................. 16
2-4 低功率消耗低雜訊放大器 .................................................................... 16
2-4-1 低功率消耗低雜訊放大器架構 ................................................. 16
2-4-2 低功率消耗低雜訊放大器模擬與量測結果 .............................. 21
2-4-3 低功率消耗低雜訊放大器結果討論 ......................................... 25
第三章 混頻器 ............................................................................... 27
3-1 混頻器簡介 ........................................................................................... 27
3-2 混頻器之重要參數 ............................................................................... 27
3-3 轉導級輸入匹配混頻器 ........................................................................ 30
3-3-1 轉導級輸入匹配混頻器架構 ..................................................... 30
3-3-2 轉導級輸入匹配混頻器模擬與量測結果 .................................. 32
3-3-3 轉導級輸入匹配混頻器結果討論 ............................................. 38
3-4 應用於MICS 低功率消耗混頻器 ........................................................ 38
3-4-1 應用於MICS 低功率消耗混頻器架構 ...................................... 38
3-4-2 應用於MICS 低功率消耗混頻器模擬與量測結果 .................. 42
3-4-3 應用於MICS 低功率消耗混頻器結果討論 .............................. 47
3-5 應用於MICS 接收機 ............................................................................ 48
3-5-1 應用於MICS 接收機架構 ......................................................... 48
3-5-2 應用於MICS 接收機模擬與量測結果 ...................................... 49
3-5-3 應用於MICS 接收機結果討論 ................................................. 55
第四章 壓控振盪器 ........................................................................ 57
4-1 壓控振盪器簡介 ................................................................................... 57
4-2 壓控振盪器之重要參數 ........................................................................ 57
4-3 變壓器回授振盪器 ............................................................................... 58
4-4 變壓器回授振盪器模擬與量測結果 .................................................... 63
4-5 變壓器回授振盪器結果討論 ................................................................ 67
第五章 結論 ................................................................................... 68
5-1 結論 ..................................................................................................... 68
5-2 未來期許與研究方向 .......................................................................... 69
參考文獻 ............................................................................................................ 70
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[31] 梁可駿, “以脈衝靈敏函數分析壓控振盪器之相位雜訊特性與K頻段差動低雜訊放大器之研製,” 國立中央大學電機工程研究所碩士論文, 2007.
指導教授 邱煥凱(Hwann-Kaeo Chiou) 審核日期 2008-10-14
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