博碩士論文 955201115 詳細資訊




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姓名 張嘉顯(Chia-Hsien Chang)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 利用等效電路模型來開發一維與二維的蕭特基元件模擬
(Development of 1-D and 2-D Schottky Diode Device Simulation Using Equivalent-circuit Model)
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摘要(中) 本論文的研究是以等效電路模型法,加上符合物理性質的蕭基接觸之邊界條件模型,來開發一維與二維的蕭特基半導體元件。所謂等效電路模型法,就是將傳統用來描述半導體元件載子傳輸的漂移擴散模型(drift-diffusion model)轉換成等效電路模型。如此一來,元件的模擬就變成了電路的模擬,不但可以用電路模擬器來做元件模擬,而且可以和一般電路結合,形成混階模擬。首先,我們先推導一維與二維等效電路模型,然後裝入我們自己的電路模擬器中,並且以開發出的一維與二維蕭基二極元件,在第二章與第三章為例子,作I-V與 C-V的模擬並畫出圖形。
接著我們將說明第二章與第三章的困擾之處,並且在第四章利用電極分開法與電極沒有分開法結合Mixed-mode的方式,改善其缺點並驗證其蕭基二極體I-V及C-V曲線是否與前兩章一樣。最後,我們利用上述的方法,所得到的結果,有助於我們更深入了解元件之物理特性或製程參數對電路特性的影響。
摘要(英) ASTRACT
This thesis presents an equivalent circuit approach for development of 1-D and 2-D Schottky Diode Device Simulation. For an equivalent circuit approach, we will convert the traditional semiconductor device’s drift-diffusion model into an equivalent circuit model. Therefore, the device simulation will be changed into the circuit simulation, not only we can use a circuit simulator to make device simulation, but also we can combine the external circuit for the mixed-level simulation. First, we will show 1D and 2D equivalent circuit models. After that, we put them into our circuit simulator. We will show current-voltage, energy band, and C-V simulation.
Then, we will use an Electrode Separation method to measure the accurate capacitance, current-voltage, energy band, and to prove Electrode Separation method and without Electrode Separation method are the same. Finally, by the use of this technique, it’s helpful for us to investigate the interactions between semiconductor devices and circuits in which they are embedded from physical point of view.
關鍵字(中) ★ 蕭基接觸之邊界條件 關鍵字(英) ★ Electrode Separation method
論文目次 1.Introduction........................................1
2.One-dimensional Schottky Diode Device Development..2
2.1 1-D Model review..................................2
2.2 1-D Schottky Diode Device Modeling................5
2.3 The Simulation result of 1-D Schottky Diode Device...10
2.3.1 I-V Simulation.....................................12
2.3.2 C-V Simulation.....................................13
3.Two-dimensional Schottky Diode Device Development..18
3.1 2-D Model review.....................................18
3.2 2-D Schottky Diode Device Modeling..................22
3.3 The Simulation result of 2-D Schottky Diode Device..24
3.3.1 I-V Simulation....................................26
3.3.2 C-V Simulation....................................26
4. Simulation Result and Discussion..............................................29
4.1 Comparison of 1-D and 2-D Schottky Diode Device Simulation.............................................29
4.2 1-D Electrode Separation method and Mixed-Mode Simulation.............................................32
4.3 2-D Electrode Separation method and Mixed-Mode Simulation.............................................37
5.Conclusion...........................................41
List of Reference......................................42
參考文獻 References
[1] C.-L. Teng, “An equivalent circuit approach to mixed-level device and circuit Simulation,” M. S. Thesis, Institute of EE, National Central University, Taiwan,
Republic of China, Jun, Chapter 2, pp. 5-10, 1997.
[2] U. V. Bhapkar and R. J. Mattauch, “Numerical Simulation of the Current-Voltage Characteristics of Heteroepitaxial Schottky-Barrier Diode,” IEEE Trans. Electron Devices, vol. 40, pp. 1038-1046, June, 1989.
[3] S. Selberherr, “Analysis and simulation of semiconductor device”, New York: Springer, 1984.
[4] Koorosh Aflatooni, Richard Hornsey, Member, IEEE, and Arokia Nathan, Member , “ IEEE ,Reverse Current Instabilities in Amorphous Silicon Schottky Diodes: Modeling and Experiments,” IEEE Trans. Electron Devices. 46, No. 7, July,1999.
[5] C. C. Chang, S. J. Li, and Y. T. Tsai, “Two-dimensional Mixed-level Device and Circuit Simulation using a simple Band Matrix Solver,” in EDMS 2005, Kaohsiung, Taiwan, 2005.
[6] K. Mararam and D. O. Pederson, “Coupling algorithms for mixed-level circuit and device simulation”, IEEE transactions on computer-aided design, vol. 11, no.8, pp. 1003-1010, 1992.
[7] Y. T. Tsai, and T. C. Ke “Electrode Separation Method to the Boundary Condition for a-Si TFT Mixed-level Simulation.” International Journal of Numerical Modelling: Electronic Networks, Devices, and Fields, vol.11, pp. 123-130, 1998.
[8] K. Mayaram and D. O. Pederson, “CODECS: A Mixed-level Device and Circuit Simulation,” in Proc. IEEE Int. Conf. Computer-aided Design, pp. 813-820, Nov. 1987.
[9] J. W. Lee, “An equivalent circuit approach to mixed-level device and circuit simulation”, M. S. Thesis, Institute of EE, National Central University, Taiwan, Republic of China, Jun. 1997.
[10] T. Grasser and S. Selberherr, “Mixed-mode device simulation, “ Microelectronics Journal, vol. 31, pp. 873-881, 2000.
指導教授 蔡曜聰(Yao-Tsung Tsai) 審核日期 2008-7-5
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