Band 與LILU解法器之整合與2D半導體元件模擬

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姓名

沈永吉(Yung-chi Shen) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

Band 與LILU解法器之整合與2D半導體元件模擬
(Integration of Band solver and LILU solver for 2D semiconductor device simulation)

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摘要(中)

本論文研究主要目的是利用已有的Band 與LILU解法器，開發出可以由Band解法器為主LILU解法器為輔之架構或是由LILU解法器為主Band解法器為輔之架構，是採用連線表格等資料，可以很方便地得到兩種a(k)之轉換，Band解法器是採用交錯矩陣排列，LILU解法器是採用動態排列，矩陣上只儲存非零項，不同於傳統的連續排列方式，外部元件連結上，Band解法器是使用小電阻接線技巧(Small-R Method)，LILU是使用跳躍接線方式。

摘要(英)

The main purpose of this paper is to use the Band and LILU solvers to develop a unified framework for 2D device simulation. This unified framework is developed mainly by Band solver and can be switched to LILU solver or vice versa. The matrix items can be easily transformed between the two different formats for two solvers. The data transform required a connection table to describe the circuit configuration. Band solver uses interleaving method to reduce the matrix bandwidth. LILU solver uses linked data structure, and only non-zero item in the matrix is stored. For 2D device simulation with the external components, the small-resistance method is used for band solver while a jump small-resistance method can be used for LILU solver. The integrated framework allows us to efficiently simulate 2D device by choosing the better solver.

關鍵字(中)

★ 半導體元件模擬

關鍵字(英)

★ Band and LILU solvers
★ 2D device simulation

論文目次

第一章緒論.......................................1
第二章 Band解法器為主LILU解法器為輔之架構..........3
2.1 2D 等效電路模型...........................3
2.2 Band 解法器...............................7
2.3 LILU 解法器..............................12
2.4 由Band解法器為主轉換到 LILU解法器為輔....15
2.5 以BJT來討論二者之間的轉換................19
第三章 LILU解法器為主Band解法器為輔之架構.........22
3.1 由LILU解法器為主轉換到 Band解法器為輔...22
3.2 利用二種方式由LILU解法器轉換成Band解法器
的比較..................................24
3.3 以MOS來討論Band解法器和LILU解法器之間的
轉換....................................27
3.4 LILU解法器與Band解法器的電阻連結........29
第四章二種解法器在2-D半導體元件的探討............31
4.1 以單一MOS放大器應用模擬..................31
4.2 CMOS 電壓轉換特性之模擬..................35
4.3 探討使用2種解法器與心得..................39
第五章結論.......................................40
參考文獻...........................................42

參考文獻

1. C. C. Chang, S. J. Li, and Y. T. Tsai, “Device-partition method using Equivalent Circuit Model in Two-dimensional Device Simulation,” International Journal of Numerical Modelling, Electronic Networks, Devices and Fields, vol. 18, pp. 203- 219, 2005.
2. J. F. Dai, C. C. Chang, J. W. Lee, S. J. Li, and Y. T. Tsai, “Simplified Equivalent-circuit Modeling for Decoupled and Partial decoupled Methods in Semiconductor Device Simulation,“ International Journal of Numerical Modelling, Electronic Networks, Devices and Fields, vol. 17, pp. 421- 432, 2004.
3. S. J. Li, J. F. Dai, C. C. Chang, and Y. T. Tsai, “An equivalent circuit of impact-ionization and it’s applications on semiconductor devices,” in IEDMS 2002, pp. 278-281, 2002.
4. C. C. Chang, J. F. Dai, Y. M. Sun, and Y. T. Tsai, “Levelized Incomplete LU Factorization and its Application to Quasi-static MOSFET C-V Simulation,” Journal of the Chinese Institute of Electrical Engineering, vol. 10, no. 2, pp. 117-123, 2003.
5. C. C. Chang, J. F. Dai, and Y. T. Tsai, “Verification of 1D BJT Numerical Simulation and its Application to Mixed-level Device and Circuit Simulation,” International Journal of Numerical Modelling, Electronic Networks, Devices and Fields, vol. 16, pp. 81- 94, 2003.
6. J. F. Dai, C. C. Chang, S. J. Li, and Y. T. Tsai, “Further Improvements in Equivalent-circuit Model with Levelized Incomplete LU Factorization for Mixed-level Semiconductor Device and Circuit Simulation,“ Solid-state Electronics, vol. 48, pp.1181-1188, 2004.
7. J. F. Dai, C. C. Chang, S. J. Li, and Y. T. Tsai, “A more efficient equivalent-circuit model for levelized incomplete LU factorization in semiconductor device simulation,” in IEDMS 2002, pp. 278-281, 2002.
8. Y. T. Tsai, C. Y. Lee, and M. K. Tsai “Levelized incomplete LU method and its application to semiconductor device simulation,” Solid-state Electronics, Vol. 44, pp. 1069-1075, 2000.
9. Y. T. Tsai, C. F. Dai and M. K. Tsai, “ An Improved Levelized Incomplete LU Method And Its Application to 2D Semiconductor Device Simulation,” Journal of Chinese Institute of Engineers, vol.24, pp.389-396, 2001.
10. C. C. Chang, S. J. Li, and Y. T. Tsai, “An Equivalent-circuit Modeling on Vertical and Horizontal Integrations for MOS Flat-band Voltage Simulation,” International Journal of Numerical Modelling, Electronic Networks, Devices and Fields, vol. 19, pp. 289- 300, 2006.

指導教授

蔡曜聰(Yao-Tsung Tsai)

審核日期

2008-7-4

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