應用於視訊監控具有雜訊去除與標記的前景物件切割超大型積體電路設計

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姓名

彭德彰(De-Zhang Peng) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用於視訊監控具有雜訊去除與標記的前景物件切割超大型積體電路設計
(VLSI Design for Foreground Object Segmentation with Labeling and Noise Reduction Mode in Video Surveillance Application)

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摘要(中)

在電腦視覺應用領域例如：視訊監控系統、人機互動介面以及以物件為基準的視訊壓縮標準(如：MPEG-4)裡，都包含偵測、辨認以及追蹤前景物件的功能需求，並且大部分的應用都需要達到即時前景物件切割的功能。前景物件切割的畫面結果好壞對於後續的應用處理步驟影響很大，因此要如何降低前景物件切割結果的雜訊是很重要的。在視訊監控系統中的追蹤以及辨認前景物件的應用也必須先將畫面中所切割出的前景物件進行標記處理之後，才能進行後續的應用。
本論文針對上述的各種需求，提出了一個即時視訊前景物件切割具有標記以及雜訊去除的超大型積體電路設計，我們所提出的超大型積體電路設計具有高吞吐率的優點，能夠支援很高的解析度(例如：HD720P)達到即時視訊前景物件切割的效果，並且在面積的消耗上又能夠符合低成本的要求。本論文的系統主要分為三個部分，第一部分：基於多模型背景維持演算法之前景物件切割架構，對輸入的視訊影像進行切割；第二部分：型態學運算雜訊去除架構，對視訊影像切割結果進行雜訊消除；第三部分：前景物件標記架構，對雜訊消除完畢的影像進行物件標記。本論文提出的系統是使用標準元件設計流程實現之數位超大型積體電路，在台積電0.18um的製程實現。

摘要(英)

In computer vision applications, such as video surveillance, human-machine interaction and object based video compression standard (e.g., MPEG-4), most applications attempt to detect, recognize events and tracking foreground objects. There also have many real-time applications. The foreground objects segmentation result will do great influence to later process. Therefore how to reduce a foreground objects segmentation result noise effect is very important. In many video surveillance application need to transform image into a symbolic image to do later post-process (e.g., tracking and recognize).
By above-mentioned requisitions, this paper proposed VLSI design for real-time foreground object segmentation with labeling and noise reduction mode. Our proposed VLSI design has high throughput rate that can meet the high resolution specification (e.g., HD720P) with real-time requirement and low cost design. In this paper system consists three parts. First, a foreground objects segmentation architecture design with multi-model background maintenance algorithm is proposed to segment video image. Second, morphological operation noise reduction architecture is proposed to reduce segmentation result noise. Finally, object labeling architecture is proposed to label noiseless image. In this paper proposed systems is implementation by cell-base design flow digital VLSI in TSMC 0.18um.

關鍵字(中)

★ 超大型積體電路設計
★ 視訊切割
★ 視訊監控系統

關鍵字(英)

★ VLSI
★ Video Surveillance Application
★ Video Segmentation

論文目次

摘要 ...I
ABSTRACT ...II
CONTENT...IV
LIST OF FIGURES...VI
LIST OF TABLES...VIII
CHAPTER 1 INTRODUCTION...1
1.1 INTRODUCTION...2
1.2 THESIS ORGANIZATION...5
CHAPTER 2 BACKGROUND AND RELATIVE RESEARCH...6
2.1 RELATIVE RESEARCH OF SEGMENTATION ALGORITHM...7
2.1.1 Nonparametric Approach...8
2.1.2 Parametric Approach...10
2.2 RELATIVE RESEARCH OF SEGMENTATION ARCHITECTURE...12
CHAPTER 3 ...14
PROPOSED MULTI-MODEL BACKGROUND MAINTENANCE ALGORITHM...14
3.1 OVERVIEW OF PROPOSED ALGORITHM...15
3.1.1 Design Strategy...15
3.1.2 Flowchart of Proposed Algorithm...17
3.2 BACKGROUND MAINTENANCE...18
3.2.1 Change Classification ...19
3.2.2 Learning and Updating for Dynamic Change...20
3.2.3 Learning and Updating for Static Point...21
3.3 FOREGROUND EXTRACTION...23
CHAPTER 4 ...24
PROPOSED FOREGROUND OBJECTS SEGMENTATION SYSTEMS...24
4.1 OVERVIEW OF PROPOSED SYSTEMS...25
4.2 VIDEO SEGMENTATION ARCHITECTURE...25
4.2.1 Temporal Difference...27
4.2.2 Multi-model Match...27
4.2.3 Static and Dynamic Background Update...27
4.2.4 Background Model Estimation and Foreground Extraction...32
4.2 NOISE REDUCTION ARCHITECTURE...34
4.3.1 Shift Array Registers...37
4.3.2 Dilation and Erosion Filter...38
4.3 OBJECT LABELING ARCHITECTURE...40
4.4.1 Shift Array Registers...45
4.4.2 Label Assignment...47
4.4.3 Set Flag Registers...52
4.4.4 Combination compare...56
CHAPTER 5 ...60
IMPLEMENTATIONS AND RESULTS ...60
5.1 PROPOSED MULTI-MODEL BACKGROUND MAINTENANCE ALGORITHM QUANTITATIVE EVALUATION AND COMPARISON RESULT...61
5.2 OVERALL FOREGROUND OBJECTS SEGMENTATION SYSTEMS RESULT...63
CHAPTER 6 ...71
CONCLUSION...71
REFERENCE...74

參考文獻

[1] T.-H. Tsai, W.-T. Sheu, and C.-Y. Lin, “Foreground object detection based on multi-model background maintenance,” IEEE Int. Symposium on Multimedia, 2007.
[2] J. Detrey and F. de Dinechin,“A parameterized floating-point exponential function for FPGAs,” In IEEE
International Conference on Field-Programmable Technology (FPT’05). IEEE Computer Society Press, Dec. 2005.
[3] J. Detrey F. de Dinechin X. Pujol “Return of the hardware floating-point elementary function,”18th IEEE
Symposium on Computer Arithmetic(ARTH’07), June 2007,pp. 161-168
[4] L. Li and M. Leung, “Integrating intensity and texture differences for robust change detection,” IEEE Trans. Image Processing, vol. 11, Feb. 2002, pp. 105–112.
[5] A. Elgammal, D. Harwood, and L. Davis, “Background and Foreground Modeling Using Nonparametric Kernel
Density Estimation for Visual Surveillance,” Proc. IEEE, 2002.
[6] K. Kim, T.H. Chalidabhongse, D. Harwood, and L. Davis, “Background Modeling and Subtraction by
Codebook Construction,” Proc. IEEE Int’l Conf. Image Processing, vol. 5, 2004, pp. 3061-3064.
[7] Y. Sheikh and M. Shah. Bayesian object detection in dynamic scenes. IEEE Conf. Computer Vision and Pattern Recognition, San Diego, CA, June 2005.
[8] R. Cucchiara, C. Grana, M. Piccardi, and A. Prati, “Detecting moving objects, ghosts, and shadows in video
streams,” IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 25, no. 10, pp. 1337-1342,2003.
[9] B. Shoushtarian and H. E. Bez, “A practical adaptive approach for dynamic background subtraction using an invariant colour model and object tracking,” Pattern Recognition Letters, vol. 26, no. 1, pp. 5-26, 2005.
[10] C. Wren, A. Azarbaygaui, T. Darrell, and A. Pentland, “Pfinder: realtime tracking of the human body,” IEEE
Trans. Pattern Anal. Machine Intell., vol. 19, July 1997, pp. 780–785.
[11] D. Koller, J. Weber, T. Huang, J. Malik, G. Ogasawara, B. Rao, and S. Russel, “Toward robust automatic traffic scene analysis in real-time,” in Proc. Int. Conf. Pattern Recognition, 1994, pp. 126–131.
[12] K.-P. Karmann, A. Brandt, and R. Gerl, “Using Adaptive Tracking to classify and Monitor Activities in a site,”Time Varying Image Processing and Moving Object Recognition, 1990.
[13] N. Friedman and S. Russell, “Image segmentation in video sequences: a probabilistic approach,” in Proc. 13th Conf.Uncertainty Artificial Intelligence, 1997.
[14] C. Stauffer and W.E.L. Grimson, “Adaptive Background Mixture Models for Real-Time Tracking,” Proc. IEEE CS Conf. Computer Vision and Pattern Recognition, vol. 2, 1999, pp. 246-252.
[15] I. Haritaoglu, D. Harwood, and L. S. Davis, “Real-time surveillance of people and their activities,” IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 22, no. 8, pp. 809-830, 2000.
[16] P. KaewTraKulPong and R. Bowden, “An Improved Adaptive Background Mixture Model for Real-Time Tracking
with Shadow Detection,” Proc. European Workshop Advanced Video Based Surveillance Systems, 2001.
[17] Z. Zivkovic, “Improved Adaptive Gaussian Mixture Model for Background Subtraction,” Proc. Int’l Conf. Pattern Recognition, vol. 2, 2004, pp. 28-31.
[18] Q. Zang and R. Klette, “Robust Background Subtraction and Maintenance,” Proc. Int’l Conf. Pattern Recognition,vol. 2, 2004, pp. 90-93.
[19] Dar-Shyang Lee, “Effective Gaussian mixture learning for video background subtraction” IEEE Trans. Pattern analysis and machine intelligence, vol.27, no.5, MAY 2005, pp. 827-832.
[20] Morimoto, T.; Adachi, H.; Yamaoka, K.; Awane, K.; Koide, T.; Mattausch, H.J.; “An FPGA-Based Region-Growing
Video Segmentation System with Boundary-Scan-Only LSI Architecture” , Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on 4-7 Dec. 2006 Pag(s):944 – 947
[21] Jinsang Kim; Chen, T.;” A VLSI architecture for image sequence segmentation using edge fusion” , Computer
Architectures for Machine Perception, 2000. Proceedings. Fifth IEEE International Workshop on , 11-13 Sept.2000 Page(s):57 – 66
[22] Jinsang Kim; Chen, T.; “A VLSI architecture for video-object segmentation” , Circuits and Systems for Video Technology, IEEE Transactions on Volume 13, Issue 1, Jan. 2003 Page(s):83 - 96 ,
[23] S.-Y. Chien, et al, “Single chip video segmentation system with a programmable PE array,” IEEE Asia-Pacific
Conference., pp. 233-236, Aug. 2002.
[24] Ierodiaconou, S.P.; Dahnoun, N.; Xu, L.Q.“Implementation and Optimisation of a Video Object Segmentation Algorithm on an Embedded DSP Platform” , Crime and Security, 2006. The Institution of Engineering and Technology Conference on 13-14 June 2006 Page(s):432 – 437.
[25] F. Meyer and S. Beucher, “Morphological segmentation,” J. Visual Commun. Image Representation, vol. 1, pp. 21–46,Sept. 1990.
[26] Luc Vincent,”Morphological Grayscale Reconstruction in Image Analysis: Application and Efficient Algorithms.”
IEEE Transactions on Image Processing, vol. 2, no. 2, April 1993.
[27] R. M. Haralick, “Some neighborhood operations,” in Real Time/Parallel Computing Image Analysis, M. Onoe, K.
Preston, and A. Rosenfled, eds., New York: Plenum Press, pp. 11-35, 1981.
[28] C. J. Nicol, “A systolic approach for real time connected component labeling,” Computer Vision and Image
Understanding, Vol. 61, pp. 17-31, 1995.
[29] A. Rosenfeld and J. L. Pfaltz, “Sequential operation in digital picture processing,” Journal of Association for Computing Machinery, Vol.13, pp. 471-494, 1966.
[30] R. Lumia, L. Shaprio, and O. Zuniga, “A new connected components algorithm for virtual memory computers,”Computer Vision, Graphics and Image Processing, Vol. 22, pp. 287-300, 1983.
[31] Kuang-Bor Wang, Tsorng-Lin Chia, Zen Chen and Der-Chyuan Lou, “Parallel Execution of a Connected Component
Labeling Operation on a Linear Array Architechture,” Journal of Information Science and Engineering 19, pp. 353-370, 2003.
[32] N. Ranganathan, R. Mehrotra, and S. Subramanian, “A high speed systolic architecture for labeling connected components in an image,” IEEE Transactions on System, Man and Cybernetics, Vol. 25, pp. 415-423, 1995.
[33] Rasquinha, A.; Ranganathan, N.; “C3L: a chip for connected component labeling,” VLSI Design, 1997. Proceedings.,Tenth International Conference on 4-7 Jan. 1997 Page(s):446 - 450
[34] Shyue-Wen Yang; Ming-Hwa Sheu; Hsien-Huang Wu; Hung-En Chien; Ping-Kuo Weng; Ying-Yih Wu; “VLSI architecture design for a fast parallel label assignment in binary image,” Circuits and Systems, 2005. ISCAS 2005.IEEE International Symposium on 23-26 May 2005 Page(s):2393 - 2396 Vol. 3

指導教授

蔡宗漢(Tsung-Han Tsai)

審核日期

2009-7-20

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