以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：5

、訪客IP：3.145.88.130

姓名	陳英豪(Inn-hao Chen)  查詢紙本館藏	畢業系所	電機工程學系
論文名稱	鍺量子點單電洞電晶體之自我對準最佳化工程及奈米溫度計量技術 (Self-Aligned Ge Quantum-Dot Single-Hole Transistors for Nano-Thermometry Application)
相關論文	★ 高效能矽鍺互補型電晶體之研製 ★ 高速低功率P型矽鍺金氧半電晶體之研究 ★ 應變型矽鍺通道金氧半電晶體之研製 ★ 金屬矽化物薄膜與矽/矽鍺界面反應 之研究 ★ 矽鍺異質源/汲極結構與pn二極體之研製 ★ 矽鍺/矽異質接面動態啓始電壓金氧半電晶體之研製 ★ 應用於單電子電晶體之矽/鍺量子點研製 ★ 矽鍺/矽異質接面動態臨界電壓電晶體及矽鍺源/汲極結構之研製 ★ 選擇性氧化複晶矽鍺形成鍺量子點的光特性與光二極體研製 ★ 選擇性氧化複晶矽鍺形成鍺量子點及其在金氧半浮點電容之應用 ★ 量子點的電子能階 ★ 鍺量子點共振穿隧二極體與電晶體之關鍵製程模組開發與元件特性 ★ 自對準矽奈米線金氧半場效電晶體之研製 ★ 鍺浮點記憶體之研製 ★ 利用選擇性氧化單晶矽鍺形成鍺量子點之物性及電性分析 ★ 應用於數位電視頻帶之平衡不平衡轉換器設計
檔案	[Endnote RIS 格式]    [Bibtex 格式]    [相關文章]   [文章引用]   [完整記錄]   [館藏目錄]   [檢視]  [下載] 本電子論文使用權限為同意立即開放。 已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。 請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。
摘要(中)	本論文主題在於製作以及研究單電子電晶體及其相關之應用。首先，我們使用矽鍺圖案相依性的氧化行為以及氣相化學沉積(CVD)沉積薄膜的穩定性已經成功展示以一個有組織性的方式精準地在電極間放置單一顆鍺量子點並且以對稱的二氧化矽/氮化矽複合式之穿隧介電層相隔。為了能更有效率地以選擇性氧化被定義圖案的矽鍺結構之方式來實現一顆鍺量子點單電子電晶體，以電子束微影定義圖案和以蝕刻整修溝渠形貌此兩項技術必須被最佳化設計。利用上述的技術，我們研發出一個擁有11奈米大小鍺量子點的單電洞電晶體。在溫度為凱氏溫度77度到150度的區間，此單電洞電晶體在閘極與汲極偏壓的調變下展示了沒有背景雜訊的庫侖振盪以及有著明顯節點的菱形圖。此結果意味著單電洞電晶體提供了一種方式，能透過載子穿隧量子點分裂能階的頻譜來解析量子點內部電子能階。 另一方面，基於鍺量子點單電洞電晶體在少數電洞的狀況下微分轉導(GD)突出的溫度相依性，鍺量子點溫度量計已經被展示出。微分轉導所形成的波谷萃取出的半高寬(V1/2)與量子點內的電子數(n)以及溫度(T)呈現一個線性的關係，此關係為eV1/2  (1-0.11n)5.15kBT，此關係式提供了檢測溫度的一個基準量。另外，微分轉導所形成的波谷萃取出的深度與量子點充電位能及溫度的倒數成一個比例關係，此關係式為GD  EC/9.18kBT，提供了檢測溫度的另一個基準量。這些實驗上的結果以表示我們所研製的單電洞電晶體確實是能作為一個奈米溫度量計，去偵測出量子點中的溫度變化。而且擁有10奈米大小鍺量子點的單電洞電晶體所能偵測到的最高溫度為凱氏溫度155度。並且偵測溫度的精準度能達到千分之一度以下。
摘要(英)	In this thesis, fabrication and characterization of germanium (Ge) quantum-dot (QD) single-electron transistors (SETs) as well as the associated applications were investigated. Using the fidelity of spacer-layer deposition and nanopattern-dependent oxidation of SiGe we have demonstrated the precise placement of a single Ge QD between nanoelectordes through symmetrical tunneling barriers of Si3N4/SiO2 in self-organized approach. In order to effectively realize a Ge-QD SET using selectively oxidizing SiGe patterned structure, the lithographical patterning and etching profile of the nanostructure are to be optimally designed. The fabricated 11-nm Ge-QD SHT exhibits clear Coulomb oscillation and Coulomb diamond features under gate and drain modulation from T = 77 K to 150 K, providing a way to resolve the electronic structure of the QD through tunneling spectroscopy. On the other hand, Ge-QD thermometry has demonstrated based on extraordinary temperature-dependent oscillatory differential conductance (GD) characteristics of Ge-QD SHTs in the few-hole regime. Full-voltage width-at-half-minimum, V1/2, of GD valleys appears to be fairly linear in the charge number (n) within the QD and temperature in a relationship of eV1/2  (1-0.11n)5.15kBT, providing the primary thermometric quantity. The depth of GD valley is proportional to charging energy (EC) and 1/T via GD  EC/9.18kBT, providing another thermometric quantity.The experimental results reveal that our Ge-QD SHT truly paves an affirmatory path for nanothermometry to measure temperature in the local QD with detection temperature as high as 155 K with temperature accuracy of sub-millikelvin in a spatial resolution on the order of the QD size (~10 nm).
關鍵字(中)	★ 單電子電晶體 ★ 單電洞電晶體 ★ 鍺量子點	關鍵字(英)	★ single electron transistor ★ single hole transistor ★ Ge quantum dot
論文目次	Table of Contents 摘要……………………………………………………………………………….i Abstract………………………………………………………………………….ii Table of Contents………………………………………………………………iii List of Figures…………………………………………………………………..vi List of Tables………………………………………………………………......xiii Chapter 1 Introduction and Background Review…………………………….1 1-1 Introduction…………………………………………………………1 1-2 Evolution of Single-Electron Transistor…………………………...2 1-3 Dissertation Organization………………………………………...11 Chapter 2 Operation Principle and Challenge for Single-Electron Transistors……………………………………………………………………...13 2-1 Introduction………………………………………………………..13 2-2 Ideal Single-Electron Transistors………………………………...13 2-2-1 Output characteristics (Vds manipulation at a given Vg)…..15 2-2-2 Transfer characteristics (Gate manipulation at a given Vds)……………………………………………………………….16 2-2-3 Three-dimensional I-V characteristics or contour plot (Id or Gd with respect to Vds and Vg)………………………………...18 2-3 Real Single-Electron Transistors…………………………………23 2-3-1 Finite tunneling barrier………………………………………23 2-3-2 Heavily-doped semiconductors as the material of electrodes… ………….……….……………………………………………...24 2-3-3 Asymmetrical tunnel barrier………………………………26 2-3-4 kBT ≦E or U………………………………………………..27 2-3-5 Gate-induced tunneling barrier lowering…………………...28 2-4 Summary…………………………………………………………...29 Chapter 3 Key-Modules and Process Integration of Germanium Quantum-Dot Single-Hole Transistors……………………………………….30 3-1 Introduction………………………………………………………..30 3-2 Key-modules on single-hole transistors………………………….31 3-2-1 Electron-beam patterning……………………………………31 3-2-1-1 Electron transport……………………………..………..32 3-2-1-2 EBL resists………………………………………………34 3-2-1-3 Resist Development……………………………………..35 3-2-1-4 Process parameters……………………………………..36 3-2-1-5 Exposure voltage effect…………………………………37 3-2-1-6 Process Windows with Resists………………………….38 3-2-2 Electron beam alignment………………………………….43 3-2-3 Trench etching…………………………………………….45 3-2-4 Self-aligned gate electrode by SiO2/Si3N4 spacers…………48 3-3 Ge QD SHT fabrication…………………………………………...52 3-4 Summary…………………………………………………………..55 Chapter 4 Ge-QD SHTs with self-aligned NiSi electrodes in Few-Hole regimes………………………………………………………………………….57 4-1 Introduction………………………………………………………..57 4-2 Setup on the SHT measurement………………………………….57 4-3 Transient characteristics………………………………………….59 4-4 Output characteristics…………………………………………….60 4-5 Three-dimensional I-V characteristics and contour plot……….65 4-6 Summary…………………………………………………………..68 Chapter 5 Ge-QD Coulomb-blockade Thermometry……………………….69 5-1 Introduction and background review…………………………….69 5-2 Electrical characteristics of the Ge QD SHT…………………….72 5-3 Temperature-dependences of FWHM and amplitude for normalized GD valleys……………………………………………..75 5-4 Conclusion…………………………………………………………79 Chapter 6 Future work and outlook…………………………………………81 6-1 Conclusion and Future work……………………………………..81 6-2 Future outlook……………………………………………………..81 Reference……………………………………………………………………….85 Publication list…...…………………………………………………………….94 Appendix: Electron-beam lithography…………………………..………….97 A. Grating……………………………………………………………..97 B. Nano-pillar matrix………………………………………………...98 C. Nano-hole matrix……...…………………………………………...99
參考文獻	[1] G. E. Moore, “Cramming more components onto integrated circuits,” Electron. Mag., 38, 114 (1965). [2] C. Hu, “SOI (Silicon-On-Insulator) for high speed ultra large scale integration,” Jpn. J. Appl. Phys., 33, 365 (1994) [3] M. Terauchi, A. Yoshimi, Murakoshi, and Y. Ushiku, “Suppression of the floating-body effects in SOI MOSFETs by bandgap engineering,” in VLSI Sym. Dig. Tech. papers, 35 (1995). [4] Y. K. Choi, K. Asano, N. Lindert, V. Subramanian, T. J. King, J. Bokor, and C. Hu, “Ultrathin body SOI MOSFET for deep-sub-tenth micron era,” 1999 IEDM Tech. Dig. IEEE, 919 (1999). [5] B. S. Doyle, S. Datta, M. Doczy, S. Hareland, B. Jin, J. Kavalieros, T. Linton, A. Murthy, R. Rios, and R. Chau, “High performance fully-depleted tri-gate CMOS transistors,” IEEE Elec. Dev. Lett., 24, 263 (2003). [6] J. Xiang, W. Lu, Y. Hu, Y. Wu, H. Yan, and C. M. Lieber, “Ge/Si nanowire heterostructures as high-performance field-effect transistors,” Nature, 441, 489, (2006). [7] N. Singh, K. D. Buddharaju, S. K. Manhas; A. Agarwal; S. C. Rustagi; G. Q. Lo, N. Balasubramanian, and D. L. Kwong, “Si, SiGe nanowire devices by top–down technology and their applications,” IEEE Trans. Elec. Dev., 55, 3107 (2008). [8] J. P. Colinge, “Quantum-wire effects in trigate SOI MOSFETs,” Solid-St. Electron., 51, 1153 (2007). [9] A. Hartstein, “Quantum interference in ultrashort channel length silicon metal-oxide-semiconductor field-effect transistors,” Appl. Phys. Lett., 59, 2028 (1991). [10] Y. Omura, K. Kurihara, Y. Takahashi, T. Ishiyama, Y. Nakajima, and K. Izumi, “50-nm channel nMOSFET/SIMOX with an ultrathin 2- or 6-nm thick silicon layer and their significant features of operations,” IEEE Elec. Dev. Lett., 18, 190 (1997). [11] G. Wirth, U. Hilleringmann, J. T. Horstmann, and K. Goser, “Mesoscopic transport phenomena in ultrashort channel MOSFETs,” Solid-St. Electron., 43, 1245 (1999). [12] H. Ueno, M. Tanaka, K. Morikawa, T. Takahashi, M. Miura-Mattausch, and Y. Omura, “Origin of transconductance oscillations in silicon-on-insulator metal–oxide–semiconductor field-effect transistors with an ultrathin 6-nm-thick active Si layer,” J. Appl. Phys., 91, 5360 (2002). [13] A. T. Tilke, F. C. Simmel, H. Lorenz, R. H. Blick, and J. P. Kotthaus, “Quantum interference in a one-dimensional silicon nanowire,” Phys. Rev. B, 68, 075311 (2003). [14] F. Boeuf, X. Jehl, M. Sanquer, and T. Skotnicki, “Controlled single-electron effects in nonoverlapped ultra-short silicon field effect transistors,” IEEE Trans. Nanotech., 2, 144 (2003). [15] J. P. Colinge, A. J. Quinn, L. Floyd, G. Redmond, J. C. Alderman, W. Xiong, C. R. Cleavelin, T. Schulz, K. Schruefer, G. Knoblinger, and P. Patruno, “Low-temperature electron mobility in trigate SOI MOSFETs,” IEEE Elec. Dev. Lett., 27, 120 (2006). [16] J. P. Colinge, W. Xiong, C. R. Cleavelin, T. Schulz, K. Schrüfer, K. Matthews, and P. Patruno, “Room-temperature low-dimensional effects in pi-gate SOI MOSFETs,” IEEE Elec. Dev. Lett., 27, 775 (2006). [17] S. C. Rustagi, N. Singh, Y. F. Lim, G. Zhang, S. Wang, G. Q. Lo, N. Balasubramanian, and D. –L, Kwong, “Low-temperature transport characteristics and quantum-confinement effects in gate-all-around Si-nanowire N-MOSFET,” IEEE Elec. Dev. Lett., 28, 909 (2007). [18] D. V. Averin and K. K. Likharev, “Coulomb blockade of single-electron tunneling, and coherent oscillations in small tunnel junctions,” J. Low Temp. Phys., 62, 345 (1986). [19] T. A. Fulton and G. J. Dolan, “Observation of single-electron charging effects in small tunnel junctions,” Phys. Rev. Lett., 59, 109 (1987). [20] M. Saitoh, H. Harata, and T. Hiramoto, “Room-temperature demonstration of integrated silicon single-electron transistor circuits for current switching and analog pattern matching,” 2004 IEDM Tech. Dig. IEEE, 187 (2004). [21] L. Zhuang, L. Guo, and S. Y. Chou, “Silicon single-electron quantum-dot transistor switch operating at room temperature,” Appl. Phys. Lett., 72, 1205 (1998). [22] K. S. Park, S. J. Kim, I. B. Baek, W. H. Lee, J. S. Kang, Y. B. Jo, S. D. Lee, C. K. Lee, J. B. Choi, J. H. Kim, K. H. Park, W. J. Cho, M. G. Jang, and S. J. Lee, “SOI single-electron transistor with low RC delay for logic cells and SET/FET hybrid ICs,” IEEE Trans. Nanotech., 4, 242 (2005). [23] D. G. Austing, T. Honda, Y. Tokura, and S. Tarucha, “Sub-micron vertical AlGaAs/GaAs resonant tunneling single electron transistor,” Jpn. J. Appl. Phys., 34, 1320 (1995). [24] Y. Ono, Y. Takahashi, K.Yamazaki, M. Nagase, H. Namatsu, K. Kurihara, and K. Murase, “Fabrication method for IC-oriented Si twin-island single-electron transistors,” 1998 IEDM Tech. Dig. IEEE, 98 (1998). [25] S. J. Angus, A. J. Ferguson, A. S. Dzurak, and R. G. Clark, “Gate-defined quantum dots in intrinsic silicon,” Nano Latt., 7, 7 (2007). [26] S. J. Shin, C. S. Jung, B. J. Park, T. K. Yoon, J. J. Lee, S. J. Kim, J. B. Choi, Y. Takahashi, and D. G. Hasko, “Si-based ultrasmall multiswitching single-electron transistor operating at room-temperature,” Appl. Phys. Lett., 97, 103101, (2010). [27] P. W. Li, W. M. Liao, David M. T. Kuo, S. W. Lin, P. S. Chen, S. C. Lu, and M. J. Tsai, “Fabrication of a germanium quantum-dot single electron transistor with large Coulomb-blockade oscillations at room temperatures,” Appl. Phys. Lett., 85, 1532 (2004). [28] W. M. Liao, P. W. Li, David M. T. Kuo and W. T. Lai, “Room-temperature transient carrier transports in germanium single-electron/-hole transistors,” Appl. Phys. Lett., 88, 182109 (2006). [29] G. L. Chen, David. M. T. Kuo, W. T. Lai and P. W. Li, “Tunneling spectroscopy of a germanium quantum dot in single-hole transistors with self-aligned electrodes,” Nanotechnology, 18, 475402 (2007). [30] K. H. Chen, C. Y. Chien, and P. W. Li, “Precise Ge quantum dot placement for quantum tunneling devices,” Nanotechnology, 21, 5, 055302 (2010). [31] K. H. Chen, C. Y. Chien, W. T. Lai, T. George, A. Scherer, and P. W. Li, “Controlled heterogeneous nucleation and growth of germanium quantum dots on nanopatterned silicon dioxide and silicon nitride substrates,” Cryst. Growth Design, 11, 7, 3222 (2011). [32] Y. Maeda, N. Tsukamoto, Y. Yazawa, Y. Kanemitsu, and Y. Masumoto, “Visible photoluminescence of Ge microcrystals embedded in SiO2 glassy matrices,” Appl. Phys. Lett., 59, 24, 3168 (1991). [33] H. Ishikuro and T. Hiramoto, “Quantum mechanical effects in the silicon quantum dot in a single-electron transistor,” Appl. Phys. Lett., 71, 3691 (1997). [34] J. Weis, R. J. Haug, K. v. Klitzing, and K. Ploog, “Transport spectroscopy of a confined electron system under a gate tip,” Phys. Rev. B, 46, 12837 (1992). [35] E. L. Murphy and R. H. Good, “Thermionic emission, field emission, and transition region,” Phys. Rev., 102, 6, 1464 (1956). [36] K. W. Chan, M. Mottonen, A. Kemppinen, N. S. Kai, K. Y. Tan, W. H. Lim, and A. S. Dzurak, ‘Single electron shuttle based on a silicon quantum dot,” Appl. Phys. Lett., 98, 21, 212103 (2011). [37] David M. T. Kuo and Y. C. Chang, “Tunneling current spectroscopy of a nanostructure junction involving multiple energy levels,” Phys. Rev. Lett., 99, 086803 (2007). [38] L. Jdira, P. Liljeroth, E. Stoffels, D. Vanmaekelbergh, and S. Speller, “Size-dependent single-particle energy levels and interparticle Coulomb interactions in CdSe quantum dots measured by scanning tunneling spectroscopy,” Phys. Rev. B, 73, 115305 (2006). [39] H. Grabert and M. H. Devoret, Single Charge Tunneling—Coulomb Blockade Phenomena in Nanostructures, New York: Plenum (1992). [40] M. Saitoh, H. Harata, and T. Hiramoto, “Room-temperature demonstration of integrated silicon single-electron transistor circuit for current switching and analog pattern matching,” in IEDM Tech. Dig., 2004, pp. 187–190. [41] K. Yano, T. Ishii, T. Sano, T. Mine, F. Murai, T. Hashimoto, T. Kobayashi, T. Kure, and K. Seki, “Single-electron memory for giga-to-tera bit storage,” Proc. IEEE, 87, 4, 633 (1999). [42] K. Nishiguchi, A. Fujiwara, Y. Ono, H. Inokawa, and Y. Takahashi, “Room temperature single-electron transfer and detection with silicon nanodevices,” 2004 IEDM Tech. Dig. IEEE, 199 (2004). [43] T. Fujisawa, R. Tomita, T. Hayashi, and Y. Hirayama, “Bidirectional counting of single electrons,” Science, 312, 5780, 1634 (2006). [44] A. Fujiwara, K. Nishiguchi, and Y. Ono, “Nanoampere charge pump by single-electron ratchet using silicon nanowire metal-oxide-semiconductor field-effect transistor,” Appl. Phys. Lett, 92, 4, 042102 (2008). [45] S. J. Shin, J. J. Lee, H. J. Kang, J. B. Choi, S.-R. Eric Yang, Y. Takahashi, and D. G. Hasko, “Room-temperature charge stability modulated by quantum effects in a nanoscale silicon island,” Nano Lett., 11, 4, 1591 (2011). [46] Y. Kimura, K. Itoh, R. Yamaguchi, K. Ishibashi, K. Itaya, andM. Niwano, “Room-temperature observation of a Coulomb blockade phenomenon in aluminum nanodots fabricated by an electrochemical process,” Appl. Phys. Lett., 90, 9, 093119 (2007). [47] V. Ray, R. Subramanian, P. Bhadrachalam, L. C. Ma, C. U. Kim, and S. J. Koh, “CMOS-compatible fabrication of room-temperature singleelectron devices,” Nat. Nanotechnol., 3, 10, 603 (2008). [48] N. M. Zimmerman,W. H. Huber, B. Simonds, E. Hourdakis, A. Fujiwara, Y. Ono, Y. Takahashi, H. Inokawa, N. Furlan, and M. W. Keller, “Why the long-term charge offset drift in Si single-electron tunneling transistors is much smaller (better) than in metal-based ones: Two-level fluctuator stability,” J. Appl. Phys., 104, 3, 33710 (2008). [49] Y. T. Tan, T. Y. T. Tan, T. Kamiya, Z. A. K. Durrani, and H. Ahmed, “Room temperature nanocrystalline silicon single-electron transistors,” J. Appl. Phys., 94, 1, 633 (2003). [50] S. Lee, K. Miyaji, M. Kobayashi, and T. Hiramoto, “Extremely high flexibilities of Coulomb blockade and negative differential conductance oscillations in room-temperature-operating silicon single hole transistor,” Appl. Phys. Lett., 92, 7, 073502 (2008). [51] M. Stepanova and S. Dew, Nanofabrication techniques and principles: SpringerWienNewYork (2012). [52] J. Goldstein, D. E. Newbury, D.C. Joy, C.E. Lyman, P. Echlin, E. Lifshin, L. Sawyer, and J. R. Michael, Scanning electron microscopy and X-ray microanalysis: Springer (2003). [53] Y. H. Lee, R. Browing, N. Maluf, G. Owen, R. F.W. Pease, “Low voltage alternative for electron beam lithography,” J. Vac. Sci. Technol. B, 10, 3094 (1992). [54] H. Yang, L. Fan, A. Jin, Q. Luo, C. Gu, Z. Cui, “Low-energy electron-beam lithography of ZEP-520 positive resist,” Nano/Micro Engineered and Molecular Systems, NEMS ′06. 1st IEEE International Conference on, 391 (2006). [55] D. F. Kyser and N. S. Viswanathan, “Monte Carlo simulation of spatially distributed beams in electron‐beam lithography,” J. Vac. Sci. Technol., 12, 1305 (1975). [56] G. Brewer, Electron-Beam Technology in Microelectronic Fabrication: Academic (1980). [57] M. Kamp, M. Emmerling, S. Kuhn, and A. Forchel, “Nanolithography using a 100 kV electron beam lithography system with a Schottky emitter,” J. Vac. Sci. Technol. B, 17, 86 (1999). [58] T. H. P. Chang, “Proximity effect in electron‐beam lithography,” J. Vac. Sci. Technol., 12, 1271 (1975). [59] C. W. Lo, M. J. Rooks, W. K. Lo, M. Isaacson, and H. G. Craighead, “Resists and processes for 1 kV electron beam microcolumn lithography,” J. Vac. Sci. Technol. B, 13, 812 (1995). [60] L. K. Mun, D. Drouin, E. Lavallée, and J. Beauvais, “The impact of charging on low-energy electron beam lithography,” Microsc. Microanal., 10, 804 (2004). [61] M. A. McCord, M. Rooks, Electron beam lithography: Rai-Choudury; Handbook of microlithography, micromachining and microfabrication, vol. 1: SPIE (1997). [62] B. Wu and A.R. Neureuther, “Energy deposition and transfer in electron-beam lithography,” J. Vac. Sci. Technol. B, 19, 2508 (2001). [63] M. Hatzakis, “Electron resists for microcircuit and mask production,” J. Electrochem. Soc., 116, 1033 (1969). [64] L. Masaro and X. X. Zhu, “Physical models of diffusion for polymer solutions, gels and solids,” Prog. Polym. Sci., 24, 731 (1999). [65] B. A. Miller-Chou and J. L. Koenig, “A review of polymer dissolution,” Prog. Polym. Sci., 28, 1223 (2003). [66] M. A. Mohammad, T. Fito, J. Chen, M. Aktary, M. Stepanova, and S. K. Dew, “Interdependence of optimum exposure dose regimes and the kinetics of resist dissolution for electron beam nanolithography of polymethylmethacrylate,” J. Vac. Sci. Technol. B, 28, L1 (2010). [67] T. Tanaka, M. Morigami, and N. Atoda, “Mechanism of resist pattern collapse during development process,” Jpn. J. Appl. Phys., 32, 6059 (1993). [68] K. L. Lee, J. Bucchignano, J. Gelorme, and R. Viswanathan, “Ultrasonic and dip resist development processes for 50 nm device fabrication,” J. Vac. Sci. Technol. B, 15, 2621 (1997). [69] S. Yasin, D. G. Hasko, and H. Ahmed, ”Comparison of sensitivity and exposure latitude for polymethylmethacrylate, UVIII, and calixarene using conventional dip and ultrasonically assisted development,” J. Vac. Sci. Technol. B, 17, 3390 (1999). [70] D. Kupper, D. Kupper, T. Wahlbrink, J. Bolten, M. Lemme, Y. Georgi, and H. Kurz, “Megasonic-assisted development of nanostructures,” J. Vac. Sci. Technol. B, 24, 1827 (2006). [71] H. Namatsu, K. Yamazaki,and K. Kurihara, “Supercritical resist dryer,” J. Vac. Sci. Technol. B, 18, 780 (2000). [72] D. L. Goldfarb, J. J. de Pablo, P. F. Nealey, J. P. Simons, W. M. Moreau, and M. Angelopoulos, “Aqueous-based photoresist drying using supercritical carbon dioxide to prevent pattern collapse,” J. Vac. Sci. Technol. B, 18, 3313 (2000). [73] T. Wahlbrink, D. Küpper, Y. M. Georgiev, J. Bolten, M. Möller, D. Küpper, M. C. Lemme, and H. Kurz, “Supercritical drying process for high aspect-ratio HSQ nano-structures,” Microelectron Eng., 83, 1124 (2006). [74] M. Aktary, M. Stepanova, and S. K. Dew, “Simulation of the spatial distribution and molecular weight of polymethylmethacrylate fragments in electron beam lithography exposures,” J. Vac. Sci. Technol. B, 24, 768 (2006). [75] K. D. Schock, F. E. Prins, S. Strähle, and D. P. Kern, “Resist processes for low-energy electron-beam lithography,” J. Vac. Sci. Technol. B, 15, 2323 (1997). [76] W. Bru¨nger, E.-B. Kley, B. Schnabel, I. Stolberg, M. Zierbock, and R. Plontke, “Low energy lithography; energy control and variable energy exposure,” Microelectron Eng., 27, 135 (1995). [77] C. Y. Chien, Y. J. Chang, K. H. Chen, W. T. Lai, T. George, A. Scherer, and P. W. Li, “Nanoscale, catalytically enhanced local oxidation of silicon containing layers by ‘burrowing’ Ge quantum dots,” Nanotechnology, 22, 43, 435602 (2011). [78] J. E. Chang, P. H. Liao, C. Y. Chien, J. C. Hsu, M. T. Hung, S. W. Lee, W. Y. Chen, T. M. Hsu, T. George, and P. W. Li, “Matrix and quantum confinement effects on optical and thermal properties of Ge quantum dots,” J. Phys. D, Appl. Phys., 45, 10, 105303 (2012). [79] A. Savitzky Marcel and J. E. Golay, “Smoothing and differentiation of data by simplified least squares procedures,” Anal. Chem., 36, 8, 1627 (1964). [80] K. Miyaji and T. Hiramoto, “Control of full-width at half-maximum of Coulomb oscillation in silicon single-hole transistors at room temperature,” Appl. Phys. Lett., 91, 5, 053509 (2007). [81] W. H. Lim, F. A. Zwanenburg, H. Huebl, M. Mottonen, K. W. Chan, A. Morello, and A. S. Dzurak, “Observation of the single-electron regime in a highly tunable silicon quantum dot,” Appl. Phys. Lett., 95, 24, 242102 (2009). [82] S. Tarucha, D. G. Austing, and T. Honda, “Shell filling and spin effects in a few electron quantum dot,” Phys. Rev. Lett., 77, 17, 3613 (1996). [83] R. C. Ashoori, H. L. Stormer, J. S. Weiner, L. N. Pfeiffer, K. W. Baldwin, and K. W. West, “N-electron ground state energies of a quantum dot in magnetic field,” Phys. Rev. Lett., 71, 4, 613 (1993). [84] D. K. Ferry, Transport in Nanostructures: Cambridge Univ. Press (1996). [85] S. Sze, Physics of Semiconductor Devices: Wiley (1981). [86] U. Meirav and E. B. Foxman, “Single-electron phenomena in semiconductors,” Semicond. Sci. Technol., 11, 3, 255 (1996). [87] N. Biswas, J. Gurganus, and V. Misra, “Work function tuning of nickel silicide by co-sputtering nickel and silicon,” Appl. Phys. Lett., 87, 17, 171908 (2005). [88] J. Wis, E. J. Haug, K. V. Klitzing, and K. Ploog, “Transport spectroscopy of a confined electron-system under a gate tip,” Phys. Rev. B., 46, 19, 12837 (1992). [89] A. Shakouri, “Nanoscale Thermal Transport and Microrefrigerators on a Chip,” Proc. IEEE, 94, 1613 (2006). [90] C. D. S. Brites, P. P. Lima, N. O. Silva, A. Millan, V. S. Amaral, F. Palacio, and L. D. Carlos, “Thermometry at the nanoscale,” Nanoscale, 4, 4799 (2012). [91] I. Chowdhury, R. Prasher, K. Lofgreen, G. Chrysler, S. Narasimhan, R. Mahajan, D. Koester, R. Alley, and R. enkatasubramanian, “On-chip cooling by superlattice-based thin-film thermoelectric,” Nat. Nanotechnol., 4, 235 (2009). [92] J. Yang, H. Yang, and L. Lin, “Quantum dot nano thermometers reveal heterogeneous local thermogenesis in living cells,” ACS Nano, 5, 5067 (2011). [93] S. Wang, S. Westcott, and W. Chen, “Nanoparticle luminescence thermometry,” J. Phys. Chem. B, 106, 11203 (2002). [94] F. Vetrone, R. Naccache, A. Zamarron, A. Fuente, F. Sanz-Rodriguez, L. Maestro, E. Rodriguez, D. Jaque, J. Sole, and J. Capobiano, “Temperature sensing using fluorescent nanothermometers,” ACS Nano, 4, 3254 (2010). [95] M. Asheghi and Y. Yang, Micro- and nano-scale diagnostic techniques for thermometry and thermal imaging of microelectronic and data storage devices: Springer-Verlag (2005). [96] K. Okabe, N. Inada, C. Gota, Y. Harada, T. Funatsu, and S. Uchiyama, “Intracellular temperature mapping with a fluorescent polymeric thermometer and fluorescence lifetime imaging microscopy,” Nat. Commun., 3, 705 (2012). [97] J. S. Reparaz, E. Chavez-Angel, M. R. Wagner, B. Graczykowski, J. Gomis-Bresco, F. Alzina, and C. M. Sotomayor Torres, “A novel contactless technique for thermal field mapping and thermal conductivity determination: Two-Laser Raman Thermometry,” Rev. Sci. Instrum., 85, 034901 (2014); M. Schmortz, P. Bookjans, E. Scheer, and P. Leiderer, “Optical temperature measurements on thin freestanding silicon membranes,” ibid., 81, 114903 (2010). [98] G. W. Walker, V. C. Sundar, C. M. Rudzinski, A. W. Wun, M. G. Bawendi, and D. G. Nocera, “Quantum-dot optical temperature probes,” Appl. Phys. Lett., 83, 3555 (2003); W. Chan and S. Nie, “Quantum dot bioconjugates for ultrasensitive nonisotopic detection,” Science, 281, 2016 (1998). [99] J. P. Pekola, K. P. Hirvi, J. P. Kauppinen, and M. A. Paalanen, “Thermometry by arrays of tunnel junctions,” Phys. Rev. Lett., 73, 2903 (1994). [100] A. V. Feshchenko, M. Meschke, D. Gunnarsson, M. Prunnila, L. Roschier, J. S. Penttil€a, and J. P. Pekola, “Primary thermometry in the intermediate Coulomb blockade regime,” J. Low Temp. Phys., 173, 36 (2013). [101] A. T. Tilke, L. Pesconi, H. Lorentz, and R. H. Blick, “Fabrication and transport characterization of a primary thermometer formed by Coulomb islands in a suspended silicon nanowire,” Appl. Phys. Lett., 82, 3773 (2003). [102] H. Grabert and M. H. Devoret, Single charge tunneling, Coulomb blockade phenomena in nanostructures: Plenum (1992). [103] J. P. Pekola, T. Holmqvist, and M. Meschke, “Primary tunnel junction thermometry,” Phys. Rev. Lett., 101, 206801 (2008). [104] R. Scheibner, E. G. Novuk, T. Borzenko, M. Konig, D. Reuter, A. D. Wieck, H. Buhmann, and L. W. Molenkamp, “Sequential and cotunneling behavior in the temperature-dependent thermopower of few-electron quantum dots,” Phys. Rev. B, 75, 041301 (2007). [105] P. Mani, N. Nakpathomkun, E. Hoffmann, and H. Linke, “A nanoscale standard for the Seebeck coefficient,” Nano Lett., 11, 4679 (2011). [106] S. Lee, Y. Lee, E. Song, and T. Hiramoto, “Observation of single electron transport via multiple quantum states of a silicon quantum dot at room temperature,” Nano Lett., 14, 71 (2014). [107] I. H. Chen, K. H. Chen, W. T. Lai, and P. W. Li, “Single germanium quantum-dot placement along with self-aligned electrodes for effective management of single charge tunneling,” IEEE Trans. Electron Devices, 59, 3224 (2012). [108] H. Buch, S. Mahapatra, R. Rahman, A. Morello, and M. Y. Simmons, “Spin readout and addressability of phosphorus-donor clusters in silicon,” Nat. Commun., 4, 2017 (2013). [109] M. H. Kuo, C. C. Wang, W. T. Lai, T. George, and P. W. Li, “Designer Ge quantum dots on Si: A heterostructure configuration with enhanced optoelectronic performance,” Appl. Phys. Lett., 101, 223107 (2012). [110] C. Y. Chien, W. T. Lai, J. R. Chang, C. C. Wang, M. H. Kuo, and P. W. Li, “Size tunable Ge quantum dots for near-ultraviolet to near-infrared photosensing with high figures of merit,” Nanoscale, 6, 5303 (2014). [111] J. E. Chang, P. H. Liao, C. Y. Chien, J. C. Hsu, M. T. Hung, H. T. Chang, S. W. Lee, W. Y. Chen, T. M. Hsu, T. George, and P. W. Li, “Matrix and quantum confinement effects on optical and thermal properties of Ge quantum dots,” J. Phys. D: Appl. Phys., 45, 105303 (2012). [112] W. L. C. Hui and J. P. Corra, “Seebeck coefficient of thin‐film germanium,” J. Appl. Phys., 38, 3477 (1967). [113] C. W. Beenakker, “Theory of Coulomb-blockade oscillations in the conductance of a quantum dot,” Phys. Rev. B, 44, 1646 (1991). [114] M. A. H. Khalafalla, H. Mizuta, and Z. A. K. Durrani, ”Switching of single-electron oscillations in dual-gated nanocrystalline silicon point-contact transistors,” IEEE Trans. on Nanotechnology, 2, 4 (2003).
指導教授	李佩雯、郭明庭(Pen-wen Li David Ming-ting Kuo)	審核日期	2015-7-30
推文	facebook   plurk   twitter   funp   google   live   udn   HD   myshare   reddit   netvibes   friend   youpush   delicious   baidu
網路書籤	Google bookmarks   del.icio.us   hemidemi   myshare