應用於類比積體電路中評估二相同比值陣列區塊
電容不匹配效應的矩陣性質解析法

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姓名

林厚運(Hou-Yun Lin) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用於類比積體電路中評估二相同比值陣列區塊電容不匹配效應的矩陣性質解析法
(Matrix Analysis for Mismatching ofTwo-Equal Array Block Capacitances inAnalog Integrated Circuits )

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摘要(中)

隨著半導體製程的不斷進步，晶片上元件尺寸與導線寬度也逐漸的微縮，這
樣的改變，使得元件之間的參數變異和不匹配關係加劇，也引進了許多難以控制
的製程變動問題。在現今的類比積體電路中，電路的效能受到元件間的參數變異
之影響，而元件的參數值又隨著各種不匹配的效應而改變。因此，如果想使電路
產生預期的理想效能表現，就必須妥善的處理電路中的不匹配。
本論文提出了對於電容元件不匹配的處理方法，從相關係數的角度出發，利
用元件的空間相關特性，評估電容擺放的好壞，再將不匹配的效應由多項式轉換
為矩陣的形式。透過矩陣相乘的描述方式，可以把每個對電容陣列造成影響的獨
立算子，定義成不同的特徵矩陣來分別探討。最後再用階層化的方法，將此理論
應用在更大的n 階矩陣上。
相較於使用多項式的描述方式，運用矩陣的形式來討論不匹配效應，可以得
到許多好處：不但可以用此方法來處理任意型式的獨立算子，也因為矩陣排列呈
現左右對稱的狀態，使得計算時會更佳簡便。此外，在電容排列是1：1 及方陣的
情況下，將可用階層化的方式擴展電容陣列，並推展至n 階。

摘要(英)

As the evolution of semiconductor process technology, the size of elements and the
width of wires on chips are reduced. These changes result in some uncontrollable
alterations of process and aggravate the mismatch and parameter variation of
components. Nowadays, the performance of analog integrated circuits is influenced not
only by the parameter variation of components but also by the mismatching effects.
That is to say, the approach of mismatch effects becomes a critical issue for better
anticipated performance.
This thesis proposes a method for improving mismatch of elements. In this method,
we estimate capacitance placement by spatial correlation and exchange mismatch effect
from polynomial term to matrix term. For independent operators which influence
capacitance arrays, we define them as characteristic matrices. Furthermore, this method
could also be used to the general N order matrix in hierarchical structure.
Instead of polynomial form, we use matrix form to discuss mismatching effects.
This method has two benefits: the ability to handle any types of independent operators
and the easier calculation property which derives from the symmetrical terms. Besides,
we could use hierarchical structure to expand capacitance array, if the placement are
both two targets and 1:1 segments.

關鍵字(中)

★ 矩陣性質解析法
★ 陣列區塊
★ 不匹配效應

關鍵字(英)

★ Matrix Analysis
★ Array Block Capacitances
★ Mismatch

論文目次

目錄
中文摘要 ..............................................................................................................I
Abstract................................................................................................................II
誌謝....................................................................................................................III
目錄................................................................................................................... IV
圖目錄 ............................................................................................................... VI
表目錄 .............................................................................................................. VII
第一章緒論 ...................................................... 1
1.1 研究背景簡介............................................................................................1
1.2 論文架構.....................................................................................................2
第二章電容佈局的基本概念 ........................................ 4
2.1 電容之簡介................................................................................................4
2.2 電容匹配的規則........................................................................................7
2.3 電容不匹配的原因..................................................................................10
第三章電容陣列的擺放 ........................................... 11
3.1 空間相關性(Spatial Correlation)........................................................... 11
3.1.1 相關性與元件不匹配(Correlation and Mismatch) ....................16
3.1.2 電容的比值變異數與相關性(Variation and Correlation) .........18
3.2 共質心基本理論(Common-Centroid)...................................................20
第四章電容陣列的矩陣分析法 ..................................... 22
4.1 雙目標(Two Target)電容的變異數與不匹配.........................................22
4.1.1 不匹配的矩陣形式(The Matrix Form of Mismatch).................23
4.1.2 特徵矩陣(The Characteristc Matrix)..........................................24
4.2 平移(Offset)及梯度(Gradient)的效應....................................................26
4.2.1 平移及梯度的特徵矩陣...............................................................27
4.2.2 梯度方向的影響...........................................................................29
4.2.3 抗梯度的電容陣列擺置(Gradient Resist) .................................31
4.3 階層式( Hirarchecal )的矩陣形式...........................................................33
第五章實例說明 ................................................. 36
5.1 基本電容陣列單元(Basic Unit)的比較..................................................36
5.2 Special Case ..............................................................................................38
5.2.1 Local Offset and Global Gradient ..................................................39
5.2.2 Chemical Mechanical Planarization (CMP)...................................40
第六章結論 ..................................................... 43
6.1 結論..........................................................................................................43
參考文獻 ........................................................ 44

參考文獻

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指導教授

陳竹一(Jwu-E Chen)

審核日期

2011-9-26

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