博碩士論文 985202066 詳細資訊




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姓名 吳少龍(Shau-lung Wu)  查詢紙本館藏   畢業系所 資訊工程學系
論文名稱 嵌入式立體視覺系統設計與硬體實作
(System Design and Hardware Implementation of Embedded Stereo Vision)
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摘要(中) 典型的立體視覺原理係基於雙攝影機同步取像和一系列複雜的影像處理計算,因此通常需要高速的處理器才足以因應複雜演算法的實作。低成本、計算資源受限的嵌入式系統應用,例如機器人視覺或人機互動介面系統,立體視覺則難以實現。本研究將設計了一個高性能的嵌入式立體視覺系統,我們設計了高速雙攝影機取像控制器,並且將立體視覺的演算法實現為管線化硬體電路,以滿足即時嵌入式系統應用目標。我們先以K-means演算法對影像進行色彩分群,再將影像物件分割後,透過連通物件標定得到物件資訊,接著以SAD(Sum of Absolute Difference)方法計算每個物體在左右影像的視差(disparity),最後藉由查表得到深度資訊。所有的演算法均已實作為硬體,並藉由上層的管線控制器整合為一顆平行化的立體視覺晶片。並為了驗證立體視覺晶片系統的性能,我們在FPGA實驗平台上整合了兩個取像速度為60 frames/sec,VGA解析度的攝影機,我們的立體視覺晶片在低複雜度場景下,可達每秒鐘15張立體視覺深度影像輸出的效能,此一優異的性能足以使本系統應用在各種即時嵌入式系統。
摘要(英) A typical stereo vision principle is basically consisted of two parts. One is the imaging extracted using two synchronous cameras and followed by a series of complex image processing calculations. However, high-speed image processors are often required to implement complex algorithms. Thus, stereo vision is very difficult to be achieved on the embedded computing system applications, such as robot vision or human-machine interactive interface system, because of its low-cost and constrained resources. In this paper, we designed a high-performance embedded stereo vision system. To meet the goal of real-time embedded system, a high-speed dual-camera controller was created and the stereo vision algorithms were implemented as pipelined hardware circuitry. We first used K-means algorithm to group colors. Then, we obtained the information of separated objects by calculating connected components. Furthermore, for each objects, the SAD (Sum of Absolute Difference) method was applied to calculate the disparity between the objects in the left and right image. Finally, we get the depth of each object by looking up the disparity-depth lookup table. All the algorithms were implemented as hardware systems and integrated into a stereo vision chip with a pipeline controller in the top layer. In order to verify the performance of stereo vision chip system, we integrated two cameras with high speed (60 frames / sec) and VGA dpi on the FPGA platform. As a result, our stereo vision chip is able to generate images at the speed up to 15 images / sec under a low-complexity background. This outstanding performance makes our system easily be used in a variety of real-time embedded systems.
關鍵字(中) ★ 嵌入式系統
★ 立體視覺
關鍵字(英) ★ SAD
★ Stereo vision
★ embedded system
★ k-means
論文目次 摘要 II
Abstract III
致謝 IV
目錄 V
圖目錄 VII
表目錄 X
第一章 1
緒論 1
1.1研究背景與動機 1
1.2 研究目的 2
1.3 論文架構 2
第二章 4
立體視覺原理與演算法 4
2.1 立體視覺原理 4
2.2 影像切割技術 7
2.2 連通物件標定 11
2.3 立體匹配 13
第三章 16
嵌入式立體視覺系統設計 16
3.1 雙攝影機取像控制器 17
3.2 影像前處理 34
3.3 立體匹配 45
3.4 軟體模擬 48
第四章 52
立體視覺系統硬體實作 52
4.1 硬體合成方法論 52
4.2 立體視覺模組設計與硬體合成 55
4.3 系統整合驗證與實驗 71
第五章 76
結論 76
5.1 結論 76
5.2 未來展望 77
參考文獻 78
附錄一 82
Grafcet of K-means image segmentation 82
Grafcet of Random cents generator 83
Grafcet of Distance calculator 84
Grafcet of Clustering 85
Grafcet of Cents updating 86
附錄二 88
Grafcet of Connected component 88
Grafcet of 1passCCP 89
Grafcet of Case 90
Grafcet of Merge 91
Grafcet of General update 92
Grafcet of Merge update 92
附錄三 93
Grafcet of Stereo matching 93
Grafcet of SAD 94
Grafcet of Disparity clustering 95
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指導教授 陳慶瀚(Cing-han Chen) 審核日期 2011-7-18
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