博碩士論文 995201103 詳細資訊




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姓名 涂聖強(Sheng-chiang Tu)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 寬頻主動式半循環器與平衡器研製
(Design and Analysis of Wideband Active Quasi-Circulator and Active Balun)
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摘要(中) 現今無線通訊技術快速的發展,切換器(switch)與雙工器(diplexer)電路主要用於前端收發系統中區隔收發訊號的功能,固然切換器作為分隔收發訊號的功能有不錯的隔離度且不會有直流功耗,但接收與發射的訊號不能同使開啟。而雙公器也擁有分隔收發訊號的能力,不同於切換器的地方乃是其利用雙頻帶的方式來實現,因此接收訊號的頻帶不同於與發射訊號的頻帶。而半循環器(quasi-circulator)則擁有兩者所沒有的優點,半循環器在區隔收發訊號時,可以同時並使用相同頻帶來完成訊號傳送,故此本論文將著眼探討如何設計並且分析半循環器電路。
根據已發表的論文中,使用主動式半循環器的文獻相較於其它電路的量是較少的,因此在本論文的第一章將列舉出幾種不同架構的主動式半循環器電路,並針對各個架構的作一簡單的介紹,方便讀者能快速了解其電路的運作原理。第二章為分別利用穩懋半導體股份有限公司提供的0.5 µm E/D-mode PHEMT與HBT/HEMT 2 µm/0.5 µm製程,台積電提供的CMOS 0.18 µm 製程技術並且搭配相位補償技術製作出3.2 ~ 14 GHz、5 ~ 20.2 GHz與3.9 ~ 32.7 GHz的主動式半循環器,插入損耗分別為-6 ~ -3 dB、-6.3 ~ -2.5 dB與-8 ~-4.8 dB。第三章則是使用穩懋半導體公司所提供的0.5 µm E/D-mode PHEMT製程技術實現出DC ~ 15 GHz的主動式平衡器,在頻帶內振幅誤差小於0.15 dB,相位誤差小於1度,小訊號增益大於5 dB,而後進一步利用此設計的主動式平衡器搭配達靈頓放大器實現出DC ~ 12 GHz的寬頻主動式半循環器,小訊號增益大於5 dB,在此頻寬範圍內隔離度均大於18 dB。第四章 利用台積電所提供CMOS 90 nm製程,延伸第三章的理論推導分析,搭配疊接分佈式達靈頓放大器設計出4.4 ~ 42 GHz的寬頻主動式半循環器,隔離度表現大於22 dB,小訊號增益大於-1 dB。第五章則是利用台積電所提供CMOS 90 nm製程,設計兩組矩陣分佈式放大器與三組堆疊二維方向正交耦合器成功實現40 ~ 83 GHz的主動寬頻半循環器,平均隔離度在頻寬範圍內大於12 dB,小訊號增益大於0 dB。
摘要(英) As the wireless communications are rapidly developing, the switch or diplexer is widely used in a transceiver for time or frequency division. The switch has good isolation between transmitter and receiver with no DC power consumption, but it cannot be used for the full diplexing system. The diplexer can be used to separate the receiving and transmitting signals, but the receiving frequency is different from the transmitting frequency. A quasi circulator can be adopted to connect the transmitter and the receiver with an antenna as a duplexer when the transmitting frequency is the same as the the receiving frequency. So this thesis will focus on the design and analysis of the quasi circulator.
According to the previously published literatures, a few active quasi circulators have been reported. Several different architectures of the active quasi circulators are introduced in Chapter 1, and the principle of operation is also presented. In Chapter 2, a phase compensation technique is adopted to improve the isolation of the active quasi circulator. Three active quasi circulators are successfully developed using 0.5 µm GaAs E/D-mode PHEMT, 2µm /0.5 µm GaAs HBT-HEMT, and 0.18 µm CMOS processes, respectively. Between 3.2 and 14 GHz, the insertion gain of the E/D-mode PHEMT quasi circulator is from -6 to -3 dB. Between 5 and 20.2 GHz, the insertion gain of the HBT-HEMT quasi circulator is from -6.3 to -2.5 dB. Between 3.9 and 32.7 GHz, the insertion gain of the CMOS quasi circulator is from -8 to -4.8 dB.
In Chapter 3, an innovative circuit topology for active balun/quasi circulator is investigated to further enhance the performance. A DC-to-15 GHz active balun is proposed using the 0.5 µm E/D-mode PHEMT process. The active balun has an amplitude imbalance of within 0.15 dB, an phase imbalance of within 1 degree, and a small signal gain of higher than 5 dB. Furthermore, the active balun is adopted to design a DC-to-12 GHz active quasi-circulator with a Darlington amplifier. The active quasi-circulator demonstrates a small signal gain of better than 5 dB, and an isolation of higher than 18 dB.
Based on the proposed topology in Chapter 3, a 4.4-to-42 GHz active quasi-circulator is presented using 0.18 µm CMOS process to extend the operation frequency in Chapter 4. The isolation is higher than 22 dB and the small signal gain is better than -1 dB. In Chapter 5, a millimeter-wave (MMW) active quasi circulator in 90 nm CMOS process are designed using two pairs of matrix distributed amplifiers and three broadside couplers. Between 40 and 83 GHz, the MMW quasi circulator has an average isolation of higher than 12 dB and a small signal gain of better than 0 dB.
關鍵字(中) ★ 寬頻放大器
★ 主動式半循環器
★ 共模拒斥比
★ 主動式平衡器
關鍵字(英) ★ CMRR
★ DA
★ active balun
★ quasi-circulator
論文目次 摘要 I
Abstract II
致謝 IV
目錄 VI
圖目錄 IX
表目錄 XVIII
第一章 導論 1
1.1 研究背景與動機 1
1.2 相關研究發展 4
1.3 論文貢獻 14
1.4 論文架構 15
第二章 利用相位補償技術結合分佈式放大器架構組成寬頻主動半循環器(Quasi-Circulator) 17
2.1 簡介 17
2.2 利用0.5 µm PHEMT製程設計3.2 ~ 14 GHz的主動半循環器 18
2.2.1 主動式半循環器設計與模擬結果 18
2.2.2 主動式半循環器量測結果 29
2.3 利用HBT/HEMT 2 um/ 0.5 um製程設計5 ~ 20.2 GHz的主動半循環器 37
2.3.1 主動式半循環器設計與模擬結果 37
2.3.2 主動式半循環器量測結果 47
2.4 利用0.18 µm CMOS製程設計3.9 ~ 32.7 GHz的寬頻主動半循環器 57
2.4.1 主動式半循環器設計與模擬結果 57
2.4.2 主動式半循環器量測結果 64
2.5 結果與討論 73
第三章 結合主動式平衡器與達靈頓放大器架構之主動半循環器  75
3.1 簡介 75
3.2 主動式平衡器原理 76
3.2.1 主動式平衡器相關研究與發展 76
3.2.2 共閘極、共源極主動式平衡器架構設計原理 79
3.2.2.1 單級共閘極、共源極奇偶模分析 79
3.2.2.2 電流源分析 82
3.2.2.3 兩級單端輸入雙端輸出平衡器奇偶模分析 86
3.2.3 共模拒斥比分析 94
3.2.4 利用0.5 µm PHEMT製程設計DC ~ 15 GHz 主動式平衡器的設計與分析 97
3.2.4.1 介紹 97
3.2.4.2 DC ~ 15 GHz主動式平衡器設計模擬結果 98
3.2.5 利用0.5 µm PHEMT製程設計DC ~ 15 GHz 主動式平衡器模擬與量測結果 111
3.2.6 結果與討論 121
3.3 結合主動式平衡器與達靈頓放大器架構之主動半循環器實現於0.5 µm PHEMT製程 122
3.3.1 達靈頓放大器相關研究與發展 122
3.3.2 達靈頓放大器電路架構設計和模擬結果 126
3.3.3 隔離度分析 130
3.3.4 結合主動式平衡器與達靈頓放大器架構之主動半循環器實現於0.5 µm PHEMT製程設計分析與模擬結果 132
3.3.5 結合主動式平衡器與達靈頓放大器架構之主動半循環器實現於0.5 µm PHEMT製程再模擬與量測結果 139
3.3.6 結果與討論 154
第四章 結合主動式平衡器與達靈頓疊接分佈式放大器之主動半循環器 156
4.1 簡介 156
4.2 主動式半循環器設計與模擬結果 157
4.2.1 主動式平衡器設計與模擬結果 157
4.2.2 達靈頓疊接分佈式放大器設計與模擬結果 162
4.2.3 主動式半循環器模擬結果 167
4.3 主動式半循環器量測結果 176
4.3.1主動式半循環器量測結果 176
4.3.2 結果與討論 186
第五章 利用堆疊二維方向正交耦合器配合疊接三級矩陣分佈式放大器實現寬頻主動半循環器 188
5.1 簡介 188
5.2 主動半循環器設計與模擬結果 189
5.2.1 堆疊二維方向正交耦合器 189
5.2.2 疊接三級矩陣分佈式放大器 197
5.2.3 主動半循環器模擬結果 201
5.3 主動半循環器量測結果 205
5.3.1 主動半循環器量測結果 205
5.3.2 結果與討論 212
第六章 結論 214
參考文獻 217
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指導教授 張鴻埜(Hong-Yeh Chang) 審核日期 2012-7-11
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