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姓名 鍾孝文(Hsiao-Wen Chung) 查詢紙本館藏 畢業系所 電機工程學系 論文名稱 應用於1550 nm波長之寬頻高速光積體電路之研製
(Design and fabrication of high-speed wide-bandwidth pin/HBT OEIC for 1550nm optical fiber communication.)相關論文 檔案 [Endnote RIS 格式]
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摘要(中) 本論文主要是針對1550 nm光纖通訊系統中，接收端的光檢測器(photodetector)與轉阻放大器(transimpedance amplifier)的整合光積體電路(OEIC)提出三種不同的設計與製程，其中包含一新穎的漸耦合架構。不同的設計與製程完全在學校無塵室中完成，成果並發表於IEEE Photonic Technology Letter論文上。
首先在光積體電路的設計中，採用傳統單石(monolithic)的方式將正面照光(top illumination)的InGaAs p-i-n光檢器與InP/InGaAs磷化銦異質接面雙極性電晶體(heterojunction bipolar transistor: HBT)做整合。異質接面雙極性電晶體的基極(base)、集極層(collector: InGaAs)、與次集極層(sub-collector)，同時使用為光檢器的p-i-n層，其吸收層(InGaAs)厚度為5000 Å。利用異質接面雙極性電晶體設計單級的共基極放大器(common-base transimpedance amplifier)以驗證光積體電路架構，並成功完成正面照光式p-i-n光檢器之光積體電路的製作。在特性測量方面，製作出的異質接面雙極性電晶體(射極面積為4?12 μm2)表現截止頻率fT為85 GHz，p-i-n 光檢測器的響應度是0.22 A/W，而共基極放大器則有32.5 dBΩ的轉阻增益以及34.2 GHz的3dB頻寬。使用heterodyne-beating的方式分別對p-i-n光檢器以及光積體電路進行頻寬量測，得到p-i-n光檢器14.5 GHz的頻寬，而光積體電路的3dB頻寬則是14 GHz。整體的光積體電路的14 GHz頻寬是受限於正面照光的p-i-n光檢器，為了進一步改善p-i-n光檢器的頻寬，採用漸耦合架構的p-i-n漸耦合光檢測器(evanescently coupled photodetector)來做為光訊號的檢測器，並同樣的使用單石方式與異質接面雙極性電晶體整合在InP基板上。
在漸耦合架構的p-i-n漸耦合光檢測器，其吸收層厚度減少為3000 Å，來有效改進高頻特性。此種做法可以有效的解決正面照光結構在量子效率與元件高頻特性上的取捨，此點在論文第二章以及第四章中詳細討論。所製作出來的異質接面雙極性電晶體(射極面積為3?12 μm2) 經由校正(de-embedded)後得到fT為110 GHz，而使用heterodyne-beating的方式所量得漸耦合光檢測器為30 GHz，響應度則是0.3 A/W。採用漸耦合架構的p-i-n漸耦合光檢測器，並同樣使用單石方式與異質接面雙極性電晶體的共基極放大器整合之光積體電路的3dB頻寬則是37 GHz。此一新穎設計與結果，已經表於IEEE PTL論文上(題目：37 GHz Bandwidth Monolithically Integrated InP HBT/Evanescently Coupled Photodiode)。
最後討論了覆晶(flip-chip)漸耦合式的光積體電路的設計與製作。由於磷化銦晶片的昂貴，為了節省晶片面積，以利於商業應用，只將異質接面雙極性電晶體以及漸耦合光檢測器製作在磷化銦(InP)晶片上，而共基極轉阻放大器所需使用的電阻以及直流、高頻下針點(pad)還有金屬連線等元件放置在砷化鎵(GaAs)基板上。在GaAs基板上採用電鍍的方式鍍上金錫凸塊(Au/Sn bump)，再藉由覆晶技術(flip-fhip technology)將其整合，完成光接收模組的前端。量測所得的覆晶漸耦合式光積體電路頻寬為34 GHz。
附錄中則介紹了採用穩懋(WIN)半導體公司的0.15 μm pHEMT製程所設計的分佈式轉阻放大器(distributed transimpedance amplifier)。此分佈式放大器採用了兩級的架構，量測特性得到42.3 dBΩ的轉阻增益以及36 GHz的頻寬，並與模擬結果相當接近。此電路驗證分佈式放大器應用在高速光纖通訊的可行性，並作為寬頻轉阻放大器設計參考。摘要(英) The high-speed, wide-bandwidth optoelectronic integrated circuits (OEIC’s) have been studied in this thesis with three different topologies. The presented OEIC consists of an InGaAs photodetector (PD) and a one-stage common-base InP/InGaAs HBT transimpedance amplifier (CB-TIA) for 1550 nm optical communication system. One of fabricated OEIC’s achieves excellent results and thus be accepted to appear on IEEE Photonic Technology Letter.
First of all, the top illuminated InGaAs p-i-n PD and InP/InGaAs heterojunction bipolar transistor (HBT) are integrated by using monolithic technology. The absorption layer of the p-i-n PD is formed from the 5000Å-thick InGaAs collector of the HBT on the same wafer. A CB-TIA is used to implement the p-i-n/HBT integration for OEIC. The measurement results show the 85 GHz cut-off frequency of the HBT with the emitter size of 4×12 μm2. The p-i-n PD exhibits a responsivity of ~0.22 A/W. The bandwidth of p-i-n PD and OEIC are 14.5 GHz and 14 GHz, respectively, by heterodyne beating measurement. The performance of OEIC is significantly limited by p-i-n PD, thus an evanescently coupled photodetector is proposed to increase the bandwidth.
The evanescently coupled photodetector (ECPD) and CB-TIA were designed and fabricated. The absorption layer thickness of p-i-n PD is reduced to 3000 Å to improve the response time. Due to the evanescently coupled structure, the responsivity of ECPD is improved and discussed in detail in chapter 2 and chapter 4, respectively. The measurement results show the cut-off frequency of HBT is 110 GHz after de-embedded calibration. The responsivity of ECPD is improved to 0.3 A/W. The electrical bandwidth of ECPD and OEIC are 30 and 37 GHz, respectively. The 37 GHz bandwidth of fabricated OEIC is published on IEEE PTL.
In addition, the flip-chip technology is applied to the evanescently coupled OEIC to save InP substrate. The ECPD and HBT were fabricated on InP wafer, and the passive components such as DC pads, RF pads, connection wires, and resistance were fabricated on the S.I. GaAs substrate. By using the flip-chip binding, the InP wafer has been saved ~91 %, and flip-chip bound OEIC demonstrates a -3dB bandwidth of 34 GHz.
In appendix, the principle, merits, and design flow of distributed amplifier (DA) are demonstrated. This 2 stage structure DA was fabricated by 0.15μm pHEMT process provided by WIN semiconductor corp. The measurement results show a transimpedance gain of 40.3 dBΩ with a -3 dB bandwidth of 36 GHz. The wide band performance demonstrates that the DA is very suitable for high speed optical communication system.關鍵字(中) ★ 光積體電路
★ 漸耦合光檢器
★ 異質接面雙極性電晶體
★ 覆晶式光積體電路關鍵字(英) ★ heterojuction bipolar transistor
★ flip-chip OEIC
★ optoelectronic circuit
★ evanescently coupled photodetector論文目次 目錄
頁次
第一章 導論 1
1.1 研究動機 1
1.2 論文架構 3
第二章 面照式p-i-n PD OEIC之設計與製作 5
2.1 簡介 5
2.2 磊晶設計 7
2.3 共基極轉阻放大器設計 9
2.4 p-i-n PD設計 10
2.5 面照形式p-i-n PD之OEIC製程流程 12
2.6 總結 25
第三章 面照式p-i-n PD OEIC之量測與分析 26
3.1 簡介 26
3.2 HBT直流特性量測 27
3.3 HBT高頻特性量測 30
3.4 TIA特性量測與分析 32
3.5 面照式p-i-n PD特性量測 35
3.6 面照式p-i-n PD之OEIC特性量測 40
3.7 相關研究比較 41
3.8 結論 42
第四章 漸耦合式p-i-n PD OEIC之設計與製作 44
4.1 簡介 44
4.2 磊晶設計 46
4.3 ECPD設計 47
4.4 漸耦合式p-i-n PD OEIC之製程流程 49
4.5 結論 55
第五章 漸耦合式p-i-n PD OEIC之量測與分析 57
5.1 簡介 57
5.2 HBT直流特性量測分析 57
5.3 HBT高頻特性量測 59
5.4 ECPD特性量測 60
5.5 ECPD之OEIC特性量測 61
5.6 相關研究比較 62
5.7 結論 63
第六章 ECPD之OEIC與覆晶技術的應用 65
6.1 簡介 65
6.2 覆晶基板製作流程 65
6.3 覆晶元件製作流程 73
6.4 覆晶連結 74
6.5 特性量測 75
6.6 相關研究比較 76
6.7 結論 77
第七章 結論 79
參考文獻 81
附錄A 兩級分佈式轉阻放大器之設計與量測 80
A.1 簡介 86
A.2 電路工作原理 87
A.3 電路設計與特性模擬 90
A.4 電路模擬與量測特性比較 93
A.5 結論 96參考文獻 [1] Charles Q. Wu, Emilio A. Sove ro, and Bruce Massey, “40-GHz Transimpedance Amplifier With Differential Outputs Using InP–InGaAs Heterojunction Bipolar Transistors,” IEEE J. Solid-State Circuits, vol. 38, pp. 1518-1523, Sept. 2003.
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[21] D. Streit, R. Lai, A. Gutierrez-Aitken, M. Siddiqui, B. Allen, A. Chau, W. Beale, and A. Oki, “InP and GaAs components for 40 Gbps applications,”IEEE GaAs Digest, 2001.
[22] Kuo-Liang Deng, Tian-Wei Huang,, and Huei Wang, “Design and analysis of novel high-gain and broad-band GaAs pHEMT MMIC distributed amplifiers with traveling-wave gain stages ,” IEEE Trans. MTT, vol. 51, No.11, pp. 2188-2196, Nov. 2003
[23] Ren-Chieh Liu and Huei Wang, “DC-to-15 and DC-to-30-GHz CMOS distributed transimpedance amplifiers,” IEEE radio frequency integrated circuit symp. 2004
[24] H.G. Bach, W. Schlaak, G.G. Mekonnen, R. Steingruber, A. Seeger, Th. Engel, W. Passenberg, A. Umbach, C. Schramm, and G. Unterborsch “50 Gb/s Inp-BASED Photoreceiver OEIC With Gain Flattened Transfer Characteristic” ECOC pp. 20-24 Sept. 1998指導教授 辛裕明(Yue-Ming Hsin) 審核日期 2006-7-4 推文 plurk
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