微波存取全球互通頻段接收機前端電路暨K頻段低雜訊放大器之研製

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：77

、訪客IP：3.144.21.206

姓名

呂盈達(Ying-Ta Lu) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

微波存取全球互通頻段接收機前端電路暨K頻段低雜訊放大器之研製
(The Design and Implementation of WiMax Receiver Front End and K-Band Low Noise Amplifier)

相關論文

★ 應用於筆記型電腦數位電視單極天線之研製	★ 應用於數位機上盒與纜線數據機之電纜多媒體傳輸標準多工濾波器
★ 印刷共面波導饋入式多頻帶與超寬頻天線設計	★ 微波存取全球互通頻段前向匯入式功率放大器與高效率Class F類功率放大器暨壓控振盪器電路之研製
★ 應用於矽基功率放大器與混頻器之傳輸線型變壓器研究	★ 應用於V-頻段射頻收發機前端電路之低功耗源極注入式混頻器之研製
★ 應用積體電路上方後製程與整合被動元件於互補式金氧半導體製程之系統封裝研究	★ 應用fT-倍頻電路架構於毫米波壓控振盪器與注入鎖定除頻器之研製
★ 應用傳輸線型變壓器於X/K–Ka/V頻段全積體整合之寬頻互補式金氧半導體功率放大器研製	★ 應用於K / V 頻段低功耗混頻器之研製
★ 應用於K/V頻段之低功耗CMOS低雜訊放大器之研究	★ 應用於5-GHz CMOS射頻前端電路之低電壓自偏壓式混頻器與高線性化功率放大器之研製
★ 應用於 K 頻段射頻接收機之寬頻低功耗 CMOS 低雜訊放大器之研製	★ 應用磁耦合變壓器於K頻段之低功耗互補式金氧半導體壓控振盪器研製
★ 應用於K頻段之單向化全積體整合功率放大器與應用於V頻段之寬頻功率放大器研製	★ 應用於C/X頻段全積體整合之互補式金氧半導體寬頻低功耗降頻器與寬頻功率混頻器之研製

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

[檢視]

[下載]

本電子論文使用權限為同意立即開放。
已達開放權限電子全文僅授權使用者為學術研究之目的，進行個人非營利性質之檢索、閱讀、列印。
請遵守中華民國著作權法之相關規定，切勿任意重製、散佈、改作、轉貼、播送，以免觸法。

摘要(中)

本論文係以TSMC 0.18-μm CMOS 與0.35-μm SiGe BiCMOS 製程，研製接
收機射頻前端電路。而設計之電路主要包括應用於WiMax 系統之高線性度差動
低雜訊放大器、應用於WiMax 系統之前向饋入次諧波混頻器、使用在WiMax
系統之考畢茲壓控振盪器以及用於K 頻段之差動低雜訊放大器。
各電路之特性如下：WiMax 低雜訊放大器使用前向饋入校正技巧改善線性
度。藉由加入疊接補償轉導電路消除差動電路原有的非線性效應，在損失最少的
雜訊指數下得到線性度的改善。量測增益為15.2 dB，雜訊指數為2.95 dB，輸入
反射損耗為-23.3 dB，輸出反射損耗為-6.8 dB，而輸入1 dB 壓縮點為-13 dB，三
階截斷點為+3 dB，總功率消耗17.03 mW；使用轉導提升技巧之K 頻段差動低
雜訊放大器，利用變壓器耦合技巧，達成轉導提升的效果，使第一級放大器之功
耗與雜訊指數都能改善。量測增益為8.2 dB，雜訊指數為7.8 dB，輸入反射損耗
為-12.4 dB，輸出反射損耗為-10.2 dB，而輸入1 dB 壓縮點為-10 dB，三階截斷
點為0 dB，總功率消耗49.93 mW；次諧波混頻器使用差動前向饋入式轉導電路，
在消除三階非線性失真項的同時，也能增加主頻增益。量測RF 與IF 返回損耗
在2.5 – 2.7 GHz 均小於10 dB 以下。IF 降頻頻率為10 MHz，RF 頻率較LO 頻率
高，LO 功率為2 dBm 時最有效率，混頻器最大轉頻增益為6.2 dB。RF 頻率3-dB
操作頻寬為2.5 GHz – 3.9 GHz。IF 頻率3-dB 操作頻寬為10 MHz - 150 MHz。混
頻器增益壓縮點(1-dB compression point)為-8 dBm，三階截斷點(IIP3)為+5 dBm。
RF-LO、LO-IF 及RF-IF 隔離度均在-30 dB 以上。轉導提升之考畢茲壓控振盪器，
利用差動電路特性，達成轉導提升的效果，改善了以往考畢茲振盪器難起振的條
件，達到低功率的效能。頻率可調範圍為444 MHz，輸出功率為1.54 ~ 2.92 dB，離主頻100 KHz 之相位雜訊為-101.4 dBc/Hz，離主頻1 MHz 之相位雜訊為-124.1
dBc/Hz，振盪器本身消耗功率為2.46 mW。

摘要(英)

The thesis investigates the functional block circuits for RF receivers. The
designed circuits are implemented in TSMC 0.18-μm CMOS and 0.35-μm SiGe
BiCMOS technologies. The implemented circuits include a high linearity differential
low noise amplifier, a feed-forward sub-harmonic mixer, a Colpitts voltage controlled
oscillator for WiMax applications. A K-band differential low noise amplifier is also
studied for investigating the properties of differential circuits.
In WiMax low noise amplifier, linearity is improved by using feed-forward
correction technique. Since the using cascode compensation transconductor circuit,
the nonlinearity of the differential circuit can be cancelled at the differential outputs
and thus the LNA achieved high linearity without seriously degraded the NF. The
WiMax low noise amplifier achieves a power gain of 15.2 dB, a noise figure of 2.95
dB, input/output return losses of 23.3 dB, and 6.8 dB, respectively. The measured
1-dB gain compression point and the input third-order intercept point are -13 dBm
and +3 dBm, respectively, and total power consumption is 17.03 mW; A gm-boosting
technique was applied in K-band low noise amplifier. The transistor transconductor is
boosted by using transformer coupling. The K-band low noise amplifier achieves a
power gain of 8.2 dB, a noise figure of 7.8 dB, input/output return losses of 12.4 dB
and 10.2 dB. The 1-dB gain compression point and the input third-order intercept
point are -10 dBm and 0 dBm, respectively, and total power consumption is 49.93
mW. In the sub-harmonic mixer design, a differential feed-forward transconductor
stage was adopted to improve the third-order nonlinearity distortion and enhances the
conversion gain, simultaneously, which cancelled the unwanted third order
intermodulation products at the outputs. The obtained return loss of RF and IF ports
are both better than 10 dB. Low side local oscillator (LO) frequency is selected and
inter-mediate frequency (IF) is chosen as 10 MHz. the optimized LO driver is +2 dBm.
The conversion gain of mixer is 6.2 dB, with its RF 3-dB bandwidth from 2.5 GHz to
3.9 GHz. The IF 3-dB bandwidth is measured from 10 MHz to 150 MHz. The 1-dB
compression point and IIP3 are -8 dBm and +5 dBm, respectively. The port to port
isolations of RF-LO, LO-IF and RF-IF are better than -30 dB. In gm-boosting Colpitts
voltage controlled oscillator design, the power consumption can be reduced by
employing differential circuit inherent characteristic. The voltage controlled oscillator
yields a tuning range of 444 MHz, an output power of 1.54 ~ 2.92 dBm. The phase
noise at 100 KHz and 1 MHz offset frequencies achieves -101.4 dBc/Hz and -124.1
dBc/Hz, respectively. The power consumption of the VCO core dissipates only 2.46
mW.

關鍵字(中)

★ 次諧波混頻器
★ 壓控振盪器
★ 低雜訊放大器

關鍵字(英)

★ LNA
★ Mixer
★ VCO

論文目次

第一章緒論 1
1-1 微波存取全球互通系統介紹 1
1-2 研究動機 3
1-3 章節簡述 4
第二章低雜訊放大器 5
2-1 低雜訊放大器導論 5
2-2 低雜訊放大器之重要參數與MOSFET的雜訊 6
2-2.1 低雜訊放大器之重要參數 6
2-2.2 MOSFET的雜訊 8
2-3 限制功率消耗之線性度改良WiMax差動式低雜訊放大器 10
2-3.1 在固定功率消耗時獲得最低雜訊之技巧 10
2-3.2 線性度提升原理說明 13
2-4 WiMax差動式低雜訊放大器量測結果與討論 14
2-5 使用轉導值提升機制之K頻段低雜訊放大器 18
2-5.1 利用轉導值提升機制 18
2-5.2 變壓器設計 22
2-6 K頻段低雜訊放大器量測結果與討論 24
第三章次諧波混頻器 30
3-1 混頻器導論 30
3-2 混頻器之重要參數 30
3-3 應用於WiMax系統之高線性度混頻器 32
3-4 WiMax高線性度混頻器量測結果與討論 36
第四章壓控震盪器 48
4-1 壓控振盪器導論 48
4-2 壓控振盪器之重要參數與相位雜訊 48
4-2.1 壓控振盪器之重要參數 48
4-2.2 相位雜訊 50
4-3 應用於WiMax系統之轉導提升式考畢茲壓控振盪器 54
4-3.1 考畢茲壓控振盪器之原理分析 54
4-3.2 轉導值提升原理分析 56
4-4考畢茲壓控振盪器量測結果與討論 61
第五章結論 64
5-1 結論 64
5-2 未來期許與研究方向 65
參考文獻 66

參考文獻

[1] V. Aparin, G. Brown, and L. E. Larson, “Linearization of CMOS LNAs via
optimum gate biasing,” in IEEE Int. Circuits Syst. Symp., Vancouver, BC, Canada,
vol. IV, pp. 748–751, May 2004.
[2] Y. Ding and R. Harjani, “A +18 dBm IIP3 LNA in 0.35 _m CMOS,” in IEEE
International Conference on Solid-State Circuits., San Francisco, CA, pp.
162–163, Feb. 2001.
[3] D. R. Webster, D. G. Haigh, J. B. Scott, and A. E. Parker, “Derivative
superposition—a linearization technique for ultra broadband systems,” in IEE
Wideband Circuits Modeling and Tech. Colloq., pp. 3/1–3/14, May 1996.
[4] B. Kim, J. S. Ko, and K. Lee, “A new linearization technique for MOSFET RF
amplifier using multiple gated transistors,” IEEE Microw. Guided Wave Lett., vol.
10, no. 9, pp. 371–373, Sep. 2000.
[5] V. Aparin and L. E. Larson, “Modified derivative superposition method for
linearizing FET low-noise amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 53,
no. 2, pp. 571–581, Feb. 2005.
[6] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits,
Cambridge, U.K.: Cambridge Univ. Press, 1998.
[7] P. Quinn, “A cascode amplifier nonlinearity correction technique,” 1981 IEEE
International Conference on Solid-State Circuits, pp. 188-189, Feb 1981.
[8] R. Point, M. Mendes, W. Foley, “A differential 2.4 GHz switched-gain CMOS
LNA for 802.11b and Bluetooth, 2002 IEEE Conference on Radio and Wireless,
pp. 221-224, Aug 2002.
[9] S. Mou, J. G. Ma, K. S. Yeo, and M. A. Do, “A modified architecture used for
input matching in CMOS low-noise amplifiers” 2005 IEEE Transactions on
Circuits and Systems II, Vol. 52, pp. 784-788, Nov. 2005.
[10] Y. S. Hwang, C. J. Kim, J. H. Kim, and H. J. Yoo “A controllable variable gain
LNA for 2 GHz band,” 2005 Asia-Pacific Conference on Microwave, vol. 5, pp.
4-7, Dec 2005.
[11] L.-J. Lu, H.-H. Hsieh, and Y.-S. Wang, “A Compact 2.4/5.2-GHz CMOS
Dual-Band Low-Noise Amplifier,” IEEE Microwave and Wireless Components
Letters, vol. 15, no. 10, pp. 685-687, Oct. 2005.
[12] X. Li; S. Shekhar, and D.J. Allstot, “Gm boosted common-gate LNA and
differential colpitts VCO/QVCO in 0.18 um CMOS,” IEEE JOURNAL OF
SOLID-STATE CIRCUITS, VOL. 40, pp. 2609-2619, DECEMBER 2005
[13] J. R Long, Member, IEEE，”Monolithic Transformers for Silicon RF IC Design ,”
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 9, SEPTEMBER
2000
[14] M. Danesh and J. Long, “Differential driven symmetric microstrip inductors,”
IEEE Trans. Microwave Theory and Techniques, vol. 50, no. 1, Jan. 2002.
[15] B. A. Floyd, L. Shi, Y. Taur, I. Lagnado, and K. K. O, “A 23.8-GHz SOI CMOS
tuned amplifier,” IEEE Trans. Microwave Theory Tech., vol. 50, pp. 2193–2195,
Sept. 2002.
[16] L. M. Franca-Neto, B. A. Bloechel, and K. Soumyanath, “17 GHz and 24 GHz
LNA designs based on extracted-S-parameter with microstrip- on-die in 0.18 _m
logic CMOS technology,” Eur. Solid-State Circ., pp. 149–153, 2003.
[17] K.-W. Yu, Y.-L. Lu, D. C. Chang, V. Liang, and M. F. Chang, “K-band low-noise
amplifiers using 0.18 μm CMOS technology”, IEEE Microwave and Wireless
Component Letter, vol. 14, no. 3, pp. 106-108, March 2004.
[18] B. Welch, K.T. Kornegay, H.-M. Park, and J. Laskar, “A 20-GHz Low-Noise
Amplifier With Active Balun in a 0.25-μm SiGe BICMOS Technology ,” IEEE J.
Solid-State Circuits, vol. 40, Issue. 10, pp. 2092-2097, Oct., 2005.
[19] X. Guo, K. K. O, “A power efficient differential 20-GHz low noise amplifier
with 5.3-GHz 3-dB bandwidth”, IEEE Microwave and Wireless Component
Letter, vol. 15, Issue. 9, pp. 603-605, Sept 2005.
[20] R. Svitek, and S. Raman, “5-6 GHz SiGe active I/Q subharmonic mixers with
power supply noise effect characterization, IEEE Microwave and Wireless
Components Letters, vol. 14, pp. 319-321, July 2004.
[21] K. Nimmagadda, G.M. Rebeiz, “A 1.9 GHz double-balanced subharmonic mixer
for direct conversion receivers,” IEEE Symposium on Radio Frequency
Integrated Circuits, pp. 253-256, May 2001.
[22] M. Goldfarb, E. Balboni, and J. Cavey, “Even harmonic double-balanced active
mixer for use in direct conversion receivers,” IEEE J. Solid-State Circuits, vol.
38, pp. 1762-1766, Oct 2003.
[23] H.-C. Chen, T. Wang, S.-S Lu, and G.-W. Huang “A monolithic 5.9-GHz CMOS
I/Q direct-down converter utilizing a quadrature coupler and transformer-coupled
subharmonic mixers,” IEEE MWCL, vol. 16, pp. 197-199, April 2006.
[24] B. Gilbert, “The MICROMIXER: A highly linear variant of the Gilbert mixer
using a bisymmetric Class-AB input stage.” IEEE J. Solid-State Circuits, Vol. 32,
pp. 1412-1423, Sept. 1997.
[25] C. C. Meng, S. S. Lu, M. H. Chiang and H. C. Chen, “DC to 8 GHz 11 dB gain
Gilbert micromixer using GaInP/GaAs HBT technology.” Electronics Letters,
Vol. 39 Issue: 8, April 2003.
[26] “RF System and Circuit Challenges for WiMax,” Intel Technology Journal, vol.
08, pp189-200, Aug. 2004.
[27] B. Gilbert, “The multi-tanh principle: A tutorial overview.” IEEE J. Solid-State Circuits, Vol. 33, no. 1, pp. 2-17, Jan. 1998.
[28] S.-T. Lim, and J.R Long, , “A Low-Voltage Broadband Feedforward-Linearized
BJT Mixer.” IEEE J. Solid-State Circuits, Vol. 41, pp. 2177-2187, Sept. 2006.
[29] S. Otaka, M. Ashida, M. Ishii, T. Itakura, “A +10-dBm IIP3 SiGe mixer with IM3
cancellation technique.” IEEE J. Solid-State Circuits, Vol. 39, pp. 2333-2341,
Dec. 2004.
[30] J. J. Rael and A. A. Abidi, “Physical Process of Phase Noise in Differential LC
Oscillators,” IEEE Custom Integrated Circuits Conference, pp. 569-572, May
2000.
[31] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits,
Cambridge, U.K.: Cambridge Univ. Press, 1998.
[32] L. Jia, J.-G. Ma, K. S. Yeo, and M. A. Do, “9.3-10.4-GHz-band cross-coupled
complementary oscillator with low phase-noise performance,” IEEE Trans,
Microwave Theroy Tech., vol. 52, pp. 1273-1278, April 2004.
[33] N.-J. Oh and S.-G. Lee, “11-GHz CMOS differential VCO with back-gate
transformer feedback,” IEEE Microwave Wireless Comp. Lett., vol. 15,
pp.733-735, Nov. 2005.
[34] T. Song, S. Ko, D.-H. Cho, H.-S. Oh, C. Chung, and E. Yoon, “A 5GHz
transformer-coupled CMOS VCO using bias-level shifting technique,” IEEE
Symposium on Radio Frequency Integrated Circuits (RFIC), pp.127-130, June
2004.
[35] M.-D. Tsai, Y.-H. Cho, and H. Wang, “A 5-GHz low phase noise differential
colpitts CMOS VCO,” IEEE Microwave Wireless Comp. Lett., vol. 15,
pp.733-735, May 2005.
[36] A. Hajimiri and T. H. Lee, “A General Theory of Phase Noise in Electrical
Oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179-194, Feb.
1998.
[37] R. Aparicio, and A. Hajimiri, “A Noise-Shifting Differential Colpitts VCO,”
IEEE J. Solid-State Circuits, vol. 37, pp. 1728-1736, Dec. 2002.
[38] E. Hegazi, H. Sjoland, and A. A. Abidi, “A Filtering Technique to Lower LC
Oscillator Phase Noise,” IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 1921-
1930, Dec. 2001.
[39] J. Gil, S.-S. Song, H. Lee, and H. Shin, “A -119.2 dBc/Hz at 1MHz, 1.5 mW,
fully integrated, 2.5 GHz, CMOS VCO using helical inductors,” IEEE Microw.
Wireless Compon. Lett., vol. 13, no. 11, pp.457–459, Nov. 2003.
[40] L. Jia, J. G. Ma, K. S. Yeo, X. P. Yu, M. A. Do, and W. M. Lim, A 1.8-V
2.4/5.15-GHz Dual-Band LC VCO in 0.18-μm CMOS Technology, ” IEEE
Microwave Wireless Comp. Lett., vol. 16, pp.194-196, April 2006.
[41] B. Bisla, R. Eline, and L.M. Franca-Neto, “RF System and Circuit
Challenges for WiMax,” Intel Technology Journal, vol. 8, No. 3, pp.
189-199, Aug. 2004.
[42] A. Ghosh, D.R. Wolter, J.G. Andrews, and R. Chen, “Broadband Wireless
Access with WiMax/802.16: Current Performance Benchmarks and Future
Potential,” IEEE Communications Magazine, vol. 43, No. 2, pp. 129-136,
Feb. 2005.
[43] S.M. Cherry, “WiMax and Wi-Fi Separate and Unequal,” IEEE Spectrum,
vol. 41, No. 3, pp. 16-16, Mar. 2004.
[44] “Part 16: Air Interface for Fixed Broadband Wireless Access Systems,”
IEEE Standard for Local and metropolitan area networks, IEEE Std™
802.16-2004, 2004.
[45] 李金龍, “雜訊消除放大器與寬頻矩陣型分佈式放大器暨壓控振盪器之研
製,＂碩士論文, 2006, 國立中央大學。
[46] 曾卿銘, “3.1~10.6 GHz 超寬頻接收機前端電路之研究,＂碩士論文, 2006,
國立中央大學。

指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2007-7-11

推文