矽鍺異質接面功率電晶體佈局設計

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姓名

張加聰(Chia-Tsung Chang) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

矽鍺異質接面功率電晶體佈局設計
(SiGe Power HBT Layout Design)

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摘要(中)

論文採用台積電(TSMC)所提供的矽鍺(SiGe) 0.35 um BiCMOS製程，設計兩種不同的功率電晶體佈局方式，藉以探討元件在高操作電壓下所受到之熱效應影響，並提出利用改變部分射極與射極之間距大小，進以改善元件散熱之方法。
首先在直流方面，採用C++模擬軟體模擬兩種佈局中的溫度分布，並實際量測在不同溫度下，兩種佈局的動態與靜態之電流-電壓圖，進以分析兩種佈局在抑制自發熱效應的動態量測下之差異，再探討其靜態量測下作用區的輸出傳導值。利用所量測在不同溫度下的電流-電壓圖萃取熱電阻值，在室溫下兩種佈局之熱阻值，新佈局的熱阻值約為85~90K/W，而傳統舊佈局的熱阻值約為125至130 K/W，藉此了解兩種佈局之散熱特性，發現新佈局設計方式在散熱方面會比傳統舊佈局設計佳。
在高頻小訊號方面，採用ADS模擬軟體模擬兩種佈局在穩定溫度下的高頻小訊號，並實際量測其在偏壓VCE = 3V與IB = 0.25、0.5mA中高頻小訊號特性之差異，並針對其脈衝與連續性S參數量測所得之結果加以分析，探討兩種佈局由於散熱特性的不同對高頻小訊號之影響。在功率大訊號方面則採用負載-推移量測系統分別針對兩種佈局設計在功率大訊號特性量測，並藉以分析兩種佈局設計其功率大訊號特性與其線性度之差異，發現新佈局設計在RF特性上(包含高頻小訊號，例如：fT,、fMAX；與功率大訊號，例如：power gain, P1dB, PAE, OIP3)會比傳統舊佈局佳，以偏壓VCE = 3V與IB = 0.5mA為例說明，新佈局的脈衝性與連續性fT值分別約為18.5 GHz與17.45 GHz，而Power Gain約為14.64 dB，PAE 約為25.6%，OIP3值約為31.63 dBm；傳統舊佈局的脈衝性與連續性fT值分別約為18.1 GHz與14.95 GHz，而Power Gain約為14.03 dB，PAE約為26.6%，OIP3值約為31.46 dBm。

摘要(英)

In this study, we adopted 0.35um Silicon Germanium Hetrojunction Bipolar Transistor BiCMOS technology which was fabricated by Taiwan Semiconductor Manufacturing Company (TSMC) to design two kinds of different layouts for power HBT. The thermal effect and characteristics of devices were investigated when devices operated at high voltage. In addition, we proposed new layout design using various emitter finger spacing (S) to reduce the electro-thermal effect and increase the thermal stability of the power HBT device.
At first, we simulated the temperature distribution of the two layout designs by C++. In addition, two different layout designs were fabricated to compare their thermal effect and characteristics, including cw and pulse DC characteristics at different temperature. According to these dc measurement data, we extracted the thermal resistance and output conductance of two kinds of layouts. It showed that the thermal management of two kinds of layouts. We found new layout has better thermal characteristics compared with old layout.
We simulated the small signal characteristics of two kinds of layouts at the steady temperature by ADS and measured the cw and pulse S parameters of two kinds of layouts at VCE = 3V, IB = 0.25、0.5mA. It showed the small signal characteristics with the thermal effect and characteristics.We measured the large signal characteristics of two kinds of layouts by load pull system and analyzed the large signal characteristics. It showed the linearity and large signal characteristics of two kinds of layouts. We found new layout has better RF performance which includes small signal, such as fT, fMAX and large signal characteristics, such as power gain, P1dB, PAE, OIP3 compared with old layout.

關鍵字(中)

★ 熱耦合效應
★ 熱跑脫效應
★ 矽鍺異質接面功率電晶體
★ 自發熱效應

關鍵字(英)

★ SiGe Power HBT
★ thermal coupling effect
★ thermal runaway
★ self heating effect

論文目次

目錄 I
圖目錄 III
表目錄 VI
第一章導論 1
1.1 研究動機 1
1.2 SiGe HBT之優缺點 1
1.3 SiGe HBT之應用 4
1.4 論文摘要 8
第二章多射極結構元件 10
2.1 自發熱效應與熱耦合效應 10
2.2 元件結構與佈局設計 11
2.2.1 傳統舊佈局設計 11
2.2.2 新佈局設計 12
2.3 設計流程 13
2.4 討論 15
第三章直流分析結果 16
3.1 溫度分布模型 16
3.2 Pulse與變溫量測系統 21
3.2.1 動態量測IV方面 22
3.2.2 靜態量測IV方面 26
3.3 熱電阻模型 31
3.4 討論 35
第四章高頻小訊號特性分析 37
4.1 截止頻率(fT)與最大震盪頻率(fMAX)模擬結果 37
4.2 交流小訊號分析 38
4.2.1 截止頻率(fT)與最大震盪頻率(fMAX)分析 38
4.2.2 脈衝 RF量測介紹 41
4.2.3 Pulse與CW截止頻率比較 42
4.3 討論 44
第五章功率特性分析 45
5.1 負載-推移系統之介紹 45
5.2 Pout、PAE和GP的比較 46
5.3 IP3的比較 50
5.4 討論 54
第六章結論 55
參考文獻 57

參考文獻

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/2006JUL11_MC_RFD_TS_2.PDF

指導教授

辛裕明(Yue-ming Hsin)

審核日期

2007-7-11

推文