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姓名 楊露瑜(Lu-Yu Yang) 查詢紙本館藏 畢業系所 電機工程學系 論文名稱 應用氮化矽做為穿隧介電層之鍺量子點電晶體之研製
(the fabrication of Germanium nanocrystal MOSFET with SiN tunneling dielectric technology)相關論文 檔案 [Endnote RIS 格式]
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摘要(中) 在本論文中,利用低壓化學氣相沉積系統沉積複晶矽鍺並利用氧化之方式形
成鍺奈米晶粒製作出浮點電晶體,另一方面,我們以高介電層材料取代傳統的二
氧化矽做為穿隧介電層以提升寫入的速度;在製作浮點電晶體過程中,我們也開
發了閘堆疊蝕刻的部份,因為浮點電晶體閘堆疊層中的鍺奈米晶粒是否蝕刻乾淨
會嚴重影響元件的製作與特性。
我們利用製作出來的電晶體做了以下幾項的電性量測包含:室溫下儲存時間
量測、脈波量測、耐用性量測等,藉由以上的量測,我們可以清楚知道所製作的
元件之特性。摘要(英) In this thesis, we utilize selective thermal oxidation of poly SiGe to form Ge
nanocrystals embedded in SiO2 and then fabricate the Ge nanocrystals transistor. In
addition, using high-K material to replace the conventional robust SiO2 enhances
programming speed. In the fabrication process, we have also developed the gate stack
etch technique, because of Ge nanocrystals embedded in gate stack has been removed
or not affects the following fabrications and characterization of device tremendously.
When the fabrication of device has been completed, we take some measurements
including, pulse response, endurance measurement and retention time at room
temperature. According to the result of measurements, we can realize the
characterization of our device and the problems of device structure關鍵字(中) ★ 非揮發性記憶體 關鍵字(英) ★ memory 論文目次 目 錄
第一章 簡介 ………………………………………………………………………1
1-1 研究背景………………………………………………………………….…1
1-2 浮閘與浮點記憶體的比較……………………………………………….…2
1-3 高介電層材料的應用…………………………………………………….…3
1-4 量子點的種類…………………………………………………………….…5
第二章 浮點記憶體之操作原理…………………………………………………11
2-1 前言…………………………………………………………………………11
2-2 浮點記憶體之寫入與抹除原理……………………………………………11
2-3 穿隧機制……………………………………………………………………11
2-3-1 直接穿隧……………………………………………………………….12
2-3-2F-N 穿隧………………………………………………………………..12
2-3-3F-P 發射………………………………………………………………...13
2-4 元件穿隧機制討論………………………………………………………...14
第三章 鍺浮點記憶體之製程與開發……………………………………………18
3-1 前言…………………………………………………………………………18
3-2 閘堆疊層製做與流程………………………………………………………18
3-3 閘堆疊蝕刻設計……………………………………………………………19
3-4 蝕刻選擇比的評估…………………………………………………………21
3-5 實驗設計流程……………………………………………………………....22
3-6 實驗結果…………………………………………………………………....25
3-7 電晶體完整製作流程……………………………………………………....26
第四章 元件量測與分析…………………………………………………….…….40
4-1 量測儀器……………………………………………………………………40
4-2 電晶體量測…………………………………………………………………40
4-3 磁滯現象量測……………………………………………………………...41
4-4 寫入電壓與時間的決定…………………………………………………...42
4-5 抹除電壓與時間的決定…………………………………………………...43
4-6 脈波量測…………………………………………………………………...44
4-7 儲存時間量測……………………………………………………………...45
4-8 耐用性量測…………………………………………………………………46
4-9 元件分析與製程討論………………………………………………………47
第五章 總結與未來展望……………………………………………………………57
參考文獻……………………………………………………………………………..58參考文獻 [1] S. Tiwari et al, “A silicon nanocrystals based memory ,” Appl. Phys. Lett, vol. 68, pp. 1377-1379, 1996.
[2] P. H. Tsai et al, “Novel SONOS-type nonvolatile memory device with optial Al doping in HfAlO charge-trapping layer,” IEEE Electron Device Lett, vol. 29, pp. 265-268, 2008.
[3] S.Maikap et al , ”Band offsets and charge storage characteristics of atomic layer deposited high-k HfO2/TiO2 multilayers,” Appl. Phys. Lett, vol. 90, pp. 262901, 2007.
[4] S. Maikap et al, ”Charge trapping characteristics of atomic-layer-deposited HfO2 films with Al2O3 as a blocking oxide for high-density non-volatile memory device applications,”Semicond. Sci. Technol, vol. 22, pp. 884-889, 2007.
[5] J. Dufourcq et al, ”High density platinum nanocrystals for non-volatile memory applications”, Appl. Phys. Lett, vol. 92, pp. 073102, 2008.
[6] S. Maikap et al , ”Physical and electrical characteristics of atomic layer deposited TiN nanocrystal memory capacitors”, Appl. Phys. Lett, vol. 91, pp. 043114, 2007.
[7] J. J. Lee, D.-L Kwong, “Metal nanocrystal memory with high-k tunneling barrier for improved data retention,” IEEE Transaction on Electron Devices, vol. 52, pp. 507-511, 2005.
[8] J. H. Chen et al , ”Nonvolatile flash memory device using Ge nanocrystals embedded in HfAlO high-k tunneling and control oxides:device fabrication and electrical performance,” IEEE Transaction on Electron Devices, vol. 51, pp. 1840-1848, 2004.
[9] W. T. Lai and P. W. Li, ”Growth kinetics and related physical/electrical properties of Ge quantum dots formed by thermal oxidation of Si1−xGex-on-insulator,”Nanotechnology, vol. 18, pp. 145402, 2007.
[10] P. W. Li, W. M. Liao, and S. W. Lin, “Formation of atomic-scale germanium quantum dots by selective oxidation of SiGe/Si-on-insulator,” Appl. Phys. Lett, vol. 83, pp. 4628-4630, 2003.
[11] S. K. Samanta et al, “Enhancement of memory window in short channel non-volatile memory devices using double layer tungsten nanocrystrals,” in IEDM Tech. Dig. 2005, pp. 170-173.
[12] R. Ohba, N. Sugiyama et al , “Nonvolatile Si quantum memory with self-aligned doubly-stacked dots,” IEEE Transactions on Electron Devices, vol. 49, pp. 1392-1398, 2002.
[13] S. H. Hsu, L. Y. Yang, and P. W. Li, ” Low power enhanced charge retention of nanocrystal metal-oxide-semiconductor capacitors with multi-stack germanium quantum Dots”, in ISTDM 2008.
[14] 莊達人編著,”VLSI製造技術”,第五版,第八章,pp 349-410,高立出版社,94年。指導教授 李佩雯(Pei-Wen Li) 審核日期 2008-7-25 推文 plurk
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