博碩士論文 965201033 詳細資訊




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姓名 吳尚儒(Shang-Ju Wu)  查詢紙本館藏   畢業系所 電機工程學系
論文名稱 Ka頻段低功耗低雜訊放大器之設計與實現
(Design and Implementation of Ka-Band Low Power Consumption Low Noise Amplifier)
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摘要(中) 本論文主要研究內容為Ka頻段射頻毫米波前端電路-低雜訊放大器之設計,所設計的晶片是利用TSMC 0.18 ?m CMOS製程研製。低雜訊放大器使用兩級疊接式架構來實現,前級針對低雜訊做匹配,後級則是以取得高增益為目標。電路在設計時加入一個串聯電感在共源極和共閘極電晶體之間來提高電晶體的fT值,進而使電路整體增益增加,雜訊減少。
所設計之晶片其量測結果如下,當總功率消耗為4.56 mW時,Ka頻段低雜訊放大器增益在29.1 GHz達到11.24 dB,雜訊指數為8.09 dB,輸入和輸出反射損耗在28 GHz皆大於7.1 dB。輸入1-dB壓縮點和三階截斷點在29 GHz分別為-25 dBm和-16 dBm。當總直流功耗為7.95 mW時,在29.4 GHz得到的小信號增益為16.5 dB,最小雜訊指數在28 GHz為6.92 dB,輸入和輸出反射損耗在28 GHz分別為5.35 dB和11.7 dB。晶片面積為0.66 × 0.93 mm2。
摘要(英) The subject of paper is to present the low noise amplifier of RF front-end circuits for Ka-band receiver being implemented on TSMC 0.18-μm CMOS technology. The low noise amplifier is implemented by a cascoding two stages. The first stage is designed for low noise performance while the second stage is matched for high gain. The circuit design by adding a series inductor between the CS and CG transistors to improve the transistors’ fT for increasing the circuit’s overall gain, and reducing the noise figure (NF).
The measured results of the designed circuit are illustrated as follows: when the total DC power consumption is 4.56 mW, the Ka-band LNA achieve a gain of 11.24 dB at 29.1 GHz, noise figure of 8.09 dB, and the input/output return losses are more than 7.1 dB at 28 GHz. The input 1-dB power gain compression point (P1dB) and the input third-order interception point (IIP3) at 29 GHz occur at -25 dBm and -16 dBm, respectively. When the total DC power consumption is 7.95 mW, the obtained small signal gain is 16.5 dB at 29.4 GHz and minimum NF of 6.92 dB at 28 GHz. The input/output return losses are 5.35 dB and 11.7 dB at 28 GHz. The occupied chip area is 0.66 × 0.93 mm2.
關鍵字(中) ★ Ka頻段
★ 低雜訊放大器
關鍵字(英) ★ Ka-band
★ low noise amplifier
論文目次 Chinese Abstract I
Abstract II
Acknowledgement III
Table of Contents V
List of Figures VII
List of Tables IX
Chapter 1 1
Introduction 1
1.1 The Microwave circuits research background 1
1.2 Motivation 2
1.3 Achievements 4
1.4 Thesis Organization 4
Chapter 2 6
Principles of Low Noise Amplifier Design 6
2.1 Introduction 6
2.2 Transistor Modeling 7
2.3 Source of Noise 9
2.3.1 Thermal Noise 10
2.3.2 Shot Noise 11
2.3.3 Flicker Noise 12
2.4 Important Parameters of the LNA 12
2.5 Impedance Matching 18
Chapter 3 19
Ka-Band Low Noise Amplifier 19
3.1 Introduction 19
3.2 Circuit Structure 19
3.3 Design Flow 23
3.4 Layout Consideration 24
3.5 Simulated and Measured Results 26
3.6 Summary 37
Chapter 4 38
Conclusion 38
4.1 Conclusion 38
4.2 Future Work 39
References 40
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amplifier with on-chip microstrip lines and inter-stage matching in 90-
nm baseline CMOS”, Proceedings of RFIC, pp. 143-146, 2006.
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[17] Sheng-Chi Chen, “Implementation of RF Receiver Front-End Circuits for Ka-Band Applications,” Master thesis, National Central University, 2008.
[18] Kai-Yun Lin, “Implementation of Ka-Band and V-Band Low Noise Amplifier and Broadband Amplifier,” Master thesis, National Central University, 2006.
[19] Hsing-Lung Tu, “The Study on Wireless Transceiver Front-end Circuits and Related Passive Device,” Master thesis, National Central University, 2005.
[20] Wen-Yuan Liu, “Analysis, Design, and Realization of Ka band Low Noise Amplifier and Coplanar Waveguide Lowpass Filter,” Master thesis, National Central University, 2004.
指導教授 邱煥凱(Hwann-Kaeo Chiou) 審核日期 2010-1-11
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