應用於K頻段之單向化全積體整合功率放大器與應用於V頻段之寬頻功率放大器研製

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姓名

陳柏勳(Po-Hsun Chen) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用於K頻段之單向化全積體整合功率放大器與應用於V頻段之寬頻功率放大器研製
(Implementation on Fully Integrated Unilateralized CMOS Power Amplifiers for K-band Applications and Wideband Power Amplifier for V-band Applications)

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摘要(中)

本論文利用tsmc提供的0.18-μm CMOS 與90-nm CMOS製程設計功率放大器，在設計上分成兩部份，第一部份為tsmc 0.18-μm CMOS製程設計功率放大器以操作於K頻段功率放大器為主要目標。運用傳輸線型變壓器和磁耦合變壓器達到寬頻與低損耗的阻抗匹配，以及使用交錯耦合單向化電容抑制共源結構中由於閘-汲寄生電容（Cgd）所產生的密勒效應（Miller Effects），提高放大器電路的隔離度、穩定性和提升傳輸增益（S21），達成高隔離度和高增益之功率放大器；第二部份為全積體整合矽製程tsmc 90-nm CMOS設計於V頻段之寬頻功率放大器，使用T型傳輸線寬頻匹配技術，以及串接三級電晶體串疊架構達到寬頻功率放大器。
各電路特性量測如下：應用於K頻段之單向化差動功率放大器，傳輸增益（S21）為26.2 dB，反向傳輸增益（S12）低於-60 dB，飽和輸出功率為20.6 dBm，1-dB增益壓縮點輸出功率為17 .2 dBm，功率增進效率為16%， 3-dB頻寬為4 GHz（19.2 GHz至23.2 GHz）；應用傳輸線型變壓器於K頻段高增益單向化功率放大器，傳輸增益（S21）為26.2 dB，反向傳輸增益（S12）低於-58 dB，飽和輸出功率為20.3 dBm，1-dB增益壓縮點輸出功率為17 .2 dBm，功率增進效率為24.1%， 3-dB頻寬為4.5 GHz（18.8 GHz至23.3 GHz）；V頻段寬頻功率放大器，傳輸增益（S21）為17.8 dB，飽和輸出功率為11.4 dBm，1-dB增益壓縮點輸出功率為7.2 dBm，功率增進效率為4.4%， 3-dB頻寬（受限於量測儀器只能量測到67 GHz）為19.8 GHz（47.2 GHz至67 GHz）。

摘要(英)

Both K-band and V-band fully integrated silicon-based power amplifiers are designed in this thesis, which are fabricated in tsmc 0.18-μm and 90-nm CMOS processes, respectively.
In the first part, the power amplifier adopted a neutralization topology to mitigate the intrinsic gate-drain feedback of each transistor to increase power gain and reverse isolation. The amplifier consists of three differential stages that are used transformers for impedance matching and inter-stage coupling. The 3-dB bandwidths are from 19.3 to 23.3 GHz with reverse isolation better than 60 dB. The amplifier achieves a power gain of 26.2 dB, a saturated output power of 20.6 dBm, an output 1-dB gain compression point of 17.2 dBm and a power added efficiency of 16.2%. The chip size is 1.11 mm2 with pad.
In the second part, we use transmission-line transformers for the input and output matching networks. The 3-dB bandwidths are from 18.8 to 23.5 GHz with reverse isolation better than 58 dB. The amplifier achieves a power gain of 26.2 dB, a saturated output power of 20.3 dBm, an output 1-dB gain compression point of 17.4 dBm and a power added efficiency of 24.1%. The chip size is 1.11 mm2 with pad.
In the third part, a wideband V-band power amplifier is implemented by adopting wideband matching network technique. The V-band power amplifier with wideband in tsmcTM 90-nm CMOS Technology achieves a power gain of 17.8 dB, a saturation output power of 11.4 dBm, an output power at 1-dB gain compression point of 7.2 dBm, and a power added efficiency of 4.4%. The 3-dB bandwidths are from 47.2 to 67 GHz. The chip size is 0.57 mm2 with pad.

關鍵字(中)

★ 功率放大器
★ 傳輸線型變壓器
★ 單向化電路

關鍵字(英)

★ Power Amplifier
★ TLT
★ Unilateralization

論文目次

摘要 ............................................................................................................................................ I
ABSTRACT ............................................................................................................................. II
誌謝 ....................................................................................................................................... III
目錄 ......................................................................................................................................... IV
圖目錄 ..................................................................................................................................... VI
表目錄 ..................................................................................................................................... IX
第一章緒論 ........................................................................................................................ 1
1-1 研究動機 .................................................................................................................... 1
1-2 研究成果 .................................................................................................................... 2
1-3 章節簡介 .................................................................................................................... 3
第二章功率放大器 ............................................................................................................ 4
2-1 功率放大器簡介 ........................................................................................................ 4
2-2 功率放大器分類 ........................................................................................................ 8
第三章應用單向化電路與變壓器之高隔離度功率放大器 .......................................... 10
3-1 磁耦合變壓器與傳輸線型變壓器 .......................................................................... 10
3-1-1 磁耦合變壓器簡介 .......................................................................................... 10
3-1-2 傳輸線型變壓器簡介 ...................................................................................... 15
3-2 單向化電路與中和化電路 ...................................................................................... 17
3-2-1 電路簡介 .......................................................................................................... 17
3-2-2 增益、隔離度與穩定度之改善 ...................................................................... 20
3-3 研究現況 .................................................................................................................. 22
3-4 應用於 K 頻段之單向化差動功率放大器 ............................................................. 25
3-4-1 應用於 K 頻段之單向化差動功率放大器設計 ............................................. 25
3-4-2 電路模擬與量測結果 ...................................................................................... 41
3-4-3 結果比較與討論 .............................................................................................. 48
3-5 應用傳輸線型變壓器於 K 頻段之單向化差動功率放大器 ................................. 50
3-5-1 應用傳輸線型變壓器於 K 頻段之單向化差動功率放大器設計 ................. 50
3-5-2 電路模擬與量測結果 ...................................................................................... 54
3-5-3 結果比較與討論 .............................................................................................. 61
第四章應用 T 型傳輸線匹配之寬頻功率放大器 ......................................................... 66
4-1 研究現況 .................................................................................................................. 66
V

4-2 應用於 V 頻段之寬頻功率放大器 ......................................................................... 69
4-2-1 應用於 V 頻段之寬頻功率放大器設計 ......................................................... 69
4-2-2 電路模擬與量測結果 ...................................................................................... 75
4-2-3 結果比較與討論 .............................................................................................. 82
第五章結論 ...................................................................................................................... 84
5-1 結論 .......................................................................................................................... 84
5-2 未來方向 .................................................................................................................. 85
參考文獻 .................................................................................................................................. 86

參考文獻

[1] J. R. Long, “Monolithic transformers for silicon RFIC design,” IEEE J. Solid-State Circuits, vol. 35, no. 9, pp. 1368–1382, Sept. 2000.
[2] I. Aoki, S. D. Kee, D. B. Rutledge, and A. Hajimiri, “Distributed active transformer–a new power-combining and impedance-transformation technique,“ IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 316–331, Jan. 2002.
[3] P. Haldi, D. Chowdhury, P. Reynaert, G. Liu, and A. M. Niknejad, “A 5.8 GHz 1 V linear power amplifier using a novel on-chip transformer power combiner in standard 90 nm CMOS,” IEEE J. Solid-State Circuits,, vol. 43, no. 5, pp. 1054–1063, May 2008.
[4] K. H. An, O. Lee, H. Kim, D. H. Lee, J. Han, K. S. Yang, Y. Kim, J. J. Chang, W. Woo, C.-H. Lee, H. Kim, and J. Laskar, “Power-combining transformer techniques for fully-integrated cmos power amplifiers,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1064–1075, May 2008.
[5] C. L. Ruthroff, “Some broadband transformers,” Proc. IRE, vol. 47, pp. 1337–1342, Aug. 1959.
[6] G. Guanella, “New method of impedance matching in radio-frequency circuits,” Brown-Boveri Rev., vol. 31, pp. 327–329, Sept. 1944.
[7] H.-Y. Liao, M.-W. Pan and H.-K. Chiou, “Fully-integrated CMOS class-E power amplifier using broadband and low-loss 1:4 transmission-line transformer,” Electron. Lett., vol. 46, no. 22, pp. 1490–1491,Oct. 2010.
[8] H.-K. Chiou and H.-Y. Chung, “2.5–7 GHz single balanced mixer with integrated Ruthroff-type balun in 0.18 µm CMOS technology,” Electron. Lett., vol. 49, no. 7, pp. 474–475, Mar. 2013.
[9] C.-C. Cheng, “Neutralization and Unilateralization,” IEEE Trans. Circuits Systems, vol. 2, no. 2, pp. 138 –145, Jun. 1955.
[10] T. Yao, Gordon, M.Q., Tang, K.K.W., Yau, K.H.K., Ming-Ta Yang, Schvan, P., Voinigescu, S.P., “Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio, ” IEEE J. Solid-State Circuits, vol.42, no.5, pp.1044-1057, May 2007.
[11] Y.-N. Jen, J.-H. Tsai, C.-T. Peng, and T.-W. Huang, “A 20 to 24 GHz +16.8 dBm fully integrated power amplifier using 0.18-μm CMOS process,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 1, pp. 42–44, Jan. 2009.
[12] J.-W. Lee and B.-S. Kim, “A K-band high-voltage four-way series-bias cascode power amplifier in 0.13 μm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 7, pp. 408–410, Jul. 2010.
[13] A. Vasylyev, P. Weger and W. Simburger, “Ultra-broadband 20.5–31 GHz mono lithically-integrated CMOS power amplifier,” Electron. Lett., vol. 41, no. 23, pp.1281–1282, Nov 2005.
[14] J.-W. Lee and S.-M. Heo, “A 27 GHz, 14 dBm CMOS power amplifier using 0.18 μm common-source MOSFETs,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 11, pp. 755–757, Nov . 2008.
[15] P.-C. Huang, J.-L. Kuo, Z.-M. Tsai, K.-Y. Lin and H. Wang, “A 22-dBm 24-GHz power amplifier using 0.18-μm CMOS technology,” in Proc. IEEE Int. Microw. Symp. Dig., May 23–28, 2010, pp. 248–251.
[16] S. Pinel, S. Sarkar, P. Sen, B. Perumana, D. Yeh, D. Dawn, and J. Laskar, “A 90 nm CMOS 60 GHz radio,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 3–7, 2008, pp. 130–131.
[17] J.-H. Tsai, Y.-L. Lee, T.-W. Huang, C.-M. Yu, J. G. J. Chern, “A 90-nm CMOS broadband and miniature Q-band balanced medium power amplifier,” in Proc. IEEE Int. Microw. Symp. Dig., Honolulu, HI, Jun. 3–8, 2007, pp.1129–1132.
[18] D. Chowdhury, P. Reynaert, and A. M. Niknejad,”A 60 GHz 1V + 12.3 dBm transformer -coupled wideband PA in 90nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 3–7, 2008, pp. 560–635.
[19] D. Dawn, S. Sarkar, P. Sen, B. Perumana, M. Leung, N. Mallavarpu, S. Pinel, and J. Laskar, “60 GHz CMOS power amplifier with 20-dB-gain and 12dBm Psat, ” IEEE MTT-S Int. Microw. Symp. Dig, vol. 7, no. 12, pp.537-540, Jun. 2009.
[20] J.-L. Kuo, Z.-M. Tsai, K.-Y. Lin and H. Wang, “A 50 to 70 GHz Power Amplifier Using 90 nm CMOS Technology,” IEEE Micro. Wireless Compon. Lett., vol. 19, no. 1, Jan. 2009.
[21] N. Kurita and H. Kondoh, “60GHz and 80GHz wideband power amplifier MMICs in 90nm CMOS technology,” in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 7–9, 2009, pp.39–42.
[22] N. Kurita and H. Kondoh, “60 GHz and 80 GHz wide band power amplifier MMICs in 90 nm CMOS technology, ” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), vol. 7, no. 9, pp.39-42, Jun. 2009.
[23] C.-H. Lin and H.-Y. Chang, “A broadband injection-locking class-E power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 10, pp. 3232–3242, Oct. 2012
[24] B. Razavi, Design of analog CMOS integrated circuits, McGraw-Hill, 2001.
[25] 廖顯原，「應用於矽基功率放大器之傳輸線變壓器與穿透矽通孔之研究」，國立中央大學，博士論文，民國100年。
[26] 鄭淵勵，「 C/V頻段全積體整合矽製程之寬頻功率放大器研製」，國立中央大學，碩士論文，民國101年。
[27] 郭晉瑋，「應用傳輸線型變壓器於X/K–Ka/V頻段全積體整合之寬頻互補式金氧半導體功率放大器研製」，國立中央大學，碩士論文，民國102年。

指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2014-7-2

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